commit | 5a47fd2ec44b0ad87d171be759f5215b6b51e45a | [log] [tgz] |
---|---|---|
author | Angel Pons <th3fanbus@gmail.com> | Sat Dec 18 21:25:07 2021 |
committer | Commit Bot <commit-bot@chromium.org> | Fri Feb 25 17:35:08 2022 |
tree | 4ded1ee29b85068bcb6bb56701bd25a9babbca85 | |
parent | ae842b43cbdd7f71f48e0e2f7e6deee73d4e5af5 [diff] |
UPSTREAM: nb/intel/ironlake: Fix some quickpath init magic Correct some Quickpath initialisation steps according to findings from two different Intel reference code binaries as well as MCHBAR register dump comparisons between vendor firmware and coreboot. The MSR_TURBO_POWER_CURRENT_LIMIT information comes from EDK2 sources. Tested on Apple iMac 10,1 (Clarkdale, aka desktop Ironlake), QPI init now completes successfully instead of causing hangs before raminit. Also tested on HP ProBook 6550b (Arrandale, aka mobile Ironlake), still reaches payload (e.g. TianoCore). (cherry picked from commit fa5ed059eb6fef1aa1681fbc7b38052b2028c1ac) Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Change-Id: Icd0139aa588dc8d948c03132b5c86866d90f3231 GitOrigin-RevId: fa5ed059eb6fef1aa1681fbc7b38052b2028c1ac Change-Id: I4a1e56180de3eccb8adff3b76cf1383f95f50ed9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3487814 Tested-by: CopyBot Service Account <copybot.service@gmail.com> Reviewed-by: Reka Norman <rekanorman@chromium.org> Commit-Queue: Reka Norman <rekanorman@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.