commit | 76fa29fc3db7032e46aef7d40946f6c23fab8bd0 | [log] [tgz] |
---|---|---|
author | zhourui <zhourui@huaqin.corp-partner.google.com> | Mon Nov 21 06:44:39 2022 |
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | Fri Dec 02 05:23:26 2022 |
tree | 22b24c87aa7f6f8d830dafbd69643f6a4a1cfd28 | |
parent | 6692819c7e2b1a94e7162aa2c3b55e0816e6c3a4 [diff] |
UPSTREAM: mb/google/dedede/variants/sasukette: Disable PCIE RP8 and CLKSRC4 This change disables unused PCIE RP8 and CLKSRC4. Without this change sasukette cannot enter into s0ix properly. BUG=b:259891452 TEST=Build and verified in sasukette (cherry picked from commit d892a336bbf6678adb83a5b6f48f13dea64f45eb) Original-Change-Id: I61bcefa128d4f39613a760b647048f9e19e262c2 Original-Signed-off-by: Rui Zhou <zhourui@huaqin.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/69848 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: zanxi chen <chenzanxi@huaqin.corp-partner.google.com> Original-Reviewed-by: Henry Sun <henrysun@google.com> Original-Reviewed-by: Maulik Vaghela <maulikvaghela@google.com> Original-Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Original-Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> GitOrigin-RevId: d892a336bbf6678adb83a5b6f48f13dea64f45eb Change-Id: Ib17d898a8243a2483bc9dfd6b94bd1666c08f063 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/4066577 Tested-by: CopyBot Service Account <copybot.service@gmail.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com> (cherry picked from commit 557eb6d34efeeeb7463c0d61d140bc0862ea7071) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/4074444 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com> Reviewed-by: Kun Liu <liukun11@huaqin.corp-partner.google.com> Tested-by: Rui Zhou <zhourui@huaqin.corp-partner.google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.