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chromium / chromiumos / third_party / coreboot / refs/heads/firmware-drallion-12930.B-chromeos-2016.05
commit77ef2989f670dda452a1108eb7d74082f76cab5a[log] [tgz]
authorDuncan Laurie <dlaurie@google.com>Tue Jun 09 22:13:15 2020
committerCommit Bot <commit-bot@chromium.org>Mon Jun 22 22:02:13 2020
tree7c6676d1dfd93404a6761d985653cdcf23d0f2f3
parent06322e7f9437d8581b2d82671ff79f2670c3c7c4 [diff]
UPSTREAM: ec/google/wilco: Suppress UCSI events in S0ix

If a UCSI event comes in when the EC is in S0ix mode then the kernel
driver attempts a transaction but fails and this can leave the system
in an unexpected state where the only wake source is the power button.

This change will not notify the UCSI driver if the EC is in S0ix mode
and instead keep track of the event and send it on resume.

BUG=b:157923800
TEST=tested on drallion system:
1. Put drallion system into suspend
2. Attach power supply
3. Ensure the system can wake with keypress

Change-Id: I95d9dabe24e099119d118f8dc80649980fc2e361
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 3cd3cb6f33cbbd18f9acac01ca5008e2dfb76242
Original-Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Change-Id: I43acb089385d9b41ac955f053e409daad67423f1
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/42237
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2251628
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
(cherry picked from commit cf8cad523971db6cd8bad7ff06421f5afbdc2925)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2258480
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Commit-Queue: Duncan Laurie <dlaurie@google.com>
Tested-by: Duncan Laurie <dlaurie@google.com>
2 files changed
tree: 7c6676d1dfd93404a6761d985653cdcf23d0f2f3
  1. configs/
  2. Documentation/
  3. LICENSES/
  4. payloads/
  5. src/
  6. util/
  7. .checkpatch.conf
  8. .clang-format
  9. .editorconfig
  10. .gitignore
  11. .gitmodules
  12. .gitreview
  13. AUTHORS
  14. COPYING
  15. gnat.adc
  16. MAINTAINERS
  17. Makefile
  18. Makefile.inc
  19. PRESUBMIT.cfg
  20. README.md
  21. toolchain.inc
README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of “unusual” things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that‘s worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.