UPSTREAM: mb/google/kukui: Change Juniper/Willow RAM table offset to 0x30

All the DRAM module for Juniper/Willow can reuse the RAM ID in
offset 0x30 table, so change Juniper/Willow RAM table offset to 0x30
for introducing more DRAM modules.

BUG=b:284423187
BRANCH=kukui
TEST=emerge-jacuzzi coreboot

(cherry picked from commit a47dc10ea59311aa161c7b900b171d0a101d2cdc)

Original-Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Original-Change-Id: I92740275dcc27061a94b7db7ce095655c0bd7cf5
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/75563
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Yidi Lin <yidilin@google.com>
GitOrigin-RevId: a47dc10ea59311aa161c7b900b171d0a101d2cdc
Change-Id: Idec1c7296d9b526ddfe092777c3b5bcf7eac3ba5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/4600327
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Reviewed-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Commit-Queue: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
1 file changed
tree: a825f611f77cedba0ad0c6a3358cfffbe01ca48c
  1. configs/
  2. Documentation/
  3. payloads/
  4. src/
  5. util/
  6. .checkpatch.conf
  7. .clang-format
  8. .editorconfig
  9. .gitignore
  10. .gitmodules
  11. .gitreview
  12. AUTHORS
  13. COMMIT-QUEUE.ini
  14. COPYING
  15. gnat.adc
  16. MAINTAINERS
  17. Makefile
  18. Makefile.inc
  19. PRESUBMIT.cfg
  20. README.md
  21. toolchain.inc
README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of “unusual” things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that‘s worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.