commit | 6e3e53588019cd0434931701325d8c341c9f7ea1 | [log] [tgz] |
---|---|---|
author | Ian Feng <ian_feng@compal.corp-partner.google.com> | Thu Nov 24 02:49:35 2022 |
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | Tue Nov 29 08:17:47 2022 |
tree | 7c9c9badb7edb395cb094eacc4eea6a2921f2f68 | |
parent | ec28c8e4c788e6e466517786f46a1cacc4122c4d [diff] |
UPSTREAM: mb/google/nissa/var/xivu: Update DPTF parameters Follow thermal table from thermal team. 1. Modify TS1 passive policy to 68. BUG=b:249446156 TEST=emerge-nissa coreboot chromeos-bootimage (cherry picked from commit c6e6d0d522f208b0d2ee08d108ea50d15ab109cd) Original-Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Original-Change-Id: I8539a29cab4863034a2b64d38aef4b772473246d Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/69960 Original-Reviewed-by: Kangheui Won <khwon@chromium.org> Original-Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Original-Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> GitOrigin-RevId: c6e6d0d522f208b0d2ee08d108ea50d15ab109cd Change-Id: I3650bdcfef6b41ab10d921afe1105a1806a778e8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/4058057 Commit-Queue: Rob Barnes <robbarnes@google.com> Tested-by: CopyBot Service Account <copybot.service@gmail.com> Reviewed-by: Rob Barnes <robbarnes@google.com> (cherry picked from commit 2ba2eaef76cb62e3ebbdcd7de492b38a17536f69) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/4060959 Reviewed-by: Reka Norman <rekanorman@chromium.org> Auto-Submit: Ian Feng <ian_feng@compal.corp-partner.google.com> Tested-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Commit-Queue: Reka Norman <rekanorman@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.