UPSTREAM: soc/intel/common/block/pmc: Move pmc_disable_all_gpe to romstage
Instead of disabling all GPEs during PMC init in bootblock, this
change moves it to pmc_fill_power_state which allows romstage to
correctly fill up GPE_EN registers in chipset_power_state. This is
essential for correctly identifying the wake source.
Disabling all GPEs was added recently in change 74145f76
(intel/common/pmc: Disable all GPEs during pmc_init) because keeping
GPEs enabled in coreboot while enabling SMI could lead to
side-effects as explained in the change. Moving pmc_disable_all_gpe to
pmc_fill_power_state should be safe as that happens before SMI is
enabled in coreboot.
TEST=Verified that GPE-based wake source is correctly
identified. Also, no issues observed while resuming from S3.
Change-Id: I61f07f1e7342ba5ecab98287bf7a95acc416f1d3
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: efe1e2d2d458897995552c173ad826b52afd768d
Original-Change-Id: I8e992ad09ffdefba62de11fa572e783715776bf1
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/22033
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/723426
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
2 files changed
