commit | de99c241f5a5c15470d202a2bc12ad46f1a0b9a1 | [log] [tgz] |
---|---|---|
author | Wim Vervoorn <wvervoorn@eltan.com> | Fri Dec 13 13:28:15 2019 |
committer | Commit Bot <commit-bot@chromium.org> | Tue Dec 17 21:06:53 2019 |
tree | 31f88f8fb61d97af870967d90653438e4a848873 | |
parent | e66d7bbd9a6ab289dca6dcda0cf457d547c7502b [diff] |
UPSTREAM: soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB Skylake soc code sets the length of the PCIe configuration space to 64 MB while the specification allows up to 256 MB. Linux reports "acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bos 00-3f] only partially covers this bridge". Remove "select PCIEX_LENGTH_64MB" from Kconfig so the default 256MB will be used and the size can be reduced on the mainboard level when required. BUG=N/A TEST=tested on facebook monolith Tested is by booting Linux 4.15 and analyzing the coreboot and Linux dmesg to make sure the memory range is reported correctly and doesn't create an overlap. Change-Id: Idc57d166552a68e5e4c8a9382117aeda38e61736 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 555efe47922c8b347ad7cd2c9759740e3e228164 Original-Change-Id: I8a06b9fba5ad561d8595292a73136091ab532faa Original-Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/37704 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1971734 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Wim Vervoorn <wvervoorn@eltan.com> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Wim Vervoorn <wvervoorn@eltan.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.