commit | efa7d1f14cbf06db6dde0d7950088bbf65b9efa6 | [log] [tgz] |
---|---|---|
author | Nick Vaccaro <nvaccaro@google.com> | Wed Aug 03 18:57:37 2022 |
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | Fri Aug 05 19:54:48 2022 |
tree | 160caa6817e1a180bcaac7a840ebd39458823656 | |
parent | 02ced5736bb9a850e691ec3afb029739535cdb98 [diff] |
UPSTREAM: mb/intel/adlrvp: shorten MAINBOARD_PART_NUMBER to fix build Building firmware for Brya is currently broken due to the RO_FWID region for adlrvp_m_ext_ec bloating past 64 characters. The CONFIG_MAINBOARD_PART_NUMBER is catenated onto the CONFIG_MAINBOARD_VENDOR string, which for Intel, makes for a very long trunk string that the kernel version will then be added to form the RO_FWID string. For Intel, that trunk string is already pretty long at : "Intel Corporation_Alder Lake Client Platform". Shortening the CONFIG_MAINBOARD_PART_NUMBER should address this issue for now. BUG=b:241273391 TEST="emerge-brya coreboot chromeos-bootimage" and verify it builds successfully (cherry picked from commit 648c28f5a04cbd0ddefe7c076255de1fd7eb3861) Original-Change-Id: Ie862c87dd9a24743f249f1b10862ca6f3295db23 Original-Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/66397 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Bora Guvendik <bora.guvendik@intel.com> GitOrigin-RevId: 648c28f5a04cbd0ddefe7c076255de1fd7eb3861 Change-Id: I0052904d7533307663c01cea7c0dd2fd98a244a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3811732 Tested-by: Nick Vaccaro <nvaccaro@google.com> Commit-Queue: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Subrata Banik <subratabanik@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.