| commit | cfa095431c96a150f308ef91a6c38a343106d063 | [log] [tgz] |
|---|---|---|
| author | Nick Vaccaro <nvaccaro@google.com> | Thu Sep 17 00:08:00 2020 |
| committer | Commit Bot <commit-bot@chromium.org> | Fri Oct 09 10:48:05 2020 |
| tree | 261893194b1330113731f8fd1bd02a62b6b2e714 | |
| parent | d747f010e4b83eb31d84193cd91e58e2a31a6d92 [diff] |
UPSTREAM: lib/spd: respect spd memory part name override The BIOS log was looking in the spd data for the part name, but part names are stripped from generic SPDs. For these cases, a mainboard can override the dram part number string, so the spd logging code needs to check for an override string when logging the dram part number. Change print_spd_info() to use an override string if declared. BUG=b:168724473 TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot volteer2 and verify that the BIOS log shows a part name when logging SPD information: SPD: module part number is K4U6E3S4AA-MGCL I also modified volteer to not override the part name and verified that this change did as expected and printed a blank string. Change-Id: I44c232f073dba19fd6efd6b91b10fd95acbd99b8 Signed-off-by: <> Original-Commit-Id: 88d4e82b33e5b47cc5b19d5f516272ff03a41546 Original-Change-Id: I91971e07c450492dbb0588abd1c3c692ee0d3bb0 Original-Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/45459 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2462931 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Commit-Queue: Nick Vaccaro <nvaccaro@google.com> Tested-by: Nick Vaccaro <nvaccaro@google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.