commit | 4c5b527e478b1b150bcfc1eba862fc37546c1469 | [log] [tgz] |
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author | Teddy Shih <teddyshih@ami.corp-partner.google.com> | Mon Mar 14 06:40:08 2022 |
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | Fri Apr 08 10:27:57 2022 |
tree | 9bcad264daa831081fdba7b96da4b0b14aa9ae48 | |
parent | 87c4c0fd46c010b21f2ece9954331d1a4a4c661b [diff] |
UPSTREAM: mb/google/dedede/var/beadrix: Update PCIe and SATA pins for low power consumption To achieve low power consumption, we disable unused PCIe and SATA pins at beadrix/overridetree.cb according to baseboard/devicetree.cb and mainboard schematic. Original measured beadrix board's power consumption is about 250 mW. After we disable unused PCIe and SATA pins, as well as, enable the other low power MUX CL (3487086: USB +/3487086), the measured power consumption achieves about 110 ~ 116 mW, as well as, meets Google battery life for 14 days in the suspend state and Intel low power consumption about 116 mW. BRANCH=dedede BUG=b:204882915 TEST=on beadrix, measured power consumption meets Intel power consumption. (cherry picked from commit 369b9ad78705fcc2bfa0ad6672e61c2d3cc135f8) MUX: Update low power mode of MUX anx7447 used as MUX only | https://chromium-review.googlesource.com/c/chromiumos/platform/ec/ Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62776 Reviewed-by: Teddy Shih <teddyshihau@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Ivan Chen <yulunchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Change-Id: I79ec524c5ce8f2a79da4aeba084786fb9dac17af GitOrigin-RevId: 369b9ad78705fcc2bfa0ad6672e61c2d3cc135f8 Change-Id: Ia4ab5f2b264e3ec8b9df8402e1e32cfbd4878678 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3576815 Tested-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Ivan Chen <yulunchen@google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.