FROMGIT: drm/i915: Force DPLL calculation for TC ports after readout

We always allocate two DPLLs (TC and TBT) for TC ports. This
is because we can't know ahead of time wherher we need to put
the PHY into DP-Alt or TBT mode.

However during readout we can obviously only read out the state
of the DPLL that the port is actually using. Thus the state after
readout will not have both DPLLs populated.

We run into problems if during readout the TC port is in DP-Alt
mode, but we then perform a modeset on the port without going
through the full .compute_config() machinery, and during said
modeset the port cannot be switched back into DP-Alt mode and
we need to take the TBT fallback path. Such a modeset can
happen eg. due to cdclk reprogramming.

This wasn't a problem earlier because we did all the DPLL
calculations much later in the modeset. So even if flagged
a modeset very late we'd still have gone through the DPLL
calculations. But now all the DPLL calculations happen much
earlier and so we need to deal with it, or else we'll attempt
a modeset without a DPLL.

To guarantee that we always have both DPLLs fully cal/ulated
for TC ports force a full modeset computation during the
initial commit.

v2: Avoid bitwise operation on bool (Jani)
    Call the return variable 'fastset' to convey its meaning

Reported-by: Lee Shawn C <shawn.c.lee@intel.com>
Fixes: b000abd3b3d2 ("drm/i915: Do .crtc_compute_clock() earlier")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922191236.4194-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
(cherry picked from commit eddb4afcb6c533d3f75f5f1a77e292fece27570e
 https://anongit.freedesktop.org/git/drm-intel.git drm-intel-next)
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>

BUG=b:240888222
TEST=Power up brask variant device with type-d display connected.
     No abnormal messages from i915 driver and boot to cros desktop properly.

Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/3919547
Tested-by: Shawn C Lee <shawn.c.lee@intel.com>
Reviewed-by: Sean Paul <sean@poorly.run>
Reviewed-by: Drew Davenport <ddavenport@chromium.org>
Commit-Queue: Shawn C Lee <shawn.c.lee@intel.com>
(cherry picked from commit 3ddffa7f83ea3577881f5ade775991842ae5cf4a)
Signed-off-by: keigo_hsieh <keigo_hsieh@compal.corp-partner.google.com>
Change-Id: If6838c8df2f21a4f151584389dd717bb530e82f8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/3936102
Reviewed-by: Ricky Chang <rickytlchang@chromium.org>
Commit-Queue: Ricky Chang <rickytlchang@chromium.org>
1 file changed