tree c984ba5bd876395b05b348a5e383f494f01da6c7
parent ce3185d3455c7711bffa3762ad32adee2537b773
author Michel Dänzer <michel.daenzer@amd.com> 1441692235 +0900
committer Michel Dänzer <michel@daenzer.net> 1447146417 +0900

radeon: Handle surface offsets exceeding 32 bits correctly

The slice_size and bo_size fields were getting truncated to 32 bits.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>