| /**************************************************************************** |
| **************************************************************************** |
| *** |
| *** This header was automatically generated from a Linux kernel header |
| *** of the same name, to make information necessary for userspace to |
| *** call into the kernel available to libc. It contains only constants, |
| *** structures, and macros generated from the original header, and thus, |
| *** contains no copyrightable information. |
| *** |
| *** To edit the content of this header, modify the corresponding |
| *** source file (e.g. under external/kernel-headers/original/) then |
| *** run bionic/libc/kernel/tools/update_all.py |
| *** |
| *** Any manual change here will be lost the next time this script will |
| *** be run. You've been warned! |
| *** |
| **************************************************************************** |
| ****************************************************************************/ |
| #ifndef __MSM_DRM_H__ |
| #define __MSM_DRM_H__ |
| #include "drm.h" |
| #ifdef __cplusplus |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #endif |
| #define MSM_PIPE_NONE 0x00 |
| #define MSM_PIPE_2D0 0x01 |
| #define MSM_PIPE_2D1 0x02 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_PIPE_3D0 0x10 |
| struct drm_msm_timespec { |
| __s64 tv_sec; |
| __s64 tv_nsec; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| }; |
| #define MSM_PARAM_GPU_ID 0x01 |
| #define MSM_PARAM_GMEM_SIZE 0x02 |
| #define MSM_PARAM_CHIP_ID 0x03 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_PARAM_MAX_FREQ 0x04 |
| #define MSM_PARAM_TIMESTAMP 0x05 |
| struct drm_msm_param { |
| __u32 pipe; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 param; |
| __u64 value; |
| }; |
| #define MSM_BO_SCANOUT 0x00000001 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_BO_GPU_READONLY 0x00000002 |
| #define MSM_BO_CACHE_MASK 0x000f0000 |
| #define MSM_BO_CACHED 0x00010000 |
| #define MSM_BO_WC 0x00020000 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_BO_UNCACHED 0x00040000 |
| #define MSM_BO_FLAGS (MSM_BO_SCANOUT | MSM_BO_GPU_READONLY | MSM_BO_CACHED | MSM_BO_WC | MSM_BO_UNCACHED) |
| struct drm_msm_gem_new { |
| __u64 size; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 flags; |
| __u32 handle; |
| }; |
| struct drm_msm_gem_info { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 handle; |
| __u32 pad; |
| __u64 offset; |
| }; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_PREP_READ 0x01 |
| #define MSM_PREP_WRITE 0x02 |
| #define MSM_PREP_NOSYNC 0x04 |
| #define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC) |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| struct drm_msm_gem_cpu_prep { |
| __u32 handle; |
| __u32 op; |
| struct drm_msm_timespec timeout; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| }; |
| struct drm_msm_gem_cpu_fini { |
| __u32 handle; |
| }; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| struct drm_msm_gem_submit_reloc { |
| __u32 submit_offset; |
| __u32 or; |
| __s32 shift; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 reloc_idx; |
| __u64 reloc_offset; |
| }; |
| #define MSM_SUBMIT_CMD_BUF 0x0001 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002 |
| #define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003 |
| struct drm_msm_gem_submit_cmd { |
| __u32 type; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 submit_idx; |
| __u32 submit_offset; |
| __u32 size; |
| __u32 pad; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 nr_relocs; |
| __u64 __user relocs; |
| }; |
| #define MSM_SUBMIT_BO_READ 0x0001 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_SUBMIT_BO_WRITE 0x0002 |
| #define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE) |
| struct drm_msm_gem_submit_bo { |
| __u32 flags; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 handle; |
| __u64 presumed; |
| }; |
| struct drm_msm_gem_submit { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 pipe; |
| __u32 fence; |
| __u32 nr_bos; |
| __u32 nr_cmds; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u64 __user bos; |
| __u64 __user cmds; |
| }; |
| struct drm_msm_wait_fence { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 fence; |
| __u32 pad; |
| struct drm_msm_timespec timeout; |
| }; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define MSM_MADV_WILLNEED 0 |
| #define MSM_MADV_DONTNEED 1 |
| #define __MSM_MADV_PURGED 2 |
| struct drm_msm_gem_madvise { |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| __u32 handle; |
| __u32 madv; |
| __u32 retained; |
| }; |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_MSM_GET_PARAM 0x00 |
| #define DRM_MSM_GEM_NEW 0x02 |
| #define DRM_MSM_GEM_INFO 0x03 |
| #define DRM_MSM_GEM_CPU_PREP 0x04 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_MSM_GEM_CPU_FINI 0x05 |
| #define DRM_MSM_GEM_SUBMIT 0x06 |
| #define DRM_MSM_WAIT_FENCE 0x07 |
| #define DRM_MSM_GEM_MADVISE 0x08 |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_MSM_NUM_IOCTLS 0x09 |
| #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) |
| #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) |
| #define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info) |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep) |
| #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini) |
| #define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit) |
| #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence) |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| #define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise) |
| #ifdef __cplusplus |
| #endif |
| #endif |
| /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
