[zlib][riscv] Add rules to enable SIMD optimizations for Arm

The first step to add support for RISCV is to actually proof test the
CMake buildsystem to ensure that the SIMD optimizations are actually
enabled.

Currently we only enable the SIMD optimizations in CMake while building
for x86-64 and this patch will add support for a second architecture
(i.e. Arm), opening the way for a third (RISCV).

Finally, the CPU features detection model on RISCV is similar to Arm
(i.e. calls to getauxval()) instead of simply reading a register (i.e. x86),
so it is helpful to ensure that the code will cover all three
architectures (x86-64, Arm, RISCV).

Bug: 329282661
Change-Id: I4c9774d11c583361ba93e2a9ba2e16e82c483274
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/5367582
Reviewed-by: Hans Wennborg <hans@chromium.org>
Commit-Queue: Adenilson Cavalcanti <cavalcantii@chromium.org>
Cr-Commit-Position: refs/heads/main@{#1273004}
NOKEYCHECK=True
GitOrigin-RevId: cbf0d4d5d3bbcdf1bd20e6c11924ada541042647
1 file changed