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| <pending_commit branch="master" change_id="Ie381862cfcd3c043ebf78171d18a51593b3677f7" commit="ed5094619eb06429de026de68a9a38c2453a0c7d" commit_message="Cr50: cleanup: Remove some unneccessary code Removing a declaration for a function that no longer exists, and deleting some extra PINMUX config that is also (and correctly) being done in the module that uses it (chip/g/sps.c). BUG=none BRANCH=none TEST=make buildall and test image on Cr50 Change-Id: Ie381862cfcd3c043ebf78171d18a51593b3677f7 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329525 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> " fail_count="1" gerrit_number="329525" owner_email="wfrichar@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/25/329525/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I66ae94118f73c41193c6ca5c0af9708f6cc8a3e8" commit="06c1ea0bd191b52f3a1881fa29fb5f151c7b649c" commit_message="Cr50: Configure GPIOs for Kevin proto0 BUG=chrome-os-partner:49952 BRANCH=none TEST=make buildall, run on Cr50 board It's kind of hard to test GPIOs that aren't attached to anything, but I've examined all the PINMUX controls and ARM GPIO settings, and I *think* they're right. Change-Id: I66ae94118f73c41193c6ca5c0af9708f6cc8a3e8 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329526 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> " fail_count="1" gerrit_number="329526" owner_email="wfrichar@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/26/329526/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I93b881bfd93dc100096bbd005a6c31b2669eda2f" commit="fa69a46a79fa3147f04ced81e9123d862a9377cc" commit_message="Cr50: Debug: Add pinmux and gpiocfg commands This adds two debugging commands to decode the PINMUX and GPIO routings without having to look at a bunch of hex values. They can easily be removed to save space, but they're kind of handy for now. BUG=chrome-os-partner:49952 BRANCH=none TEST=make buildall, and test on Cr50 Run the "pinmux" and "gpiocfg" commands. Verify that the output reflects the desired configs found in gpio.inc I get this: > pinmux 40060000: DIOM0 5 IN GPIO0_GPIO4 40060008: DIOM1 6 IN GPIO0_GPIO5 40060010: DIOM2 0 IN PU 40060028: DIOA0 70 UART0_TX 40060030: DIOA1 0 IN 40060038: DIOA2 0 IN 40060040: DIOA3 2 IN GPIO0_GPIO1 40060050: DIOA5 0 IN 40060058: DIOA6 0 IN 40060060: DIOA7 3 IN GPIO0_GPIO2 40060088: DIOA12 0 IN 400600a0: DIOB0 33 IN 400600a8: DIOB1 34 IN 400600b0: DIOB2 0 IN 400600b8: DIOB3 74 UART1_TX 400600c0: DIOB4 0 IN PD 400600c8: DIOB5 78 UART2_TX 400600d0: DIOB6 0 IN 400600d8: DIOB7 1 IN GPIO0_GPIO0 400600f8: GPIO0_GPIO0 3 DIOB7 400600fc: GPIO0_GPIO1 22 DIOA3 40060100: GPIO0_GPIO2 18 DIOA7 40060104: GPIO0_GPIO3 20 DIOA5 40060108: GPIO0_GPIO4 30 DIOM0 4006010c: GPIO0_GPIO5 29 DIOM1 40060110: GPIO0_GPIO6 28 DIOM2 40060208: UART0_RX 24 DIOA1 40060218: UART1_RX 8 DIOB2 40060228: UART2_RX 4 DIOB6 > gpiocfg GPIO0_GPIO0: read 0 drive 1 GPIO0_GPIO1: read 0 drive 0 GPIO0_GPIO2: read 0 drive 0 GPIO0_GPIO4: read 0 drive 0 GPIO0_GPIO5: read 0 drive 0 > Note that we skip GPIO0_GPIO3 and GPIO0_GPIO6 because they're neither outputs nor interrupts. All the GPIOs can do that. Change-Id: I93b881bfd93dc100096bbd005a6c31b2669eda2f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329527 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> " fail_count="1" gerrit_number="329527" owner_email="wfrichar@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/27/329527/2" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-3.18" change_id="I6e24bd1f7a14152409b3df04eae52fbe970a5482" commit="5b6dacafdaf54167534304416dd206f01fb40432" commit_message="UPSTREAM: mmc: core: enable mmc host device to suspend/resume asynchronously This patch enables mmc hosts to suspend/resume asynchronously. This will improve system suspend/resume speed. After applying this patch and enabling all mmc hosts' child devices to suspend/resume asynchronously on ASUS T100TA, the system suspend-to-idle time is reduced from 1645ms to 1107ms, and the system resume time is reduced from 940ms to 914ms. Signed-off-by: Zhonghui Fu <zhonghui.fu@linux.intel.com> Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> (cherry picked from commit 45a915baa0e8b2eeab157454a2110de58811cb19) BUG=chrome-os-partner:49824 TEST=suspend_stress_test on chell Change-Id: I6e24bd1f7a14152409b3df04eae52fbe970a5482 Signed-off-by: Derek Basehore <dbasehore@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329577 Reviewed-by: Todd Broch <tbroch@chromium.org> " fail_count="0" gerrit_number="329577" owner_email="dbasehore@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/77/329577/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.18" change_id="I18058fdf5b70c010b2d5f1c0a3f298839c97c01c" commit="1f85b3802f0acb6a5027aca50adfe204cd6357d9" commit_message="UPSTREAM: mmc: sdhci-acpi: enable sdhci-acpi device to suspend/resume asynchronously This patch enables sdhci-acpi devices to suspend/resume asynchronously. This will improve system suspend/resume speed. After enabling the sdhci-acpi devices and all their child devices to suspend/resume asynchronously on ASUS T100TA, the system suspend-to-idle time is reduced from 1645ms to 1089ms, and the system resume time is reduced from 940ms to 908ms. Signed-off-by: Zhonghui Fu <zhonghui.fu@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> (cherry picked from commit 74094b7d2234379c504940eca3025e618b457f29) BUG=chrome-os-partner:49824 TEST=suspend_stress_test on chell Change-Id: I18058fdf5b70c010b2d5f1c0a3f298839c97c01c Signed-off-by: Derek Basehore <dbasehore@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329578 Reviewed-by: Todd Broch <tbroch@chromium.org> " fail_count="0" gerrit_number="329578" owner_email="dbasehore@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/78/329578/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.18" change_id="I03fe36a8c2809f5aab3b785ca8073cdc7b5b1de1" commit="c72961b60956d0266cabc4ec7310ba19cd20a78b" commit_message="BACKPORT: mmc: enable MMC/SD/SDIO device to suspend/resume asynchronously Now, PM core supports asynchronous suspend/resume mode for devices during system suspend/resume, and the power state transition of one device may be completed in separate kernel thread. PM core ensures all power state transition dependency between devices. This patch enables MMC/SD/SDIO card and SDIO function devices to suspend/resume asynchronously. This will take advantage of multicore and improve system suspend/resume speed. After applying this patch and enabling all SDIO function's child devices to suspend/resume asynchronously on ASUS T100TA, the system suspend-to-idle time is reduced from 1645ms to 1108ms, and the system resume time is reduced from 940ms to 918ms. Signed-off-by: Zhonghui Fu <zhonghui.fu@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> (cherry picked from commit ec076cd226c3d93565ede082a240e23b5090e36c) Conflicts: drivers/mmc/core/bus.c (minor) BUG=chrome-os-partner:49824 TEST=suspend_stress_test on chell Change-Id: I03fe36a8c2809f5aab3b785ca8073cdc7b5b1de1 Signed-off-by: Derek Basehore <dbasehore@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329579 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> " fail_count="0" gerrit_number="329579" owner_email="dbasehore@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/79/329579/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.14" change_id="Id0ecbb83b8da159237d75a33bab82dd4677740c3" commit="c83604de7bb7e6238b4782b721270e5b3c6ddf2d" commit_message="BACKPORT: FROMLIST: ARM: errata: Workaround errata A12 818325/852422 A17 852423 There are several similar errata on Cortex A12 and A17 that all have the same workaround: setting bit[12] of the Feature Register. Technically the list of errata are: - A12 818325: Execution of an UNPREDICTABLE STR or STM instruction might deadlock. Fixed in r0p1. - A12 852422: Execution of a sequence of instructions might lead to either a data corruption or a CPU deadlock. Not fixed in any A12s yet. - A17 852423: Execution of a sequence of instructions might lead to either a data corruption or a CPU deadlock. Not fixed in any A17s yet. Since A12 got renamed to A17 it seems likely that there won't be any future Cortex-A12 cores, so we'll enable for all Cortex-A12. For Cortex-A17 I believe that all known revisions are affected and that all knows revisions means <= r1p2. Presumably if a new A17 was released it would have this problem fixed. Note that in <https://patchwork.kernel.org/patch/4735341/> folks previously expressed opposition to this change because: A) It was thought to only apply to r0p0 and there were no known r0p0 boards supported in mainline. B) It was argued that such a workaround beloned in firmware. Now that this same fix solves other errata on real boards (like rk3288) point A) is addressed. Point B) is impossible to address on boards like rk3288. On rk3288 the firmware doesn't stay resident in RAM and isn't involved at all in the suspend/resume process nor in the SMP bringup process. That means that the most the firmware could do would be to set the bit on "core 0" and this bit would be lost at suspend/resume time. It is true that we could write a "generic" solution that saved the boot-time "core 0" value of this register and applied it at SMP bringup / resume time. However, since this register (described as the "Feature Register" in errata) appears to be undocumented (as far as I can tell) and is only modified for these errata, that "generic" solution seems questionably cleaner. The generic solution also won't fix existing users that haven't happened to do a FW update. Note that in ARM64 presumably PSCI will be universal and fixes like this will end up in ATF. Hopefully we are nearing the end of this style of errata workaround. BUG=chrome-os-partner:50137 TEST=CL:If49e61d7825bdfaf0eb3664c42aa9b0ba2fe66b2 Conflicts: arch/arm/mm/proc-v7.S ...due to massive re-org upstream that doesn't make sense to pick back. Note also that while backporting I fixed a few random bugs where we would apply errata to cores not manufactured by ARM and optimized the jumps a bit for A8 / A9. These types of issues have already been fixed by the reorg upstream. Change-Id: Id0ecbb83b8da159237d75a33bab82dd4677740c3 Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Huang Tao <huangtao@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (am from https://patchwork.kernel.org/patch/8441441/) Reviewed-on: https://chromium-review.googlesource.com/329521 Reviewed-by: Olof Johansson <olofj@chromium.org> " fail_count="1" gerrit_number="329521" owner_email="dianders@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/21/329521/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-3.14" change_id="I22549b24ee308524edf9db931d6817aa28e5efd3" commit="805f700abe431934f73ec7e50686403abd42ea3d" commit_message="CHROMIUM: ARM: rockchip: Handle ERRATA 818325 / 852422 for resume The normal prov-v7.S code doesn't run on the main CPU during resume from S3. Apply the errata early in the resume at the same time that we restore the l2ctlr. BUG=chrome-os-partner:50137 TEST=CL:If49e61d7825bdfaf0eb3664c42aa9b0ba2fe66b2 Change-Id: I22549b24ee308524edf9db931d6817aa28e5efd3 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329522 Reviewed-by: Olof Johansson <olofj@chromium.org> " fail_count="1" gerrit_number="329522" owner_email="dianders@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/22/329522/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-3.14" change_id="Ic9353ab1c5963930772867cd6a66129f48c4cf75" commit="35ba9cc6736c9a0d2ac276ee4dc0511814a21007" commit_message="CHROMIUM: config: Turn on CONFIG_ARM_ERRATA_818325_852422 This errata affects rk3288 and we care about that. Enable it. BUG=chrome-os-partner:50137 TEST=CL:If49e61d7825bdfaf0eb3664c42aa9b0ba2fe66b2 Change-Id: Ic9353ab1c5963930772867cd6a66129f48c4cf75 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329523 Reviewed-by: Olof Johansson <olofj@chromium.org> " fail_count="1" gerrit_number="329523" owner_email="dianders@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/23/329523/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I470e360cf524325f87bb9875b22626ce4d74c0b5" commit="73d4ced76c1dfff6a3d0aacfbe08c5b065a7a57e" commit_message="BACKPORT: linux-firmware: intel: add symbolic link and file versions This helps to add future versions and keep them in the git as well Signed-off-by: Vinod Koul <vinod.koul@intel.com> Link: git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git br: master (cherry picked from commit c713cb2eeb7cf1b3991beda1cff77e83d1812baf) BUG=None TEST=with the whole series applied, audio works on SKL CQ-DEPEND=CL:326110 Change-Id: I470e360cf524325f87bb9875b22626ce4d74c0b5 Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Reviewed-on: https://chromium-review.googlesource.com/326281 Commit-Ready: Ben Zhang <benzh@chromium.org> Reviewed-by: Vedang Patel <vedang.patel@intel.com> Reviewed-by: Ben Zhang <benzh@chromium.org> " fail_count="3" gerrit_number="326281" owner_email="sathya.prakash.m.r@intel.com" pass_count="0" patch_number="3" project="chromiumos/third_party/linux-firmware" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/linux-firmware" ref="refs/changes/81/326281/3" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I56a5d4ee909c78c9de9330f3d00325d5f4dbba16" commit="c25252f3734429d0d3b5c5452de0d4450da728c3" commit_message="BACKPORT: linux-firmware: Update Skylake audio firmware This updates Skylake audio dsp firmware, this version contains odd bug fixes and update on some third party modules The version of this firmware release is 8.20.00.869 The md5sum of this firmware binary is 146ab54050e720c35e03e8f264ac3459 Signed-off-by: Vinod Koul <vinod.koul@intel.com> Link: git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git br: master (cherry picked from commit f7996657e8f25386541593242cb8e906d9808ec7) fixed typo in commit msg BUG=None TEST=with the whole series applied, audio works on SKL Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Change-Id: I56a5d4ee909c78c9de9330f3d00325d5f4dbba16 Reviewed-on: https://chromium-review.googlesource.com/326282 Commit-Ready: Ben Zhang <benzh@chromium.org> Tested-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Tested-by: Prathyushi Nangia <prathyushi.nangia@intel.com> Reviewed-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Reviewed-by: Vedang Patel <vedang.patel@intel.com> Reviewed-by: Ben Zhang <benzh@chromium.org> " fail_count="3" gerrit_number="326282" owner_email="sathya.prakash.m.r@intel.com" pass_count="0" patch_number="3" project="chromiumos/third_party/linux-firmware" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/linux-firmware" ref="refs/changes/82/326282/3" remote="cros" total_fail_count="3"/><pending_commit branch="chromeos-3.18" change_id="I259e9e60c5124fc553bad583623fed6f13bc1d78" commit="1b0fce31eaf9789d0835e9babfd4d0aac2be3dec" commit_message="UPSTREAM: ASoC: Intel: boards: Add IV feedback route for nau88l25_ssm4567 machine SSM4567 supports IV feedback for feedback to the speaker protection algorithm Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git br: for-next (cherry picked from commit 5093f9287c83665b9227640aea8a8d980684246f) BUG=chrome-os-partner:49191 TEST=with the series applied, SSPO loopback is enabled to communicate with algorithm in dsp. Change-Id: I259e9e60c5124fc553bad583623fed6f13bc1d78 Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Reviewed-on: https://chromium-review.googlesource.com/323022 Commit-Ready: Ben Zhang <benzh@chromium.org> Tested-by: Ben Zhang <benzh@chromium.org> Reviewed-by: Ben Zhang <benzh@chromium.org> " fail_count="0" gerrit_number="323022" owner_email="sathya.prakash.m.r@intel.com" pass_count="0" patch_number="7" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/22/323022/7" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Idecaa6ed98ba37b5c8002d50c96692620c903eed" commit="44cf72efe3122e549a8752dc66fea5452b8cf0bc" commit_message="cbuildbot: make Android PFQ slave builds sync properly BUG=chromium:589551 TEST=cbuildbot_unittest Change-Id: Idecaa6ed98ba37b5c8002d50c96692620c903eed Reviewed-on: https://chromium-review.googlesource.com/329390 Commit-Ready: David Riley <davidriley@chromium.org> Tested-by: David Riley <davidriley@chromium.org> Reviewed-by: Aviv Keshet <akeshet@chromium.org> Reviewed-by: Don Garrett <dgarrett@chromium.org> " fail_count="0" gerrit_number="329390" owner_email="davidriley@chromium.org" pass_count="0" patch_number="2" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/90/329390/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I4e341b8e3318c8ec29ad2d7ac101ae0f6c6d5049" commit="f2e13687f62538093cabc766db0c55b035c1219e" commit_message="cryptohome: Implemented RenameCryptohome To migrate ChromeOS account identifier from one string to another, we need to be able to move existing cryptohome to a new identifier. RenameCryptohome replaces existing cryptohome id, moving directory to a new name. BUG=chromium:462823 TEST=HomeDirsTest.RenameCryptohome unittest. Manually tested. Change-Id: I4e341b8e3318c8ec29ad2d7ac101ae0f6c6d5049 Reviewed-on: https://chromium-review.googlesource.com/319812 Commit-Ready: Alexander Alekseev <alemate@chromium.org> Tested-by: Alexander Alekseev <alemate@chromium.org> Reviewed-by: Darren Krahn <dkrahn@chromium.org> " fail_count="0" gerrit_number="319812" owner_email="alemate@chromium.org" pass_count="0" patch_number="8" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/12/319812/8" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I8ca31c4c1753af816b13bd75e4feb5b76d153e2a" commit="a31574b132a3151a7e7c9c8400bedb36f2b21071" commit_message="add GBM_BO_USE_LINEAR flag for bo creation Some drivers will enable tiling with the other GBM_BO_USE_* flags as an optimization, but this interferes with reading/writing to mmapped buffers and other devices that might expect linear buffers. This CL adds an explicit request to minigbm to only allocate linear buffer objects. This request is only honored for buffers that meet all the following requirements: - YUV formats or ARGB/XRGB 32-bit formats. - Not combined with GBM_BO_USE_RENDERING A backend might still reject an allocation even if it meets those requirements. This CL also raises the limit on the number of driver formats to 16. TEST=on samus, run vgem_fb_test with GBM_BO_USE_LINEAR flag in gbm_bo_create BUG=None Change-Id: I8ca31c4c1753af816b13bd75e4feb5b76d153e2a Reviewed-on: https://chromium-review.googlesource.com/329248 Commit-Ready: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Zach Reizner <zachr@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> " fail_count="1" gerrit_number="329248" owner_email="zachr@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform/minigbm" project_url="https://chromium-review.googlesource.com/chromiumos/platform/minigbm" ref="refs/changes/48/329248/5" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I283276f277ec37f6a69ef09640aaff1a3b103e34" commit="459e53f537258c6b5b0597bdcd2e4c0426763894" commit_message="Move audio_CrasSanity test to bvt-perbuild Will add better logging in the test to make sheriff's life easier and will add the test back to CQ. TEST=None BUG=chromium:588834 Change-Id: I283276f277ec37f6a69ef09640aaff1a3b103e34 Reviewed-on: https://chromium-review.googlesource.com/329571 Commit-Ready: Rohit Makasana <rohitbm@chromium.org> Tested-by: Rohit Makasana <rohitbm@chromium.org> Reviewed-by: Richard Barnette <jrbarnette@chromium.org> " fail_count="0" gerrit_number="329571" owner_email="rohitbm@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/71/329571/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.18" change_id="I91c580c624cd6ebb679456c88abff0c05c713a38" commit="8c5fdcf8d3260e73f2de053ebb0002244af65bcc" commit_message="CHROMIUM: devfreq: watermark: Use div_u64() for 64-bit divide operations Building governor_wmark_active for 32 bit targets fails with the following link error. ERROR: "__udivdi3" [drivers/devfreq/governor_wmark_active.ko] undefined! In addition to using div_u64(), change current_frequency_khz to unsigned long to avoid having to use div64_u64(). current_frequency is unsigned long, so we can be sure that current_frequency_khz won't overflow. BUG=chromium:583462 TEST=None (build i386:allmodconfig or i386:allyesconfig) Change-Id: I91c580c624cd6ebb679456c88abff0c05c713a38 Fixes: d2d74c3a212a ("CHROMIUM: devfreq: Add active watermark devfreq governor") Signed-off-by: Guenter Roeck <groeck@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329566 Reviewed-by: Olof Johansson <olofj@chromium.org> Reviewed-by: Andrew Bresticker <abrestic@chromium.org> " fail_count="0" gerrit_number="329566" owner_email="groeck@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/66/329566/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I7a1d1b344119e6f6729a38bbea04da75f2d3371c" commit="a5dbc460c9f87db0fbba9de9e9982443117c57dd" commit_message="cr50: signer: sync up with upstream This change just copies files shared between two repositories which have changed since the last sync up. This time it is as of @CL85098. BRANCH=none BUG=none TEST=the signed image boots fine on the b1 board. Change-Id: I7a1d1b344119e6f6729a38bbea04da75f2d3371c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329407 Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> " fail_count="0" gerrit_number="329407" owner_email="vbendeb@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/07/329407/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-3.18" change_id="If7fa0d5e03b99acd791e1cc4e7b04b9b8089b71d" commit="11e0a11453824811287b5a27d80250e0faf4ab4e" commit_message="CHROMIUM: drm: bridge: ps8640: don't depend on i2c This removes a cyclic dependency, and it's what the upstream version already does. drivers/video/fbdev/Kconfig:5:error: recursive dependency detected! drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER drivers/gpu/drm/Kconfig:34: symbol DRM_KMS_FB_HELPER depends on DRM_KMS_HELPER drivers/gpu/drm/Kconfig:28: symbol DRM_KMS_HELPER is selected by DRM_PARADE_PS8640 drivers/gpu/drm/bridge/Kconfig:1: symbol DRM_PARADE_PS8640 depends on I2C drivers/i2c/Kconfig:7: symbol I2C is selected by FB_DDC drivers/video/fbdev/Kconfig:59: symbol FB_DDC is selected by FB_CYBER2000_DDC drivers/video/fbdev/Kconfig:374: symbol FB_CYBER2000_DDC depends on FB_CYBER2000 drivers/video/fbdev/Kconfig:362: symbol FB_CYBER2000 depends on FB BUG=none TEST=build Change-Id: If7fa0d5e03b99acd791e1cc4e7b04b9b8089b71d Signed-off-by: Olof Johansson <olofj@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329567 Reviewed-by: Guenter Roeck <groeck@google.com> " fail_count="0" gerrit_number="329567" owner_email="olofj@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/67/329567/2" remote="cros" total_fail_count="0"/><lkgm version="7971.0.0-rc2"/></manifest> |