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| <pending_commit branch="master" change_id="I2cd956a8db5c3da0d5cdff041494221ff8e52a4d" commit="9d9e556d8a3d251cb2da61f596407c24c8a2b853" commit_message="media-libs/arc-mesa: Uprev to 12.1.0-pre2 This uprevs the upstream Mesa base to 12.1.0-devel based on the following upstream git commit: b010fa8 glsl: make sure UBO arrays are sized in ES which matches current media-libs/mesa. BUG=b:29036398 TEST=No significant regressions in dEQP inside the container Change-Id: I2cd956a8db5c3da0d5cdff041494221ff8e52a4d Reviewed-on: https://chromium-review.googlesource.com/368523 Commit-Ready: Tomasz Figa <tfiga@chromium.org> Tested-by: Tomasz Figa <tfiga@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="0" gerrit_number="368523" owner_email="tfiga@chromium.org" pass_count="0" patch_number="1" project="chromiumos/manifest" project_url="https://chromium-review.googlesource.com/chromiumos/manifest" ref="refs/changes/23/368523/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I188ad97c96f9259a53393e7959ca24f924bd4fbf" commit="399bf7c8366ac68f04adf7e07b31640a8f5e5277" commit_message="UPSTREAM: drivers/intel/fsp2_0: Add checklist support Add the Kconfig value to point to the checklist data files. TEST=Build and run on Galileo Gen2 BUG=None BRANCH=None Change-Id: I188ad97c96f9259a53393e7959ca24f924bd4fbf Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16039 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/368517 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> " fail_count="0" gerrit_number="368517" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/17/368517/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic8acba7f4c55347e45798ce4bea577094be7e281" commit="ec3bc53da1aa0ea6506d251584302c5215b99613" commit_message="UPSTREAM: drivers/spi: Add support for Micron N25Q128A Although we have already support for the flash chip N25Q128 there is a similar type available which has the same geometry and opcodes but unfortunately a slightly different device type ID. While the already supported N25Q128 has the ID 0xbb18 this one has the ID 0xba18. To make both types available in the flash support table, use N25Q128A as the flash name. This name can be found in the datasheet which can be found here: https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_128mb_3v_65nm.pdf TEST=Booted and verified that MRC cache could be written BUG=None BRANCH=None Change-Id: Ic8acba7f4c55347e45798ce4bea577094be7e281 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/16061 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/368518 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> " fail_count="0" gerrit_number="368518" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/18/368518/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id9aa461316ae79dd8a7013ee464826925d918e5d" commit="adc73ec088a5c8e772c05c5d3a44bd0f95c37940" commit_message="UPSTREAM: build system: add easier targetting of cbfstool options per region The first attempt of providing a options-for-region function to call to determining a file's cbfstool options would work, but it means there can only be one instance which has to handle all of the files that may need an override. That logic can be problematic in impelementation. Instead, provide a mechanism to target cbfstool options for a given CBFS region where the implementation is tightly coupled in the build system to where the file as requested to be added to cbfs. This allows there to be a base set of cbfstool options while more easily extending arguments on specific regions. Example which adds '-b 0x10000' only for the COREBOOT CBFS region: cbfs-files-y += file.bin file.bin-COREBOOT-cbfstool-opts := -b 0x10000 BUG=None BRANCH=None TEST=None Change-Id: Id9aa461316ae79dd8a7013ee464826925d918e5d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14640 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368519 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> " fail_count="0" gerrit_number="368519" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/19/368519/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I04b2b635c4d61c192b0851cf5b3cae2f61538b36" commit="9b72f28f9e1bd7b9325d244c4fa56177830bb78d" commit_message="UPSTREAM: soc/intel/quark: Add missing breaks Add missing breaks in reg_access.c. TEST=Build and run on Galileo Gen2 Found-by: Converity Scan #1361261 BUG=None BRANCH=None Change-Id: I04b2b635c4d61c192b0851cf5b3cae2f61538b36 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16069 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/368710 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> " fail_count="0" gerrit_number="368710" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/10/368710/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I613b56cedc5796f22ba4d9fdd52c09a33acd6fef" commit="eb65447788ca82b5bc9a5a5e5411e9c07564557b" commit_message="UPSTREAM: google/reef: Correct SD card pins config SD CLK and CLK_FB needs to be pulled down by 20K. SD CD_N is active LOW, needs to be pulled up by 20K SD WP pin is not connected for uSD cards, enable writes by default by pulling low by 20K. BUG=chrome-os-partner:54866 BRANCH=None TEST=Test with uSD cards. Change-Id: I613b56cedc5796f22ba4d9fdd52c09a33acd6fef Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com> Reviewed-on: https://review.coreboot.org/16057 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368711 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> " fail_count="0" gerrit_number="368711" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/11/368711/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I95b25327e4ec8b3c8784dbd34ff150c8c82864ea" commit="777aa10e04059767cb24a0eb41b53cdc941554c3" commit_message="UPSTREAM: drivers/intel/fsp2_0: Ensure EC is in right mode before memory init If EC_GOOGLE_CHROMEEC is enabled, ensure that the EC is in correct mode before running memory init. This saves additional memory training required in recovery path because of reboot later in ramstage. BUG=chrome-os-partner:54245 BRANCH=None TEST=None Change-Id: I95b25327e4ec8b3c8784dbd34ff150c8c82864ea Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/16034 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368712 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> " fail_count="0" gerrit_number="368712" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/12/368712/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibc90f238214bdde4f4d3e0d49b1981413d130f1a" commit="d40662a4750070f8d8d9a17e85f47fb82c013226" commit_message="UPSTREAM: drivers/intel/fsp1_1: only set a base address for FSP in COREBOOT CBFS The -b FSP_LOC argument to cbfstool is only valid for the COREBOOT CBFS. Don't pass that value for all other CBFS regions. BUG=None BRANCH=None TEST=None Change-Id: Ibc90f238214bdde4f4d3e0d49b1981413d130f1a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14641 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/368713 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> " fail_count="0" gerrit_number="368713" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/13/368713/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ifa39e378eb1e7c00f03d8d213f52ff3cb9c17606" commit="d0d7913c06c596086b4d08cda8628bcc778bcc75" commit_message="UPSTREAM: acpi: Generate object for coreboot table region Generate an object to describe the coreboot table region in ACPI with the HID "CORE0000" so it can be used by kernel drivers. To keep track of the "CORE" HID usage add them to an enum and add a function to generate the HID in AML: Name (_HID, "CORExxxx") BUG=chromium:589817 BRANCH=none TEST=build and boot on chell, dump SSDT to verify contents: Device (CTBL) { Name (_HID, "CORE0000") // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0x7AB84000, // Address Base 0x00008000, // Address Length ) }) } Change-Id: Ifa39e378eb1e7c00f03d8d213f52ff3cb9c17606 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/16056 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/368714 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> " fail_count="0" gerrit_number="368714" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/14/368714/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6c8857665dbcf495d1ac4fa40b238cd74baa7097" commit="fcb2893527989bf86a4d2f0980b827e210c1ecf4" commit_message="UPSTREAM: google/reef: Enable I2C2 for use in bootblock Enable I2C bus 2 for early init so it can be used by vboot for TPM communication for verifying the memory init code. BUG=chrome-os-partner:53336 BRANCH=none TEST=build and boot on reef Change-Id: I6c8857665dbcf495d1ac4fa40b238cd74baa7097 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/16059 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368715 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> " fail_count="0" gerrit_number="368715" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/15/368715/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9f985ae9a0c066f1136eabcdf5ef1c849ef0c83a" commit="f4fea87d004a24e542d8c42705e8a8afe3e1365b" commit_message="UPSTREAM: soc/intel/skylake: Add Kabylake device Ids Adding kabylake device ids for chip inits. Skylake and Kabylak do not differ much, the intention is to support both SoCs in the same code base. BUG=None BRANCH=None TEST=None Change-Id: I9f985ae9a0c066f1136eabcdf5ef1c849ef0c83a Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/16049 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368716 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> " fail_count="0" gerrit_number="368716" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/16/368716/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ic35b9b5f88068f0436cf9896a721fafce56466a2" commit="e72cdff595e17fad345ff6ae102c9d41d9ccd2a8" commit_message="wpa_supplicant: set vht capabilities in mpm frames. Derive vht capabilities from configuration file and HW capability and set them in mpm action frames. This change will allow enabling TxBF from configuration if the HW supports it. BUG=chrome-os-partner:55427 TEST=Verified by configuring TxBF in config,forming mesh network and observing that the TxBF capabilities are set correctly in MPM action frames from a sniffer capture. CQ-DEPEND=CL:*273206 Change-Id: Ic35b9b5f88068f0436cf9896a721fafce56466a2 Reviewed-on: https://chromium-review.googlesource.com/361970 Commit-Ready: Yixiang Li <yixiang@google.com> Tested-by: Yixiang Li <yixiang@google.com> Reviewed-by: Srinivasa duvvuri <sduvvuri@chromium.org> Reviewed-by: Zhihong Yu <zhihongyu@chromium.org> " fail_count="0" gerrit_number="361970" owner_email="raghavendrasa@google.com" pass_count="0" patch_number="8" project="chromiumos/third_party/hostap" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/hostap" ref="refs/changes/70/361970/8" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I8ef86f966d017290491d6fe2b1486ce913cd09fb" commit="c086a9ef955fd969d1f3f7338b5fece7f806d9fe" commit_message="npcx/flash: Don't print uninitialized values In command_flash_spi_sel_lock(), and command_flash_tristate() a value could be printed without being initialized first. Only display the values in the paths where the variable gets read. BUG=None TEST=Build and boot Reef BRANCH=None Change-Id: I8ef86f966d017290491d6fe2b1486ce913cd09fb Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368301 Reviewed-by: David Hendricks <dhendrix@chromium.org> " fail_count="0" gerrit_number="368301" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/01/368301/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I9f6ce3c9dcbab74f3c6de18dbd1f2e07bc1c4a13" commit="6cf564922d7e536e7c7ad1204ea3431cb54c0603" commit_message="charger/bd99955.c: Simplify flow in console_command_bd99955 It looks to static analyzers as if the variable val could be used without being initialized. That isn't actually the case because of all the checks that are being done, but the flow can be simplified to only get the value to write when we're on the write path. BRANCH=None TEST=Build and boot Reef BUG=None Change-Id: I9f6ce3c9dcbab74f3c6de18dbd1f2e07bc1c4a13 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368302 Reviewed-by: David Hendricks <dhendrix@chromium.org> " fail_count="0" gerrit_number="368302" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/02/368302/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="I2a5bdd0e98d029bcd45ac9537df2393709da1f86" commit="acdcc63fdb6160c37d41e63b222a39422f1f7832" commit_message="CHROMIUM: arm64: dts: rockchip: Add rk3399-gru-kevin-r6.dts We've changed the dvfs range for kevin-r6 and we expect that the next gru (gru-r2) will have the same range. Therefor make that range the default for rk3399-gru and adjust all old revs for the old range (with the assumption that support for most old revs will eventually be dropped). BUG=chrome-os-partner:54888 TEST=dtc Change-Id: I2a5bdd0e98d029bcd45ac9537df2393709da1f86 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368349 Reviewed-by: David Schneider <dnschneid@chromium.org> " fail_count="3" gerrit_number="368349" owner_email="dianders@chromium.org" pass_count="0" patch_number="3" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/49/368349/3" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="Id1391e4b93f75e836e20517bb567886f7e9b8244" commit="1cfabda48d7b98a16226e695ca84a4591fd455f6" commit_message="security_StatefulPermissions: Allow android kernel log The android kernel log is saved to /var/log and owned by the "android-root" user. Allow that file to exist in this test. BUG=chrome-os-partner:636001 TEST=this test. Change-Id: Id1391e4b93f75e836e20517bb567886f7e9b8244 Signed-off-by: Dylan Reid <dgreid@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/367942 Reviewed-by: Brian Norris <briannorris@chromium.org> " fail_count="0" gerrit_number="367942" owner_email="dgreid@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/42/367942/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I8ba181f80277d76a304142ab9dc3d5ea2caf91f9" commit="9a4278d2ef0559941bcec158089ab38cc576e018" commit_message="login: Pass CHROMEOS_USER=id to start-arc-instance receivers One of the receivers (arc-setup.conf, CL:*272876) will use the ID to generate a fake hardware ID. session_manager already passes CHROMEOS_USER when emitting start-user-session signal, and this CL does the same for start-arc-instance. BUG=b:30485204 TEST=cros_run_unit_tests --board=$BOARD --packages chromeos-login Change-Id: I8ba181f80277d76a304142ab9dc3d5ea2caf91f9 Reviewed-on: https://chromium-review.googlesource.com/366050 Commit-Ready: Yusuke Sato <yusukes@chromium.org> Tested-by: Yusuke Sato <yusukes@chromium.org> Reviewed-by: Dan Erat (OOO 8-12 to 8-22) <derat@chromium.org> " fail_count="0" gerrit_number="366050" owner_email="yusukes@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/50/366050/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I74288465587ccf7185cec717f7c1810602361b8c" commit="91f033904fc670264f64cf300e26e26c85cd8012" commit_message="mkbp_event: Allow host to report sleep state for non-wake event skipping Allow the host to self-report its sleep state through EC_CMD_HOST_SLEEP_EVENT, which will typically be sent with SUSPEND param when the host begins its sleep process. While the host has self-reported that it is in SUSPEND, don't assert the interrupt line, except for designated wake events. BUG=chrome-os-partner:56156 BRANCH=None TEST=On kevin, run 'ectool hostsleepstate suspend', verify that interrupt assertion is skipped for battery host event. Run 'ectool hostsleepstate resume' and verify interrupt is again asserted by the battery host event. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I74288465587ccf7185cec717f7c1810602361b8c Reviewed-on: https://chromium-review.googlesource.com/368391 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> " fail_count="0" gerrit_number="368391" owner_email="shawnn@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/91/368391/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ie552f2ff74df05750bd65b6344d8a80cc285f8b0" commit="2141c792218f669d614c38824d8746b98500ab56" commit_message="tcpm/anx74xx: initialize reg variable before use When disabling auto_good_crc, the reg variable was being used without initialization. Mirror the code for enabling auto_good_crc to set the variable. TEST=Booted reef with updated code. BUG=None BRANCH=None Change-Id: Ie552f2ff74df05750bd65b6344d8a80cc285f8b0 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/368221 Reviewed-by: David Hendricks <dhendrix@chromium.org> " fail_count="0" gerrit_number="368221" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/21/368221/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I5813fd26fa8120742544567c5ae04af01f993f94" commit="a94a4df1ddbe567de5d295f8b5b242ec7d27f0d8" commit_message="Makefile.toolchain: Add error if make version will not build the EC If you try to build the EC codebase with GNU make version 3.81 or less, you currently get an error: Makefile.rules:286: *** multiple target patterns. Stop. Since this message isn't helpful in letting you know that the version of make needs to be updated, let's print something more useful. ERROR: GNU make version 3.82 or higher required. Stop. TEST=Built with Make 3.81 and saw the new error message. Built with make 3.82 and 4.0 and the EC built correctly. BRANCH=None BUG=None Change-Id: I5813fd26fa8120742544567c5ae04af01f993f94 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/367944 Reviewed-by: David Hendricks <dhendrix@chromium.org> " fail_count="0" gerrit_number="367944" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/44/367944/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I30c0e00c704d529ebb1767724ee059f1d9a6906d" commit="00133d7da94d533be456f2572b66e85b621609f8" commit_message="[autotest] Remove unused arguments from create_host() calls. Many of the callers to hosts.create_host() pass settings for parameters named 'initialize' and 'auto_monitor'. The parameters are fictitious, and appear nowhere in source except for these calls. This removes the bogus parameter settings. BUG=None TEST=run_suite with the push_to_prod test suite. Change-Id: I30c0e00c704d529ebb1767724ee059f1d9a6906d Reviewed-on: https://chromium-review.googlesource.com/368420 Commit-Ready: Richard Barnette <jrbarnette@chromium.org> Tested-by: Richard Barnette <jrbarnette@chromium.org> Reviewed-by: Dan Shi <dshi@chromium.org> " fail_count="0" gerrit_number="368420" owner_email="jrbarnette@chromium.org" pass_count="0" patch_number="4" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/20/368420/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="Ib71da0ffd6c88967ee0134dc595ea995bea3a9e9" commit="fe1a14b418f921b7cc7640c1c76d1584115b499e" commit_message="FIXUP: CHROMIUM: TPM: log "gentle shutdown" notice on all platforms. We logged this on x86 only, thus making kernel_TPMPing fail on ARM. BUG=chromium:351054 TEST=none BRANCH=none Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Original-Change-Id: I0dab38bd87e6d925bda6b5302b8f8b1014e84a75 Originally-Reviewed-on: https://chromium-review.googlesource.com/189449 Tested-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Commit-Queue: Luigi Semenzato <semenzato@chromium.org> [This wasn't picked into v3.14, etc.; I guess no one is running kernel_TPMPing ?] TEST=kernel_TPMPing BUG=chromium:634341 Change-Id: Ib71da0ffd6c88967ee0134dc595ea995bea3a9e9 Fixes: d479a0935525 ("CHROMIUM: workaround for Infineon TPM defensive timeout (v2)") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/366182 Commit-Ready: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> " fail_count="0" gerrit_number="366182" owner_email="briannorris@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/82/366182/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I99e2ae28a9c5fe8e6849c7753bc4e219eaac5f04" commit="1ad480842034b4d16b869c5764f9d49bbca4ab92" commit_message="reef : disable touchscreen wake Disabling this should allow the elan touchscreen driver to send the sleep command to the touchscreen on system suspend. Signed-off-by: Benson Leung <bleung@chromium.org> BUG=chrome-os-partner:55988 TEST=Test S3 power consumption. Check that touchscreen power comes way down during suspend. Change-Id: I99e2ae28a9c5fe8e6849c7753bc4e219eaac5f04 Reviewed-on: https://chromium-review.googlesource.com/367710 Commit-Ready: Benson Leung <bleung@chromium.org> Tested-by: Benson Leung <bleung@chromium.org> Reviewed-by: Charlie Mooney <charliemooney@chromium.org> " fail_count="0" gerrit_number="367710" owner_email="bleung@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/board-overlays" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/board-overlays" ref="refs/changes/10/367710/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ib795ad5e02257ae96decd2b956765596791c82b9" commit="0bfbbd58e369eb61f1c46091d9be4942ddcd3a92" commit_message="Add DO-NOT-USE.txt notice to the repo Add DO-NOT-USE.txt to notify users not to submit new firmware to this project. BUG=none TEST=none Change-Id: Ib795ad5e02257ae96decd2b956765596791c82b9 Reviewed-on: https://chromium-review.googlesource.com/368100 Commit-Ready: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org> " fail_count="0" gerrit_number="368100" owner_email="wnhuang@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/marvell" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/marvell" ref="refs/changes/00/368100/1" remote="cros" total_fail_count="0"/><lkgm version="8699.0.0-rc2"/></manifest> |
