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| <pending_commit branch="chromeos-2016.05" change_id="I86684044fc282eaa8deda2b5dbd8ab6cae095d72" commit="bbb6d7a530cf603d2c96fe8ef39bb10e703f19ef" commit_message="UPSTREAM: soc/intel/quark: Return NULL for top_of_memory Return NULL for top_of_memory when the register has not been set. TEST=Build and run on Galileo Gen2 Change-Id: I86684044fc282eaa8deda2b5dbd8ab6cae095d72 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 6edb3140501ad6ad4224e9c79e7d63b8af970466 Original-Change-Id: If79cac68c2a64aa9bf3be72d3cfc4c73fceef12b Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18802 Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: Martin Roth <martinroth@google.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455822 " fail_count="0" gerrit_number="455822" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/22/455822/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="I945b0dbcb4c493863a196b5449494a4ceb38698d" commit="47c356663f6f141f9422c04a57ffbcec8f2f3806" commit_message="UPSTREAM: soc/intel/quark: Add ESRAM display to FSP 1.1 Add ESRAM display to FSP 1.1 TEST=Build and run on Galileo Gen2 Change-Id: I945b0dbcb4c493863a196b5449494a4ceb38698d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 66b0d55d326540e400ad3fa5130666dbd03b9694 Original-Change-Id: Ia47b0bdba65606a7f0695332d298fc1e910b0e2f Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18804 Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455823 " fail_count="0" gerrit_number="455823" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/23/455823/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Icd837562ee4ace32219296013f0fd818ba74ab07" commit="b023dbe3c716e25c09e06a7101ebacc19ae6e976" commit_message="UPSTREAM: soc/intel/quark: Pass S3 wake status to fsp_silicon_init Fix build error with FSP 1.1. Pass the S3 wake status to fsp_silicon_init. TEST=Build and run on Galileo Gen2 Change-Id: Icd837562ee4ace32219296013f0fd818ba74ab07 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1e24bf3f719f82c16fd577e87900e1aa0fd6605b Original-Change-Id: I78150f737321db5b1b4d63b411fa6432ac30d080 Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18805 Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: Martin Roth <martinroth@google.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455824 " fail_count="0" gerrit_number="455824" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/24/455824/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="If438b4acac2c509c7f22d9cc2470a014560bb00e" commit="f2cb2c759a9ebda386615a605f3c9c9709c8ab51" commit_message="UPSTREAM: libpayload: usbhub: Force enumeration of all connected ports on init We have found a non-compliant USB hub (RealTek RTS 5413) that does not set a port's Connect Status Change bit on its USB 3.0 half if the port had already been connected while the hub was being reset. To work around this bug, this patch adds code to initially request the status of every port after a hub was enumerated, clear the Connect Status Change bit if set, and then enumerate the port iff it is currently connected, regardless of whether the change bit was set. A similar behavior can also be found in the Linux kernel. BRANCH=oak BUG=b:35929438 TEST=Booted Elm with this change, my USB 3.0 sticks enumerate now even if they had been plugged in since boot. Change-Id: If438b4acac2c509c7f22d9cc2470a014560bb00e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5fae8294104ae62353466298fae493e717056a28 Original-Change-Id: I8a28252eb94f005f04866d06e4fc61ea265cee89 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18729 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/455825 " fail_count="0" gerrit_number="455825" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/25/455825/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="If06c124f5ce9bff0d843abc21c20c21c1a21ab61" commit="61add72652cd739ad0f26e1dd00fd551d7e35e09" commit_message="UPSTREAM: mainboard/google/reef: Add FPF_STATUS FMAP region Add FPF_STATUS region under MISC_RW. The purpose of the region is to store FPF status. BUG=none BRANCH=none TEST=none Change-Id: If06c124f5ce9bff0d843abc21c20c21c1a21ab61 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 2e726f605de73ed1c45efb678366861723b19b62 Original-Change-Id: I2997b3d39a94bf444df51068f254edcf49c47afd Original-Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Original-Reviewed-on: https://review.coreboot.org/18773 Original-Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455826 " fail_count="0" gerrit_number="455826" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/26/455826/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Ida11aa2c7dc47dc791162af12bbe1a7e59de1ff1" commit="4e8a5f4bfe1e6102221289aa69983ce3549a4abf" commit_message="UPSTREAM: soc/intel/apollolake: Cache FPF status value in flash Since asking CSE to read FPF status turned out to be slow in some cases, cache and save returned value on first boot only. Value is read from flash on consequent boots. BUG=b:35586975 BRANCH=reef TEST=boot twice, make sure cached FPF status is loaded from flash the second time. Change-Id: Ida11aa2c7dc47dc791162af12bbe1a7e59de1ff1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: c5f3685f4486a875c0957b713932e241c46ea537 Original-Change-Id: I6e56a35407c9097616ccb05a557fded7b639c88a Original-Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Original-Reviewed-on: https://review.coreboot.org/18774 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455827 " fail_count="0" gerrit_number="455827" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/27/455827/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="If82533a86037d743c997cd6a042b4eca9bcbe856" commit="cfd36f85f3e190a155798b280b7179e125b97d8e" commit_message="UPSTREAM: soc/intel/common: Wrap lines at 80 columns Fix the following error detected by checkpatch.pl: ERROR: code indent should use tabs where possible TEST=Build and run on Galileo Gen2 Change-Id: If82533a86037d743c997cd6a042b4eca9bcbe856 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 006d73d2e224a06736e6a43b4109a3e70d344241 Original-Change-Id: Ief4b96073b3df30e45bf5d802ca3b190e7f431a7 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18753 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455828 " fail_count="0" gerrit_number="455828" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/28/455828/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="I8ab29cc0451e98c34eff060eb325dbb351fd50af" commit="b987ec01a696ef5f24334061465fc708fd322e25" commit_message="UPSTREAM: src/lib: Move assignment out of if condition Fix the following error detected by checkpatch: ERROR: do not use assignment in if condition TEST=Build and run on Galileo Gen2 Change-Id: I8ab29cc0451e98c34eff060eb325dbb351fd50af Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 491c5b60d01d5fa7d27c281335343e67519e799c Original-Change-Id: I5a08d1647db66bd5d480f81e90d473999c222acf Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18761 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455829 " fail_count="0" gerrit_number="455829" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/29/455829/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Iec5a6af53d53d9d96c60c3fc7b70d4e20bcef1fc" commit="e9dcffb27bdcf42b6b62d3121f96578d4ad174bf" commit_message="UPSTREAM: src/lib: Clean up general issues found by checkpatch.pl Fix the following errors and warnings detected by checkpatch.pl: ERROR: Bad function definition - void init_timer() should probably be void init_timer(void) ERROR: Prefixing 0x with decimal output is defective WARNING: Comparisons should place the constant on the right side of the test WARNING: char * array declaration might be better as static const TEST=Build and run on Galileo Gen2 Change-Id: Iec5a6af53d53d9d96c60c3fc7b70d4e20bcef1fc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 36984d85e758bd7b280a835c5c6e5c68b10e82b6 Original-Change-Id: I9f618eea95e1f92fa34f4f89da27c0b16ae7f4ee Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18763 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455830 " fail_count="0" gerrit_number="455830" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/30/455830/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="I236241e92774d323475f2baf4f6d527142f9ae67" commit="fe98b0369fafd980af69b065f35b70efe67a43f7" commit_message="UPSTREAM: soc/intel/quark: Read the rmu.bin file from read-only region Always read the rmu.bin file from the read-only section of the SPI flash. Without this change vboot attempts to read this file from the A or B section of the flash. TEST=Build and run on Galileo Gen2 Change-Id: I236241e92774d323475f2baf4f6d527142f9ae67 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 70bb05715ad0fa8edecb2185e1c1373c76ee2128 Original-Change-Id: Ied8eaa2cd37645bf401aa957936943946bfd6182 Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18803 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455831 " fail_count="0" gerrit_number="455831" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/31/455831/2" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="I83bed6c31afb22f045f674fd8d523039bcddc9f5" commit="9af132759757ebbe861b54de332da417722e1be2" commit_message="UPSTREAM: siemens/mc_apl1: Clean up the code This patch make some general adaptations in relation to commit 6a489237 (mainboard/intel/leafhill: Clean up). - add necessary defaults to Kconfig - remove irrelevant entries from FMD file - include romstage file for better understanding BUG=none BRANCH=none TEST=none Change-Id: I83bed6c31afb22f045f674fd8d523039bcddc9f5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0853055ef7642ef1bff6beeb8a3f3348343e4d44 Original-Change-Id: I190d648a7ffeca11acc6560db85ff03c78e85b21 Original-Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Original-Reviewed-on: https://review.coreboot.org/18808 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Andrey Petrov <andrey.petrov@intel.com> Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/455842 " fail_count="0" gerrit_number="455842" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/42/455842/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7eb5184f30d03e8cc1be0f0e030b5c810cac18d6" commit="36d0ea489af566f2b07e079792879d52ef7f2cf8" commit_message="UPSTREAM: AGESA f14: Fix infinite loop Fix regression after commit: 22f32c7 cpu/amd/agesa: Unify init files BUG=none BRANCH=none TEST=none Change-Id: I7eb5184f30d03e8cc1be0f0e030b5c810cac18d6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7f3741840c68679db36d359c9c96dad48af63536 Original-Change-Id: I36fb7369084c68577df69abc251c84dad64f7015 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/18822 Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/455843 " fail_count="0" gerrit_number="455843" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/43/455843/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If1600c8d14e3a920e9f4eb1ec1e3dd62a75349c0" commit="5300f3b88d7d6ef1b8085c8011e8eb74fc5acfc6" commit_message="UPSTREAM: acpi: device: Add macro for active high level triggered IRQ Add the missing macro for ACPI_IRQ_LEVEL_HIGH so it can get used by devicetree when necessary. BUG=b:35585307 BRANCH=none TEST=Add rt5514 SPI device with active high level IRQ on Eve board and check that it is enumerated in the kernel Change-Id: If1600c8d14e3a920e9f4eb1ec1e3dd62a75349c0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7273e183992793f5ec3f255ddec77219c991d32a Original-Change-Id: I25c7b035a198efb218f0f6b4ba3f4a1bf532bcea Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18815 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/455844 " fail_count="0" gerrit_number="455844" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/44/455844/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I428bcfc49875e46de307fb204fe9e5300d3bff5c" commit="622a156e3a35a53ddccc760561759d3eb64ae558" commit_message="UPSTREAM: intel/skylake: nhlt: Add support for rt5514 NHLT blob Add support for describing the NHLT blob for the rt5514 DSP. Currently this only supports 4 channel capture. BUG=b:35585307 BRANCH=none TEST=build and boot on Eve P1 Change-Id: I428bcfc49875e46de307fb204fe9e5300d3bff5c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4a75a66d67ee465749eafe8a5128e0c54675c708 Original-Change-Id: Ib59b56222f9aa65370fdcf9ddf25145c571b1b2e Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18816 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/455845 " fail_count="0" gerrit_number="455845" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/455845/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0ad047f30298f17df807715ac97d8311c0a74985" commit="7af35d7ebd0a4ff50f8b5d1ad352b97149f01cfe" commit_message="UPSTREAM: google/eve: Use rt5514 instead of 4ch DMIC On this platform the DMICs are connected to the rt5514 DSP instead of directly connected to the SOC. Use the new rt5514 NHLT blob instead of the 4ch DMIC blob and add the required I2C and SPI entries in devicetree so this can get probed properly. BUG=b:35585307 BRANCH=none TEST=build and boot on Eve P1 and check for rt5514 driver enumerated by the kernel Change-Id: I0ad047f30298f17df807715ac97d8311c0a74985 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 2661a9f517dd2abe72728f21feaacca99b5089cc Original-Change-Id: I0f2cb532771ee1857df7f33c52a96acf96dc1f54 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18817 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/455846 " fail_count="0" gerrit_number="455846" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/46/455846/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7282b870cc4e6a6192f95239b8e5abc0cd63e7af" commit="6f6cf0cc43fe52db1d26ca3603e5737d0e68c6d9" commit_message="UPSTREAM: intel/skylake: Fix bug in VR configuration with FSP 2.0 With the move to FSP 2.0 the number of VR types supported was reduced to 4, and the VR_RING type is no longer present. This means all existing boards using FSP 2.0 are incorrectly passing VR configuration into FSP as the values corresponding to "GT Sliced" and "GT Unsliced" have changed. Fix this by updating the skylake SOC VR handling to account for changes in the FSP configuration and no longer provide VR_RING type when using FSP 2.0. BUG=b:36228330 BRANCH=none TEST=manual: build and boot on Eve Change-Id: I7282b870cc4e6a6192f95239b8e5abc0cd63e7af Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4fa8a6f4fefe04eaa1579c03d36abf0fbc9a27f7 Original-Change-Id: I59eea9fba006a4c235d7b42d07fdc6e4f44f7351 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18818 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/455847 " fail_count="0" gerrit_number="455847" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/47/455847/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0c34f14c4354e567dd750873ac1c50e6ecfc5fe9" commit="8e828564ddbdc385e336c9dea23f9250dba75d17" commit_message="UPSTREAM: intel/skylake: Support for setting AC/DC loadline Add options to set the AC and DC loadline values for each supported VR type so these can be tuned on a per-board basis in devicetree.cb. BUG=b:36228330 BRANCH=none TEST=Build and boot on Eve and check debug FSP output to ensure that it is applying the provided loadline values Change-Id: I0c34f14c4354e567dd750873ac1c50e6ecfc5fe9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 86db46987176b6e78852d62042046e4af458e71a Original-Change-Id: I2a5533d2c9fd86351c86584e3738e80ac4c1f915 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18819 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/455848 " fail_count="0" gerrit_number="455848" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/48/455848/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2a78f75dea7f4fce2fb8d9c4adf0090782c0171f" commit="4393976530f730e3deba6ada924ebc0c2421f6ef" commit_message="UPSTREAM: google/eve: Apply default AC/DC loadline settings Set the AC and DC loadline values based on the KBL-Y 2+2 defaults that are applied by FSP. These will be tuned later and are exposed as defaults so the engineers know what to start with. BUG=b:36228330 BRANCH=none TEST=Build and boot on Eve and check debug FSP output to ensure that it is applying the provided loadline values Change-Id: I2a78f75dea7f4fce2fb8d9c4adf0090782c0171f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 57e9e3be5fe3a68c8ccedc85e673f091aaf8ff58 Original-Change-Id: Ieae4f2b201d8210e75bdb9438070a3a2e1fda6b7 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18820 Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/455849 " fail_count="0" gerrit_number="455849" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/49/455849/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9bb2dfe49e0396a406fb807438ae7a8f125bb7a1" commit="7b9b0dcbc3c0a0b961ff1a28cc27a47c58116aaa" commit_message="UPSTREAM: google/eve: Update MCU GPIOs configuration Keep the BOOT0 pin triggering the MCU bootloader as an input, so the Servo debug board doesn't have to fight with the PCH to program it, the net already has an external pull-down to ensure that the MCU is in normal mode at boot. By default, do not drive the FP sensor reset from the PCH, the MCU is now managing the reset line (but the PCH still has a connection on the current boards). BRANCH=none BUG=b:36025702 TEST=manual testing, program the MCU through a Servo v2 board, and use the FP sensor through the MCU and verify it is not stuck under reset. Change-Id: I9bb2dfe49e0396a406fb807438ae7a8f125bb7a1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 08824ec8d4d68ffa9edf1212e7f7e281da4d779f Original-Change-Id: I19113b5d78013d0ab6ec5a72c6f71dd4c67a88e8 Original-Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Original-Reviewed-on: https://review.coreboot.org/18830 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/455850 " fail_count="0" gerrit_number="455850" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/50/455850/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2e1797473a821b9fc9a20c6c433c50945bf60eae" commit="0c506ec80f352cbe92b5f5f2b3d7ad88886c5dda" commit_message="UPSTREAM: drivers/i2c/tpm: Fix issues detected by checkpatch Fix the following warnings detected by checkpatch.pl: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: braces {} are not necessary for single statement blocks WARNING: Unnecessary parentheses - maybe == should be = ? WARNING: line over 80 characters WARNING: missing space after return type TEST=Build and run on Galileo Gen2 Change-Id: I2e1797473a821b9fc9a20c6c433c50945bf60eae Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 52ab30b13b867c1f3cd5aa5d9eb3e24d430c49d5 Original-Change-Id: I56f915f6c1975cce123fd38043bad2638717d88c Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18832 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455851 " fail_count="0" gerrit_number="455851" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/51/455851/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I908d0e64230f861230bd3bfe3d3c0459b894a6c6" commit="f9b8c7733d58fc7da3e5ef7d445b3834eaa014eb" commit_message="UPSTREAM: drivers/i2c/tpm: Add TPM (TIS) debugging support Add debugging support for the TIS transactions for the I2C TPM chips. TEST=Build and run on reef Change-Id: I908d0e64230f861230bd3bfe3d3c0459b894a6c6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e0668e4e1f3b2f47e474f870bb5d72a488e43504 Original-Change-Id: Ibc7e26fca781316d625f4da080f34749f18e4f9b Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18799 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/455852 " fail_count="0" gerrit_number="455852" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/52/455852/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia98801459d48f33d8ec1c3f616b533e4589aafd1" commit="2b33902ab70052f232c5048ce5421c3683efe826" commit_message="UPSTREAM: drivers/i2c/tpm: Add support for Atmel TPM (AT97SC3204) The I2C interface for the Atmel AT97SC3204 TPM varies greatly from the existing I2C TPM support. The Atmel part just passes the commands and responses from the TIS layer across the I2C interface. TEST=Build and run on Galileo Gen2 with Crypto Shield and vboot enabled Change-Id: Ia98801459d48f33d8ec1c3f616b533e4589aafd1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1b39f176a9bbce85791440745dcbdad629b79373 Original-Change-Id: Ib2ef0ffdfc12b2fc11fe4c55b6414924d4b676dd Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18800 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455853 " fail_count="0" gerrit_number="455853" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/53/455853/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2c19368819bc4e5794a4bb6b9dbd4f0790da6e48" commit="1688813cf4dcf7e813750ea525e7cda97310de9e" commit_message="UPSTREAM: mainboard/intel/galileo: Add vboot support Add the necessary files and changes to support vboot. TEST=Build and run on Galileo Gen2 with a SparkFun CryptoShield 1. Obtain and install a SparkFun CryptoShield. https://www.sparkfun.com/products/13183 2. Edit src/mainboard/intel/galileo/Kconfig to select VBOOT_WITH_CRYPTO_SHIELD 3. Use make menuconfig to update the config values and select a payload that will fit. I used SeaBIOS which does not boot. 4. Build coreboot 5. Use the command file below to generate the signed coreboot image. 6. Flash build/coreboot.rom onto the Galileo board 7. The test is successful if verstage detects that it needs recovery after Phase 1. This is expected because the image does not contain the GBB section. 8. Flash build/coreboot.signed.bin onto the Galileo board 9. The test is successful if verstage reaches Phase 4 and selects SLOT A to load the rest of the files. commands: gbb_utility -c 0x100,0x1000,0x7ce80,0x1000 gbb.blob dd conv=fdatasync ibs=4096 obs=4096 count=1553 \ if=build/coreboot.rom of=build/coreboot.signed.rom dd conv=fdatasync obs=4096 obs=4096 seek=1553 if=gbb.blob \ of=build/coreboot.signed.rom dd conv=fdatasync ibs=4096 obs=4096 skip=1680 seek=1680 \ count=368 if=build/coreboot.rom of=build/coreboot.signed.rom gbb_utility \ --set --hwid='Galileo' \ -r $PWD/keys/recovery_key.vbpubk \ -k $PWD/keys/root_key.vbpubk \ build/coreboot.signed.rom 3rdparty/vboot/scripts/image_signing/sign_firmware.sh \ build/coreboot.signed.rom \ $PWD/keys \ build/coreboot.signed.rom Change-Id: I2c19368819bc4e5794a4bb6b9dbd4f0790da6e48 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 28c3f23b4627966b2112feaedc228977c4425a87 Original-Change-Id: I02eb0ef647cd34c13a5fe8be0bdbe1bb38524d0c Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18821 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455854 " fail_count="0" gerrit_number="455854" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/54/455854/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I800b829d82546f5f4f34c3ffc64ae2ece0b22811" commit="e1f0765a398a5062f98669b6343876f811947f71" commit_message="UPSTREAM: src/cpu/x86: Remove space between * and variable name Fix the following error detected by checkpatch.pl: ERROR: "foo * bar" should be "foo *bar" TEST=Build and run on Galileo Gen2 Change-Id: I800b829d82546f5f4f34c3ffc64ae2ece0b22811 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5f94541329eddb531605c32d73467c46b9d707df Original-Change-Id: I8b5342df3f42dbb4576aecf5b0a59f195ae8511e Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18839 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/455855 " fail_count="0" gerrit_number="455855" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/55/455855/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibff31d4011e7457c198b102afea9a7e8aed6aa11" commit="71187365581990ffeb4d042dbb5d71dfa16451b3" commit_message="UPSTREAM: cpu/x86: Fix various issues detected by checkpatch.pl Fix the following errors and warning detected by checkpatch.pl: ERROR: spaces required around that '=' (ctx:VxV) ERROR: space prohibited after that open parenthesis '(' ERROR: need consistent spacing around '|' (ctx:WxV) ERROR: need consistent spacing around '|' (ctx:VxW) ERROR: spaces required around that '=' (ctx:VxV) ERROR: spaces required around that '==' (ctx:VxV) ERROR: spaces required around that ':' (ctx:ExV) WARNING: space prohibited between function name and open parenthesis '(' TEST=Build and run on Galileo Gen2 Change-Id: Ibff31d4011e7457c198b102afea9a7e8aed6aa11 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 8bad6d2f90ba852f9728726fcda0e6b912cae631 Original-Change-Id: I61d08055b207c607d5b7d72b0094ad8e24fbd106 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18840 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456236 " fail_count="0" gerrit_number="456236" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/36/456236/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iac22e8fea19724d9ca43a96b67902b4e19018c0f" commit="2bf430e5337f11c9e2a17047bdaeeeeab3c7dd56" commit_message="UPSTREAM: cpu/x86: Use tabs for indent Fix the following error and warning detected by checkpatch.pl: ERROR: code indent should use tabs where possible WARNING: please, no spaces at the start of a line TEST=Build and run on Galileo Gen2 Change-Id: Iac22e8fea19724d9ca43a96b67902b4e19018c0f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a07d0ddc44a3460e8ce8b84d34335d230ab98906 Original-Change-Id: Ie6e4dd4c3eb0d2c44ecd008740dfc348d496fe78 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18841 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456237 " fail_count="0" gerrit_number="456237" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/37/456237/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Icab33fe1dc3080d5c98cbcec1993364a06e51c5b" commit="64b7027ceb9553529c8e694409a7d1ce7707f5d2" commit_message="UPSTREAM: cpu/x86: Remove braces and else if unnecessary Fix the following warnings detected by checkpatch.pl WARNING: braces {} are not necessary for single statement blocks WARNING: braces {} are not necessary for any arm of this statement WARNING: else is not generally useful after a break or return TEST=Build and run on Galileo Gen2 Change-Id: Icab33fe1dc3080d5c98cbcec1993364a06e51c5b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a15d8af140528df440617c074136d32be28e4976 Original-Change-Id: I2d6b22c66d52f5f2d24b15270ad4b52894adebc2 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18842 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456238 " fail_count="0" gerrit_number="456238" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/38/456238/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I068dd20c4cbfdfb8b7a0703c3711582eaa884743" commit="f629879bc3a519452d28cd962fa468b06eb17170" commit_message="UPSTREAM: cpu/x86: Add int to unsigned Fix the following warning detected by checkpatch.pl: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' TEST=Build and run on Galileo Gen2 Change-Id: I068dd20c4cbfdfb8b7a0703c3711582eaa884743 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 8ca9a21a43ccc73b3f289affd2384805ec98eb81 Original-Change-Id: I97bbe8ba19680bdb99fa38daa5e18b440c338576 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18843 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456239 " fail_count="0" gerrit_number="456239" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/39/456239/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7805a5121d572e07ebb155eca1f7d75efaf13f94" commit="cacf74b7c1515b9de325cd7b20a9caac31dcaf9f" commit_message="UPSTREAM: cpu/x86: Wrap lines at 80 columns Fix the following warning detected by checkpatch.pl: WARNING: line over 80 characters TEST=Build and run on Galileo Gen2 Change-Id: I7805a5121d572e07ebb155eca1f7d75efaf13f94 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: c5917079eb81b10c58cd3e7bfe6b3925baaf9241 Original-Change-Id: I56ea28826963403dc0719f40c13782c56dc97feb Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18844 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456240 " fail_count="0" gerrit_number="456240" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/40/456240/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia707c6e3a6b65f12d3b1e60510b4a99bc24ea83d" commit="9911b158ab1effc77997491f9f35e0c1834cc12a" commit_message="UPSTREAM: cpu/x86: Fix misc. remaining issues detected by checkpatch Fix the following error and warnings detected by checkpatch.pl: ERROR: trailing statements should be on next line WARNING: storage class should be at the beginning of the declaration WARNING: type 'long unsigned int' should be specified in [[un]signed] [short|int|long|long long] order TEST=Build and run on Galileo Gen2 Change-Id: Ia707c6e3a6b65f12d3b1e60510b4a99bc24ea83d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: dfc8a560d7fec715a652f428dc3cab3e0a92c680 Original-Change-Id: I9cfe42cf1836cfd40ffcf67237c818543f508feb Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18845 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456241 " fail_count="0" gerrit_number="456241" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/41/456241/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Icb5c8dc05bb977313235c46d6eb09a821b9450c5" commit="94dbaf9966b78655da34cb6caa286bd9a741316f" commit_message="UPSTREAM: cpu/intel: Indent with tabs Fix the following error and warning detected by checkpatch.pl: ERROR: code indent should use tabs where possible WARNING: please, no space before tabs TEST=Build and run on Galileo Gen2 Change-Id: Icb5c8dc05bb977313235c46d6eb09a821b9450c5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7b5f12b9b2695359b6ccb4d62bdb868166c7f8d1 Original-Change-Id: I5bcd82561ef5856e99055d46528dcf3a283d2310 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18846 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456242 " fail_count="0" gerrit_number="456242" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/42/456242/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I8307c37acfeccbd48274beaa772533ec31b718cd" commit="b0585a33f7c270e525fa963f31d2c54bbc211d41" commit_message="UPSTREAM: cpu/intel: Fix the spacing issues Fix the following errors and warnings detected by checkpatch.pl: ERROR: spaces required around that '=' (ctx:VxV) ERROR: space required after that ',' (ctx:VxV) ERROR: space prohibited after that open parenthesis '(' ERROR: space prohibited before that close parenthesis ')' ERROR: need consistent spacing around '-' (ctx:WxV) ERROR: spaces required around that '>' (ctx:VxV) ERROR: need consistent spacing around '>>' (ctx:WxV) ERROR: need consistent spacing around '<<' (ctx:VxW) ERROR: spaces required around that '||' (ctx:VxV) ERROR: "foo * bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" WARNING: space prohibited between function name and open parenthesis '(' WARNING: storage class should be at the beginning of the declaration TEST=Build and run on Galileo Gen2 Change-Id: I8307c37acfeccbd48274beaa772533ec31b718cd Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9d62e7e75e43d6737df9d0ab5603446d7f5e408d Original-Change-Id: I6602fbc8602171ab6c2f3b6c204558ad2c811179 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18847 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456243 " fail_count="0" gerrit_number="456243" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/43/456243/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I73d859ce18027e954ed8fad5ef5c359d0c0cef73" commit="30e2fc1fe678ad125109926fc16e4f5eb2587d90" commit_message="UPSTREAM: mainboard/google/reef: Increase PL2 Max to 15W Update the DPTF parameters based on thermal test result. (ZHT_DPTF_DVT_v0.6_20170314.xlsx) 1. Increase PL2 Max to 15W. BUG=b:35583586 BRANCH=reef TEST=build and verify PL2 Max value on electro dut Change-Id: I73d859ce18027e954ed8fad5ef5c359d0c0cef73 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4239ff37b7711bd81bc5ab96bb135b3c977aa2b5 Original-Change-Id: I13167e28267d5827d79a6bde31f077a01f2bd535 Original-Signed-off-by: Tim Chen <Tim-Chen@quantatw.com> Original-Reviewed-on: https://review.coreboot.org/18807 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/456244 " fail_count="0" gerrit_number="456244" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/44/456244/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I48858d8d7a2ace1f719ba46b5cb5f7751a9a8518" commit="c5b15f999c9644a0d520532985f54e7f98efa838" commit_message="UPSTREAM: cpu/intel: Add int to unsigned Fix the following warning detected by checkpatch.pl: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' TEST=Build and run on Galileo Gen2 Change-Id: I48858d8d7a2ace1f719ba46b5cb5f7751a9a8518 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 73a28942031675fce20d6649d2c2ce66fe62f416 Original-Change-Id: I207713a3370e5a9abed4535187aa2aaeef502d6f Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18848 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456245 " fail_count="0" gerrit_number="456245" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/456245/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I19682d7da511d778cb2c9c41b9d2cb60e560e555" commit="bec5e60a544426a8a79054df3a3e713fb8cd1033" commit_message="UPSTREAM: cpu/intel: Fix brace issues detected by checkpatch.pl Fix the following error and warning detected by checkpatch.pl: ERROR: that open brace { should be on the previous line WARNING: braces {} are not necessary for single statement blocks TEST=Build and run on Galileo Gen2 Change-Id: I19682d7da511d778cb2c9c41b9d2cb60e560e555 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 26eeb0f8ad554b1fa08d58080da8ce2d22081c1c Original-Change-Id: Icdd6bd9ae578589b4d42002d200fa8f83920265e Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18849 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456246 " fail_count="0" gerrit_number="456246" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/46/456246/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iafab3ac126690df28f1fb3fff891219e8c156882" commit="cb003615b225c01ed7434c4839c834dc8b80e3a9" commit_message="UPSTREAM: cpu/intel: Wrap lines at 80 columns Fix the following warning detected by checkpatch.pl: WARNING: line over 80 characters TEST=Build and run on Galileo Gen2 Change-Id: Iafab3ac126690df28f1fb3fff891219e8c156882 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: cdc50480c414df3b5f438f7f26a73df597e544ae Original-Change-Id: I74f25da5c53bd518189ce86817d6e3385b29c3b4 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18850 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456247 " fail_count="0" gerrit_number="456247" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/47/456247/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5834753bf10fd542d699a52cd5fe7a8bb56b4b5d" commit="8e2ab2aa408164826d92b11c17323a5d785b94f7" commit_message="UPSTREAM: cpu/intel: Fix the remaining issues detected by checkpatch Fix the following error and warnings detected by checkpatch.pl: ERROR: switch and case should be at the same indent WARNING: Consecutive strings are generally better as a single string WARNING: static const char * array should probably be static const char * const TEST=Build and run on Galileo Gen2 Change-Id: I5834753bf10fd542d699a52cd5fe7a8bb56b4b5d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4dddda294f12c14d5e8310b84d1e9a60149e376a Original-Change-Id: I03d5d0d2db0d5e9b33c8ec807b236fe229bcc8f3 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/18851 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/456248 " fail_count="0" gerrit_number="456248" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/48/456248/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ief95e5ab773185b59276cf06d1efaa29f1212466" commit="cefd4a13edc9f98b72286b3ef2e5c0c7c157f1f7" commit_message="host_keyblock: Fix vb2_create_keyblock_external 939cc3a "futility: Use only vboot 2.0 APIs for keyblocks" introduced 2 subtle bugs, and we could still pass unit tests. Until we start adding more signing algorithms and sig_data_size != 0. BUG=chromium:611535 BRANCH=none TEST=make runtests Change-Id: Ief95e5ab773185b59276cf06d1efaa29f1212466 Reviewed-on: https://chromium-review.googlesource.com/448399 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> " fail_count="1" gerrit_number="448399" owner_email="drinkcat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/vboot_reference" project_url="https://chromium-review.googlesource.com/chromiumos/platform/vboot_reference" ref="refs/changes/99/448399/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Id7f0a248863aae2f41c2fa46fbb8a37848e707a9" commit="e8757d7dcfd3e15d8578dbcd3bd31c38e12a8812" commit_message="vbutil_keyblock: Force checking the signature if signpubkey is provided Previously, futility vbutil_keyblock --unpack would just ignore the error if the keyblock was not signed (but a signing public key was provided). This fix would have caught the regression introduced by 939cc3a "futility: Use only vboot 2.0 APIs for keyblocks" BUG=chromium:611535 BRANCH=none TEST=make runtests on m/master => fails TEST=make runtests with CL:448399 => succeeds Change-Id: Id7f0a248863aae2f41c2fa46fbb8a37848e707a9 Reviewed-on: https://chromium-review.googlesource.com/449058 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> " fail_count="2" gerrit_number="449058" owner_email="drinkcat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/vboot_reference" project_url="https://chromium-review.googlesource.com/chromiumos/platform/vboot_reference" ref="refs/changes/58/449058/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I56d22302c2254ef500b9d2d290a79d8c8bc39942" commit="0c6b202aa526d83f7f4f91aa74d7dc4e2c62fe70" commit_message="vboot_reference: Add support for 3072-bit exponent 3 keys This also adds the required tests (keys, testcases), and some additional tests in vb2_rsa_utility_tests.c that were not added when 2048-bit exponent 3 support was added. BRANCH=none BUG=chromium:684354 TEST=make runtests Change-Id: I56d22302c2254ef500b9d2d290a79d8c8bc39942 Reviewed-on: https://chromium-review.googlesource.com/449060 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> " fail_count="3" gerrit_number="449060" owner_email="drinkcat@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/vboot_reference" project_url="https://chromium-review.googlesource.com/chromiumos/platform/vboot_reference" ref="refs/changes/60/449060/2" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I2ac7e87941c847bb4e9bd376034e6539988d1743" commit="b96e23141e41f7b134c2021bb558f9c9c240fcc1" commit_message="hammer: Switch to RSA 3072 exp 3 key Increasing key length from 2048 bits to 3072 bits provides more security, at the cost of about 2.25x the amount of time being spent in verification (roughly 100ms instead of 45ms). CQ-DEPEND=CL:449060 BRANCH=none BUG=b:35582031 TEST=Flash hammer, verification succeeds. Change-Id: I2ac7e87941c847bb4e9bd376034e6539988d1743 Reviewed-on: https://chromium-review.googlesource.com/449023 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> " fail_count="3" gerrit_number="449023" owner_email="drinkcat@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/23/449023/2" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I8894965fbff1e9a82e0de7a8181580a429080044" commit="4f638d65630d153e3b6afcc40eb2f6c192358ecc" commit_message="pack_firmware.py: Use a local variable for arguments Before adding a lot more uses of arguments here, use a local variable to shorten and simplify the code. BUG=chromium:690573 TEST=PYTHONPATH=~/cosarm python pack_firmware_unittest.py PYTHONPATH=~/cosarm python pack_firmware_functest.py Change-Id: I8894965fbff1e9a82e0de7a8181580a429080044 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/452972 Reviewed-by: Dan Erat <derat@chromium.org> " fail_count="1" gerrit_number="452972" owner_email="sjg@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform/firmware" project_url="https://chromium-review.googlesource.com/chromiumos/platform/firmware" ref="refs/changes/72/452972/5" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ibf42f71d67e46441a1993748aec4a72ff28b8a3b" commit="d836dc881249e99100bb4f7a9fb78d495f516b36" commit_message="pack_firmware.py: Pass tool_base as a parameter Instead of reading this directly from the arguments in each function that needs it, pass it as a parameter. This clears the way for it to become a model-specific value in a later CL. BUG=chromium:690573 TEST=PYTHONPATH=~/cosarm python pack_firmware_unittest.py PYTHONPATH=~/cosarm python pack_firmware_functest.py Change-Id: Ibf42f71d67e46441a1993748aec4a72ff28b8a3b Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/452973 Reviewed-by: Dan Erat <derat@chromium.org> " fail_count="2" gerrit_number="452973" owner_email="sjg@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform/firmware" project_url="https://chromium-review.googlesource.com/chromiumos/platform/firmware" ref="refs/changes/73/452973/5" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I2222feb6b8c3f0a88196a6bab3b8e7afd3a373a0" commit="d8fec11f32426404efd1ece74fb3b4601a2b7a98" commit_message="pack_firmware.py: Pass tools as a parameter Instead of reading this directly from the arguments in _CopyBaseFiles(), pass it as a parameter. This clears the way for it to become a model-specific value in a later CL. BUG=chromium:690573 TEST=PYTHONPATH=~/cosarm python pack_firmware_unittest.py PYTHONPATH=~/cosarm python pack_firmware_functest.py Change-Id: I2222feb6b8c3f0a88196a6bab3b8e7afd3a373a0 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/452974 Reviewed-by: Dan Erat <derat@chromium.org> " fail_count="2" gerrit_number="452974" owner_email="sjg@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform/firmware" project_url="https://chromium-review.googlesource.com/chromiumos/platform/firmware" ref="refs/changes/74/452974/5" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I340fc25ae6da9a8a00f38fbe78708b48f1490060" commit="50a4b3d47b847b43f8fa392bd3a56a139d8c913b" commit_message="pack_firmware.py: Pass script as a parameter Instead of reading this directly from the arguments in _CopyBaseFiles(), pass it as a parameter. This clears the way for it to become a model-specific value in a later CL. BUG=chromium:690573 TEST=PYTHONPATH=~/cosarm python pack_firmware_unittest.py PYTHONPATH=~/cosarm python pack_firmware_functest.py Change-Id: I340fc25ae6da9a8a00f38fbe78708b48f1490060 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/452975 Reviewed-by: Dan Erat <derat@chromium.org> " fail_count="2" gerrit_number="452975" owner_email="sjg@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform/firmware" project_url="https://chromium-review.googlesource.com/chromiumos/platform/firmware" ref="refs/changes/75/452975/5" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="If546ce653f1088cbb1d31cf2f90aba0621ed8b4a" commit="8e7e7e38f4825e45224220a278c95d927d26ccdd" commit_message="minigbm: cros_gralloc: back out of scanout flag with more clarity We interpret the following flags as GRALLOC_USAGE_HW_COMPOSER as BO_USE_SCANOUT | BO_USE_RENDERING: If the combination is not supported by the driver, let's check if the gralloc flag is present before we back out for clarity. BUG=chromium:616275 TEST=compiles Change-Id: If546ce653f1088cbb1d31cf2f90aba0621ed8b4a Reviewed-on: https://chromium-review.googlesource.com/451978 Commit-Ready: Gurchetan Singh <gurchetansingh@chromium.org> Tested-by: Gurchetan Singh <gurchetansingh@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> " fail_count="1" gerrit_number="451978" owner_email="gurchetansingh@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/minigbm" project_url="https://chromium-review.googlesource.com/chromiumos/platform/minigbm" ref="refs/changes/78/451978/3" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ib3fccf6f0cb86c8ded45924297df3c06f8e49271" commit="e38feb32835ebbd7ef6811ca32029e68b28783e4" commit_message="minigbm: rework flag API We've been back and forth on the semantics of the flag API many times, and the current situation is confusing. Change the drivers so every combination defines a distinct type of buffer. That means if the same format is in the combination list three times, the tiling or format modifiers of one of those combinations must be different from the other two. Let's add a priority variable in struct supported_combination that breaks ties. For example, if a consumer specifies BO_USE_TEXTURE, we of course can texture from both linear and tiled buffers, but because a tiled buffer's priority is greater, it will be chosen. If a consumer specifies BO_USE_TEXTURE | BO_USE_SW_WRITE_OFTEN, the tiled combination won't have the BO_USE_SW_WRITE_OFTEN flag and the linear combination will be chosen. We expect drivers to modify the combinations after querying KMS. This is clunky using linked lists, so get rid of list.h and use arrays. BUG=chromium:616275 TEST=all the following compiles: emerge-cyan minigbm/arc-cros-gralloc emerge-oak minigbm/arc-cros-gralloc emerge-veyron_minnie-cheets minigbm/arc-cros-gralloc emerge-peach_pi minigbm emerge-nyan_big minigbm emerge-jadeite minigbm Tested with gbmtest on cyan, checked if Chrome boots Change-Id: Ib3fccf6f0cb86c8ded45924297df3c06f8e49271 Reviewed-on: https://chromium-review.googlesource.com/448252 Commit-Ready: Gurchetan Singh <gurchetansingh@chromium.org> Tested-by: Gurchetan Singh <gurchetansingh@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> " fail_count="1" gerrit_number="448252" owner_email="gurchetansingh@chromium.org" pass_count="0" patch_number="11" project="chromiumos/platform/minigbm" project_url="https://chromium-review.googlesource.com/chromiumos/platform/minigbm" ref="refs/changes/52/448252/11" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="If39634a12ad325b4d28afbd3db335e6ee9e287f6" commit="7468a42ea26529772ffe2af6b5d61b8a595c5ebd" commit_message="minigbm: cros_gralloc: make HW_FB a no-op GRALLOC_USAGE_HW_FB is a legacy flag, and doesn't make sense in our setup. BUG=chromium:616275 TEST=compiles Change-Id: If39634a12ad325b4d28afbd3db335e6ee9e287f6 Reviewed-on: https://chromium-review.googlesource.com/455282 Commit-Ready: Gurchetan Singh <gurchetansingh@chromium.org> Tested-by: Gurchetan Singh <gurchetansingh@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> " fail_count="1" gerrit_number="455282" owner_email="gurchetansingh@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/minigbm" project_url="https://chromium-review.googlesource.com/chromiumos/platform/minigbm" ref="refs/changes/82/455282/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I9854c2dac3e3b76c2354d16c422a140296001c08" commit="51bc0e3862c444a4d0edfecedbd13d34439a889d" commit_message="Upgrade libvorbis to 1.3.5. libvorbis 1.3.5 can be built with clang. BUG=chromium:701997 TEST=cbuildbot {arm,amd64}-generic-full works TEST=cbuildbot {caroline, daisy, elm, kevin, veyron_jaq}-release works Change-Id: I9854c2dac3e3b76c2354d16c422a140296001c08 Reviewed-on: https://chromium-review.googlesource.com/455345 Commit-Ready: Manoj Gupta <manojgupta@chromium.org> Tested-by: Manoj Gupta <manojgupta@chromium.org> Reviewed-by: Yunlian Jiang <yunlian@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="2" gerrit_number="455345" owner_email="manojgupta@chromium.org" pass_count="0" patch_number="3" project="chromiumos/overlays/portage-stable" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/portage-stable" ref="refs/changes/45/455345/3" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="Ife11346e7e738c3a78d75b82a9744524af6e6b23" commit="e58171775d396260e3d71d9f8a116bd6f9d1c262" commit_message="Remove libvorbis forced building by gcc. Version 1.3.5 of libvorbis can be built by clang. So remove forcing build by gcc. CQ-DEPEND=CL:455345 BUG=chromium:701997 TEST=cbuildbot {arm,amd64}-generic-full works TEST=cbuildbot {caroline, daisy, elm, kevin, veyron_jaq}-release works Change-Id: Ife11346e7e738c3a78d75b82a9744524af6e6b23 Reviewed-on: https://chromium-review.googlesource.com/455983 Commit-Ready: Manoj Gupta <manojgupta@chromium.org> Tested-by: Manoj Gupta <manojgupta@chromium.org> Reviewed-by: Yunlian Jiang <yunlian@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="2" gerrit_number="455983" owner_email="manojgupta@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/83/455983/2" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="Ia4867ea8d66a53e2e84aa2c09ef3677a0666546d" commit="fde8c00ca6d9f9f8ba2d8cd08ee6e5743d15aa09" commit_message="touch_keyboard: Send Key-up when sliding off a key Previously if a finger pressed down a key and held it, then slid off the key (without leaving the surface of the sensor) the system would never send a key-up event, resulting in a constant stream of that key being "typed" until you pressed another key. These runaway streams of keystrokes are obviously very bad for the user. This CL adds in a check when a finger moves to make sure that if it has left a key that is down, a key-up event will be sent. BUG=b:36232858 TEST=emerged onto my Pbody. Pressing a key down and sliding off now stops the stream of keys. Quick "normal" taps still work fine, and barely brushing a key still doesn't send events. Evtest showed the keyboard events making more sense now too. Change-Id: Ia4867ea8d66a53e2e84aa2c09ef3677a0666546d Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/455554 Reviewed-by: Jingkui Wang <jkwang@google.com> " fail_count="1" gerrit_number="455554" owner_email="charliemooney@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/54/455554/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I7a7af809dc3f9d7a586c06a07e3ba2936f350f4e" commit="26ca406eb91665554d6f369a8a1041b3afb9e927" commit_message="touch_keyboard: Suppress false error messages Previously an error message was added to the logs when an event was about to fire without any current FingerData stored for it unless it's a guaranteed key-up event. It turns out that's not the only case where we'd expect that to happen. If a finger arrives and leaves all within the delay window, we might see a guaranteed key-down event too. This CL edits the error message and the conditions underwhich it is sent to the logs. No functional changes here, just trimming out some extra/misleading error messages. BUG=b:36275412 TEST=emerged onto my Pbody. I don't see the error message anymore when I tap very quickly. Tapping quickly still sends key events and works as expected. Change-Id: I7a7af809dc3f9d7a586c06a07e3ba2936f350f4e Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/456076 Reviewed-by: Jingkui Wang <jkwang@google.com> " fail_count="1" gerrit_number="456076" owner_email="charliemooney@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/76/456076/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I048221f9ad2856c05f8abe00d590630412dd57f8" commit="d6ec5b9cc572d04aedf2a987882808cac42c7d44" commit_message="hal_adapter: add upstart config for arc_camera3_service BUG=b:36204945 TEST=Run `emerge-<board> arc-camera3` and make sure the init files are installed correctly. Change-Id: I048221f9ad2856c05f8abe00d590630412dd57f8 Reviewed-on: https://chromium-review.googlesource.com/454321 Commit-Ready: Ricky Liang <jcliang@chromium.org> Tested-by: Ricky Liang <jcliang@chromium.org> Reviewed-by: Heng-ruey Hsu <henryhsu@chromium.org> " fail_count="3" gerrit_number="454321" owner_email="jcliang@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/21/454321/2" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I2cc33a3d3d5bad81a29fb26bdd8d0e7cbc59653e" commit="0c57cc2abf1067b274bc58f9b061e3dbb03bf53e" commit_message="arc-camera3: install init scripts Install the upstart script for arc_camera3_service and the camera init.rc script for Android. BUG=b:36204945 CQ-DEPEND=CL:454321 TEST=Run `emerge-<board> arc-camera3` and make sure the init files are installed correctly. Change-Id: I2cc33a3d3d5bad81a29fb26bdd8d0e7cbc59653e Reviewed-on: https://chromium-review.googlesource.com/454502 Commit-Ready: Ricky Liang <jcliang@chromium.org> Tested-by: Ricky Liang <jcliang@chromium.org> Reviewed-by: Ricky Liang <jcliang@chromium.org> " fail_count="2" gerrit_number="454502" owner_email="jcliang@chromium.org" pass_count="0" patch_number="3" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/02/454502/3" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I37ead61e3be5e7ae464f1c9137cf02eaab0ff92e" commit="2f801c67a66dce7bae0735bb5ba9b7eecd6210ed" commit_message="usb: Cleanup headers Let's split the usb headers in 3 different parts, instead of having usb_descriptor.h pull in usb_hw.h and usb_api.h. - usb_api.h: EC functions related to usb (e.g. connect/disconnect) - usb_descriptor.h: common USB names and structures - usb_hw.h: Functions required for interactive with EC's USB HW BRANCH=none BUG=b:35587171 TEST=make buildall -j Change-Id: I37ead61e3be5e7ae464f1c9137cf02eaab0ff92e Reviewed-on: https://chromium-review.googlesource.com/454861 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> " fail_count="0" gerrit_number="454861" owner_email="drinkcat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/61/454861/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I276b2e00e07724ba4fd556cbcccc9865d2fe21ee" commit="5e3d47dfa0f1289d3987353ce9c4dd52af52ed51" commit_message="gcc: help clang find the linker path outside the chroot. Outside the chroot, the ${CTARGET}-ld is not in the ${PATH} so the clang could not find the linker. This patch adds the sdk/bin to the search path to help clang find the linker. BUG=chromium:597106 TEST=./armv7a-cros-linux-gnueabi/bin/armv7a-cros-linux-gnueabi-clang -c test.c finds the linker. Change-Id: I276b2e00e07724ba4fd556cbcccc9865d2fe21ee Reviewed-on: https://chromium-review.googlesource.com/443408 Commit-Ready: Yunlian Jiang <yunlian@chromium.org> Tested-by: Yunlian Jiang <yunlian@chromium.org> Reviewed-by: Caroline Tice <cmtice@chromium.org> " fail_count="3" gerrit_number="443408" owner_email="yunlian@chromium.org" pass_count="0" patch_number="7" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/08/443408/7" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I24de4c92c901811c49849ffdd90bd27885a88279" commit="d540fa859b868ff20d1537bc4ff8c84fd30f6740" commit_message="atrusctl: install udev rules BUG=b:35860685 TEST=Verified that udev rule was installed to rootfs CQ-DEPEND=CL:448044 Change-Id: I24de4c92c901811c49849ffdd90bd27885a88279 Signed-off-by: Emil Lundmark <emil@limesaudio.com> Reviewed-on: https://chromium-review.googlesource.com/448522 Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="0" gerrit_number="448522" owner_email="emil@limesaudio.com" pass_count="0" patch_number="4" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/22/448522/4" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I5c0a1d3d5fdfe9232030bab629d5c2e5aaed2db7" commit="2cf7213776a092654aa3bf576883562dc6788817" commit_message="minijail: Expose scoped_minijail.h Makes it available for Chrome OS projects that don't build with Android.mk. BUG=None TEST=Included it in authpolicy. Change-Id: I5c0a1d3d5fdfe9232030bab629d5c2e5aaed2db7 Reviewed-on: https://chromium-review.googlesource.com/455474 Commit-Ready: Lutz Justen <ljusten@chromium.org> Tested-by: Lutz Justen <ljusten@chromium.org> Reviewed-by: Jorge Lucangeli Obes <jorgelo@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="1" gerrit_number="455474" owner_email="ljusten@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/74/455474/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-4.4" change_id="I83eb7afa236190dd7f66b864152874ee2dea9e2b" commit="57021148317904c71f8043b6063c3fdeb3d164a9" commit_message="UPSTREAM: Input: add Raydium I2C touchscreen driver This adds support for Raydium I2C touch controllers compatible with RM32380. Signed-off-by: Jeffrey Lin <jeffrey.lin@rad-ic.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> BUG=b:35775065 TEST=Build Conflicts: Documentation/devicetree/bindings/vendor-prefixes.txt (cherry picked from commit 48a2b783483b3ed9565348736a5148a11cfffad6) Signed-off-by: Katherine Hsieh <Katherine.Hsieh@quantatw.com> Change-Id: I83eb7afa236190dd7f66b864152874ee2dea9e2b Reviewed-on: https://chromium-review.googlesource.com/454518 Commit-Ready: David Wu <david_wu@quantatw.com> Tested-by: David Wu <david_wu@quantatw.com> Reviewed-by: Dmitry Torokhov <dtor@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> " fail_count="2" gerrit_number="454518" owner_email="Katherine.Hsieh@quantatw.com" pass_count="0" patch_number="2" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/18/454518/2" remote="cros" total_fail_count="2"/><lkgm version="9372.0.0-rc2"/></manifest> |
