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| <pending_commit branch="chromeos-2016.05" change_id="Ic3d0b9f7ddf2cd0d3b542bd35a2d7e209a77c364" commit="5a690b24d02d89cbb1097e5fac1abb25686ca9d4" commit_message="UPSTREAM: Makefile.inc: ensure cbfs-files-processor-struct has correct ccopts The ramstage-c-ccopts variable needs to be double dereferenced for the cbfs-files-processor-struct handler so all the ccopts are included since the ramstage-c-ccopts is fully constructed later by another function. Without this not all the flags are present on the command line. BUG=none BRANCH=none TEST=none Change-Id: Ic3d0b9f7ddf2cd0d3b542bd35a2d7e209a77c364 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 42bcd13c758c3b72c46e8d7aeabddb4c37a1657e Original-Change-Id: I5425b3c1f23d767c61f654dd287584403f85d719 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://review.coreboot.org/19380 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/488045 " fail_count="0" gerrit_number="488045" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/488045/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ie38d062b92b9bcd7bf7faf88a9495c52c0d5488d" commit="2776400d4947e382df29ade1725d46ce020163ee" commit_message="UPSTREAM: console: rework log level to not be reliant on ROMSTAGE_CONST The console log level variable doesn't really rely on ROMSTAGE_CONST proper. Instead, the mutability of the variable is based on the current implementation of ROMSTAGE_CONST (__PRE_RAM__). As such directly use that logic for the code. In addition, refactor the code to let the compiler and linker optimize out accesses instead of using the pre-processor. BUG=none BRANCH=none TEST=none Change-Id: Ie38d062b92b9bcd7bf7faf88a9495c52c0d5488d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4003950881af6fc4761aa0b177a3670d04ee9881 Original-Change-Id: I44bcc409266ef52b9be29f75efde73a6707a53f4 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://review.coreboot.org/19438 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/488046 " fail_count="0" gerrit_number="488046" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/46/488046/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If0409e8e9d6a203254a9f9b749de5cab70dfc842" commit="f351e12da528ad987bfbefe1fff5143f02e67b2d" commit_message="UPSTREAM: lib: provide clearer devicetree semantics The devicetree data structures have been available in more than just ramstage and romstage. In order to provide clearer and consistent semantics two new macros are provided: 1. DEVTREE_EARLY which is true when !ENV_RAMSTAGE 2. DEVTREE_CONST as a replacment for ROMSTAGE_CONST The ROMSTAGE_CONST attribute is used in the source code to mark the devicetree data structures as const in early stages even though it's not just romstage. Therefore, rename the attribute to DEVTREE_CONST as that's the actual usage. The only place where the usage was not devicetree related is console_loglevel, but the same name was used for consistency. Any stage that is not ramstage has the const C attribute applied when DEVTREE_CONST is used. BUG=none BRANCH=none TEST=none Change-Id: If0409e8e9d6a203254a9f9b749de5cab70dfc842 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e4d7abc0d448c7e805f2b48ed1251708d1f84c67 Original-Change-Id: Ibd51c2628dc8f68e0896974f7e4e7c8588d333ed Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://review.coreboot.org/19333 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/488047 " fail_count="0" gerrit_number="488047" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/47/488047/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia320e823322143757ec731c91bc283472069bc23" commit="0364e7333302ff2c567b4bc3605227afcd4edb93" commit_message="UPSTREAM: device: allow devicetree accesses in postcar stage BUG=none BRANCH=none TEST=none Change-Id: Ia320e823322143757ec731c91bc283472069bc23 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5e88c3b18ac7eef053d5285d6ad00c1bde4f1235 Original-Change-Id: Ib6f8ee937c4f3d8e2c0ff3851a819077fa499ccc Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://review.coreboot.org/19334 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/488048 " fail_count="0" gerrit_number="488048" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/48/488048/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I78458fefac96d714eeacc3832a2c4818d2fcd016" commit="ee17ba0427d9055575ef68d56e33b1f251b7181e" commit_message="UPSTREAM: soc/intel/skylake: use postcar stage for fsp 2.0 Utilize the postcar stage for tearing down CAR and initializing the MTRRs once ram is up. This flow is consistent with apollolake and allows CAR_GLOBAL variables to be directly accessed and no need for migrating CAR_GLOBAL variables as romstage doesn't run with and without CAR being available. BUG=none BRANCH=none TEST=none Change-Id: I78458fefac96d714eeacc3832a2c4818d2fcd016 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 79f0741f815faef3bc326e97a93fd13a7652e628 Original-Change-Id: I76de447710ae1d405886eb9420dc4064aa26eccc Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://review.coreboot.org/19335 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/488049 " fail_count="0" gerrit_number="488049" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/49/488049/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia02d511dbff84520c61337d58077d7f297fb2a6e" commit="2dcd5d3bee3d8c50b9d33d7e4d99dfddfa7ae3ce" commit_message="UPSTREAM: soc/intel/skylake: Fix the PCI ID for SATA controller Update the PCI ID for SATA controller on Kaby Lake. BUG=none BRANCH=none TEST=none Change-Id: Ia02d511dbff84520c61337d58077d7f297fb2a6e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: c0dbdf4c90b22b9ced22563b4c0de58a2b763c93 Original-Change-Id: Id0b5e0366e04fbac6a57a15407f33f390a2a1856 Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-on: https://review.coreboot.org/19395 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/488050 " fail_count="0" gerrit_number="488050" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/50/488050/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibff3a5d8b073ab5fb40d5fbfda2137a725574e02" commit="96caa600274a19ecec8032d50bb25714efc71760" commit_message="UPSTREAM: util/ectool: Fix timeout on sending EC command When setting output to verbose, it incorrectly reports that it times out on every command. TESTED on Thinkpad X60. BUG=none BRANCH=none TEST=none Change-Id: Ibff3a5d8b073ab5fb40d5fbfda2137a725574e02 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 2873a4aea4d27f49e5dc7014b1153a9985048d29 Original-Change-Id: I24f05f0c165462d5ba2604c7e2fe139400683275 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/19151 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://chromium-review.googlesource.com/488051 " fail_count="0" gerrit_number="488051" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/51/488051/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6e055b5ad1c2bbd62ac450a9c38267fd92fc884e" commit="d2b4b94ab184f62298a89eb33d1e02b27f7d170b" commit_message="UPSTREAM: util/ectool: Dump ram by default According to the comment above the default should dump the EC ram, though is never reached since the variable 'write_addr' is not 0, but initialized at -1. Also removes brackets around one line statement below if to make checkpatch.pl happy. BUG=none BRANCH=none TEST=none Change-Id: I6e055b5ad1c2bbd62ac450a9c38267fd92fc884e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 878c2de41b17443c8b358c4a3171669d8aab5ccd Original-Change-Id: I390996b253f2f20682cd9ab2d4f560de6eccfc57 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/19152 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://chromium-review.googlesource.com/488052 " fail_count="0" gerrit_number="488052" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/52/488052/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7b8ec432871845f5ae16f43508f8e922ada35e16" commit="40836c36ca1eeab1c531a39bebf6c246222370d7" commit_message="UPSTREAM: soc/intel: Unify `timestamp.inc` These files are actually indentical, but unfortunately, the formatting was changed without caring for the already present files. Fix that. Use the license formatting where less lines are used. The next step is to put that in a common location. BUG=none BRANCH=none TEST=none Change-Id: I7b8ec432871845f5ae16f43508f8e922ada35e16 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d06c51895e9c3e7af20054bf57464c38d8adeb16 Original-Change-Id: Iecb263b9d321a33e64988b315220893df2e0045c Original-Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-on: https://review.coreboot.org/19423 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/488053 " fail_count="0" gerrit_number="488053" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/53/488053/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1b0d54a7697be3c985693020078200705f08d1b9" commit="da5630c650202f5abfca942ca6303637a3a2d20f" commit_message="UPSTREAM: AMD Geode: Move conflicting mainboard_romstage_entry() The silicon specific mainboard_romstage_entry() in amd/cpu/car.h, which is used by all AMD silicon car code, caused a conflict. Move the silicon specific defines to silicon header files. Also, no longer include car.h in the romstage file. BUG=none BRANCH=none TEST=none Change-Id: I1b0d54a7697be3c985693020078200705f08d1b9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4aad421e8194db9805db4441245db13ae66853ee Original-Change-Id: Icfc759c4c93c8dfff76f5ef9a1a985dd704cfe94 Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/18769 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/488054 " fail_count="0" gerrit_number="488054" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/54/488054/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I816c7a6f50d25ef70ae7c87a2642d746d09b6f6d" commit="e33d17172e88a5d822cfa0d8b04c4194aa042ccc" commit_message="UPSTREAM: amd/pi/hudson: Add GPIO get function Add a basic GPIO get function. Note that GPIO set, ACPI/GPE, and other features should come in future commits. Future changes to be modeled on the other soc/ gpio functions. BUG=none BRANCH=none TEST=none Change-Id: I816c7a6f50d25ef70ae7c87a2642d746d09b6f6d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: dae95f0dfe9ad94922c940d3c0522d53284b4deb Original-Change-Id: I8f681865715ab947b525320a6f9fc63af1334b59 Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/19159 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/488055 " fail_count="0" gerrit_number="488055" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/55/488055/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iae97ac8306e640fde6bd2300f62b7fcaf960eea0" commit="b0d76b2b663030d2610246dd73e6746fc58e0c4d" commit_message="UPSTREAM: cbmem_console: Document known reimpementations of console structure/API It turns out that there are quite a few other projects that can access the CBMEM console by now. If we ever want to make another structural or behavioral change to it, we need to know where these implementations are so we can make sure they're all getting updated. Let's try to build a comprehensive list in the file that should be the source of truth for all (coreboot's own implementation). BUG=none BRANCH=none TEST=none Change-Id: Iae97ac8306e640fde6bd2300f62b7fcaf960eea0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a915cea289210b17b7df0845f8738363be659bb4 Original-Change-Id: Ia3d6a87230f5bfdde9d812bc7154e22880c1377a Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://review.coreboot.org/19439 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/488056 " fail_count="0" gerrit_number="488056" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/56/488056/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id7b09a5df91744b8a0cdcf86a3d80d28880db3d0" commit="b484247d7e0920b31bb2c93661c89db016b88f92" commit_message="UPSTREAM: amd/pi/hudson: Add LPC IO decode enable function Add a function to enable LPC IO decode AKA WideIO. This can enable up to 3 regions, which may be 512 or 16 bytes wide. BUG=none BRANCH=none TEST=none Change-Id: Id7b09a5df91744b8a0cdcf86a3d80d28880db3d0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f962aa52d626f997f7749b4566e5fefca97ebcf2 Original-Change-Id: I2bed3a99180188101e00b4431d634227e488cbda Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/19160 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/488057 " fail_count="0" gerrit_number="488057" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/57/488057/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iae32c2450667da500771d9aada2e121da0c467a4" commit="018d7c7088b788799af1c7985bb82d0add4d0643" commit_message="UPSTREAM: amd/pi/hudson: Move ACPI IO registers Move the ACPI IO registers from 0x800 to 0x600 to avoid the IO space required by the Google EC, also at 0x800. This shouldn't have any conflicts on other AMD systems. BUG=none BRANCH=none TEST=none Change-Id: Iae32c2450667da500771d9aada2e121da0c467a4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e7394ca90366d35ac52416c21052a3ceb459dc81 Original-Change-Id: Iac7388c15e899277fd506fb37965164488358335 Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/19171 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/488058 " fail_count="0" gerrit_number="488058" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/58/488058/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia4732dca1545b784de5c839e074eb9122ff2b7e0" commit="8284165fdfe0ca68d1d8fdb4edd2a06e6f156c5d" commit_message="UPSTREAM: amd/pi/hudson: Clean up whitespace in header files Change spaces to tabs and do general whitespace cleanup. BUG=none BRANCH=none TEST=none Change-Id: Ia4732dca1545b784de5c839e074eb9122ff2b7e0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: c1f32336e62c846073bdb0d92b54a84ac7320c3c Original-Change-Id: I4a4ecd42f91c9c6015a4f065b7386b17523ac6d9 Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/19401 Original-Reviewed-by: Martin Roth <martinroth@google.com> Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/488059 " fail_count="0" gerrit_number="488059" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/59/488059/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7ae140e18c3e0a3c43e72dcb899ee8bd68beb945" commit="9f6da3e3c9b0d1c41620234f85d2c6efa6bf4e1d" commit_message="UPSTREAM: amd/pi/hudson: Add TPM decode to SPI function Add a function to send the TPM decode to the SPI interface. Enables use of SPI TPMs on Hudson mainboards. BUG=none BRANCH=none TEST=none Change-Id: I7ae140e18c3e0a3c43e72dcb899ee8bd68beb945 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 6fcaaef6140aca68603f57d1c684c3381d472ac4 Original-Change-Id: I0e85ed92163e38eca6a55456708ab322d6a90d4c Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-on: https://review.coreboot.org/19402 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/488060 " fail_count="0" gerrit_number="488060" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/60/488060/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I511652c7f5492f52ff2446bfc214d92ed79c1e7c" commit="d61c7d4a2137d75560d7b86a77a1e7b526148ae1" commit_message="UPSTREAM: mma: Make MMA blobs path SOC specific MMA blobs are SOC specific (not board). So far MMA is supported by big cores (SKL and KBL). BUG=none BRANCH=none TEST=none Change-Id: I511652c7f5492f52ff2446bfc214d92ed79c1e7c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ebb7994263ad16419a4f402ed56735f469457212 Original-Change-Id: I922789a2a12d55360624dd6de15ab9f0bb5f0acf Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Original-Reviewed-on: https://review.coreboot.org/19260 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/488281 " fail_count="0" gerrit_number="488281" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/81/488281/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I437db7d3f171d24909c0f0c3d59ee324c8e170b0" commit="209815973e0b476b4e26c5b97d4c855a99fd123b" commit_message="UPSTREAM: nb/pineview/raminit: Don't do Jedec init on resume from S3 This is not needed. BUG=none BRANCH=none TEST=none Change-Id: I437db7d3f171d24909c0f0c3d59ee324c8e170b0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d2ca9d12dcda7f9ad77fe187af5f439072b4592f Original-Change-Id: Id19a00c1546b7a71d90aa8c7e43e6efde1e9fbbc Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/19425 Original-Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/488282 " fail_count="0" gerrit_number="488282" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/82/488282/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibb484e1894fa86c1f47a03a61ff4d0ace1452838" commit="edddf7356d54b25ae43faa08badfcb7b717b683e" commit_message="UPSTREAM: mb/intel/d510mo: enable ACPI resume from S3 Replace ram_check with quick_ram_check, because ram_check is slow and is destructive for dram content. BUG=none BRANCH=none TEST=none Change-Id: Ibb484e1894fa86c1f47a03a61ff4d0ace1452838 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 58ab3bed82c5696b1cb00382cff26e97fb44b0d8 Original-Change-Id: I5fb1bfe711549aabb6e597bda22848988a7e9cbe Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/19416 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/488283 " fail_count="0" gerrit_number="488283" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/83/488283/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7fab2c0634be26abb33c99d4048d31e1cebaf811" commit="924ce2bb3663f829f555fe2b17a7e1e67aa19700" commit_message="UPSTREAM: mb/intel/d510mo: Add romstage timestamps BUG=none BRANCH=none TEST=none Change-Id: I7fab2c0634be26abb33c99d4048d31e1cebaf811 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0c0b79689a804bff6cba25869d810812302ff9fc Original-Change-Id: I324edce44ad82217ac1fba177f4a0bb3c799308c Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/19426 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/488284 " fail_count="0" gerrit_number="488284" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/84/488284/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ice12072a2406dfe52b294168a37c5ce347a9ff5d" commit="60efb3659facee24746a116a667a3f7f6ba80206" commit_message="imageloader: read container key from PEM file This will be stored on the rootfs as a PEM file. We need to read it and then convert it to DER format so the crypto verifier can use it. BUG=chromium:697645 TEST=load a component signed with the container key Change-Id: Ice12072a2406dfe52b294168a37c5ce347a9ff5d Reviewed-on: https://chromium-review.googlesource.com/457803 Commit-Ready: Eric Caruso <ejcaruso@chromium.org> Tested-by: Eric Caruso <ejcaruso@chromium.org> Reviewed-by: Greg Kerr <kerrnel@chromium.org> " fail_count="1" gerrit_number="457803" owner_email="ejcaruso@chromium.org" pass_count="0" patch_number="7" project="chromiumos/platform/imageloader" project_url="https://chromium-review.googlesource.com/chromiumos/platform/imageloader" ref="refs/changes/03/457803/7" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Icc723f5d66057e91e829d8397ed459429ac3a2fe" commit="c5e6153f94b34699019915328dbf4ca8fb3c5614" commit_message="[moblab] Make change so chromite install dir is in moblab static dir. Autotest devserver moved to using the chromite gsutil. By default chromite gsutil installs the executables in the /tmp directory. Moblab mounts the /tmp directory noexec so no scripts can be run. Set enviroment variable CROS_CACHEDIR to change where chromite installs the gsutil, set it to be under /mnt/moblab/static so it will be executable. BUG=chromium:710740 TEST=Manual testing on affected moblab Change-Id: Icc723f5d66057e91e829d8397ed459429ac3a2fe Reviewed-on: https://chromium-review.googlesource.com/479895 Commit-Ready: Keith Haddow <haddowk@chromium.org> Tested-by: Keith Haddow <haddowk@chromium.org> Reviewed-by: Keith Haddow <haddowk@chromium.org> Reviewed-by: Xixuan Wu <xixuan@chromium.org> " fail_count="0" gerrit_number="479895" owner_email="haddowk@chromium.org" pass_count="0" patch_number="4" project="chromiumos/overlays/board-overlays" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/board-overlays" ref="refs/changes/95/479895/4" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-4.4" change_id="I56fd68dd2a889aa1524a9db7278e196b8d4258bd" commit="b2307deb5644ed1bc0041af17f5baa2328e025a8" commit_message="FROMLIST: kbuild: Add support to generate LLVM assembly files Add rules to kbuild in order to generate LLVM assembly files with the .ll extension when using clang. # from c code make CC=clang kernel/pid.ll Link: https://patchwork.kernel.org/patch/9697113/ BUG=chromium:702741 TEST=make CC=clang kernel/pid.ll inspect kernel/pid.ll Signed-off-by: Vincius Tinti <viniciustinti@gmail.com> Signed-off-by: Behan Webster <behanw@converseincode.com> Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> (applied to git.kernel.org masahiroy/linux-kbuild kbuild) Change-Id: I56fd68dd2a889aa1524a9db7278e196b8d4258bd Reviewed-on: https://chromium-review.googlesource.com/487027 Commit-Ready: Matthias Kaehlcke <mka@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> " fail_count="0" gerrit_number="487027" owner_email="mka@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/27/487027/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ia1d411f53bb140d20b3546551a21afe2bcf88ed1" commit="7245af190b27f08f9d00fe1e5e6158ab5322d545" commit_message="login: Add special flags to Chrome startup for CfMs. If the device is a CfM, add the --enable-blink-features=MediaStreamTrackContentHint flag to Chrome startup. BUG=chromium:707892 TEST=Chrome on CfM starts with the flag added. Change-Id: Ia1d411f53bb140d20b3546551a21afe2bcf88ed1 Reviewed-on: https://chromium-review.googlesource.com/486081 Commit-Ready: Rahul Chaturvedi <rkc@chromium.org> Tested-by: Rahul Chaturvedi <rkc@chromium.org> Reviewed-by: Dan Erat <derat@chromium.org> " fail_count="0" gerrit_number="486081" owner_email="rkc@chromium.org" pass_count="0" patch_number="6" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/81/486081/6" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ibf3d40255bead8f23f33fa93d671074ce4ea8b1d" commit="03468a3d4f6729a0a6feb4c2d18481934fb98c77" commit_message="biod: biod_client_tool bug fix Previous biod_client_tool experiences segfault when fake_biometric_tool sends a scan_done signal. This is fixed by disabling copy and assign for BiometricsManagerProxy. BUG=chromium:629657 TEST=biod_client_tool and fake_biometric_tool Change-Id: Ibf3d40255bead8f23f33fa93d671074ce4ea8b1d Reviewed-on: https://chromium-review.googlesource.com/469157 Commit-Ready: Mengqi Guo <mqg@chromium.org> Tested-by: Mengqi Guo <mqg@chromium.org> Reviewed-by: Zach Reizner <zachr@chromium.org> " fail_count="1" gerrit_number="469157" owner_email="mqg@chromium.org" pass_count="0" patch_number="11" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/57/469157/11" remote="cros" total_fail_count="5"/><pending_commit branch="master" change_id="Ie870f2d88dee7c1db346adc2143e4fe06bc78f83" commit="1cf5e2153000c2a3314f3384a8a711d144bce041" commit_message="COMMIT-QUEUE: add peppy-pre-cq for more coverage. BRANCH=None BUG=chromium:715194 TEST=None Change-Id: Ie870f2d88dee7c1db346adc2143e4fe06bc78f83 Signed-off-by: Xixuan Wu <xixuan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/487122 Reviewed-by: Julius Werner <jwerner@chromium.org> " fail_count="0" gerrit_number="487122" owner_email="xixuan@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/depthcharge" project_url="https://chromium-review.googlesource.com/chromiumos/platform/depthcharge" ref="refs/changes/22/487122/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I67a295ae20aa15b964471665db0f668bfb748945" commit="edece89e7792b5eef05b593b8a53ec05f29f4de3" commit_message="chromeos-chrome: Add thinlto support.. This adds thinlto support for chromeos-chrome. BUG=chromium:707803 TEST=cbuildbot falco-release elm-release daisy-release apply the patch to chromeos-chrome-60.0.3077.0_rc-r1.ebuild emerge-carolin chromeos-chrome Change-Id: I67a295ae20aa15b964471665db0f668bfb748945 Reviewed-on: https://chromium-review.googlesource.com/486143 Commit-Ready: Yunlian Jiang <yunlian@chromium.org> Tested-by: Yunlian Jiang <yunlian@chromium.org> Reviewed-by: Manoj Gupta <manojgupta@chromium.org> Reviewed-by: Caroline Tice <cmtice@chromium.org> " fail_count="0" gerrit_number="486143" owner_email="yunlian@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/43/486143/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I2822669702497b736374438e1c7c169e3c934b9c" commit="04566e56ff5ee60cbbcb6f18d017696fed80055d" commit_message="common: fix sign-compare compiler warning BUG=b:32690003 TEST=Make sure no warnings generated by gcc. Change-Id: I2822669702497b736374438e1c7c169e3c934b9c Reviewed-on: https://chromium-review.googlesource.com/487942 Commit-Ready: Ricky Liang <jcliang@chromium.org> Tested-by: Ricky Liang <jcliang@chromium.org> Reviewed-by: Hung-yu Wu <hywu@chromium.org> " fail_count="0" gerrit_number="487942" owner_email="jcliang@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/42/487942/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I1f95ad277713c5e30913e0a010ca03dfd9ec248c" commit="25a9e7ba46847ebd353e50d6fe4b39e1a8139407" commit_message="i2c: separate slave and master code Split i2c.c code in two (i2c_slave.c and i2c_master.c). i2c_slave.c is used when EC has no i2c device connected (i2c master code not needed) but EC is connected to AP via i2c. BRANCH=none BUG=b:37584134 TEST=1. Compile rose board with CONFIG_I2C and CONFIG_CMD_HOSTCMD. Then make sure EC_CMD_GET_PROTOCOL_INFO works. 2. On Kevin and Elm, cherry-pick to firmware branch respectively, build and flash ec, i2c function works. Change-Id: I1f95ad277713c5e30913e0a010ca03dfd9ec248c Signed-off-by: Wei-Ning Huang <wnhuang@google.com> Reviewed-on: https://chromium-review.googlesource.com/484999 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> " fail_count="0" gerrit_number="484999" owner_email="wnhuang@chromium.org" pass_count="0" patch_number="8" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/99/484999/8" remote="cros" total_fail_count="0"/><lkgm version="9497.0.0-rc3"/></manifest> |
