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| <pending_commit branch="chromeos-2016.05" change_id="I71907d75cae5d5acb5434a2e1f13fb6daaaca67e" commit="f808ac00c1b95451c29dee33de3192503a7d8041" commit_message="UPSTREAM: inteltool: Don't use PCI_FILL_SIZES This is supposed to fill the `size[]` array with the actual sizes of a device' MMIO ranges, but apparently isn't implemented for every access method in libpci (we let the library choose one). It tells us by clearing `PCI_FILL_SIZES` in the return value of `pci_fill_info()` (which we don't check). Since we don't ever use `size`, we can just make it clear and don't ask for it. BUG=none BRANCH=none TEST=none Change-Id: I71907d75cae5d5acb5434a2e1f13fb6daaaca67e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: ac826c8fd7b616f8b65a268e7474d8c0cf84f93f Original-Change-Id: I3fb9334472f1c7563a9e17910190f73affbe067a Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/19582 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528177 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528177" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/77/528177/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I66010e82a23d31ec4e99a3b5e810ea78fc4b88fc" commit="274c0745fc202d9d294829476208fc0858a43f4e" commit_message="UPSTREAM: inteltool: Add first Skylake PCI IDs BUG=none BRANCH=none TEST=none Change-Id: I66010e82a23d31ec4e99a3b5e810ea78fc4b88fc Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: ed9c9ce26841a958dac3517646f655e2a1887a5b Original-Change-Id: Ia5ef6b04f01e381174a4d8f73ddafeb18d488803 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/19583 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528178 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528178" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/78/528178/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic80f45f717536f68774696e0b30cd8d7db9ebc45" commit="19ad05be35277af40c9ea343e15c84e8a3099206" commit_message="UPSTREAM: inteltool: Fix clean-up and close related TODO We have to call pci_free_dev() for each device we allocated with pci_get_dev(). Since that's not the case for `sb`, we can close this TODO. BUG=none BRANCH=none TEST=none Change-Id: Ic80f45f717536f68774696e0b30cd8d7db9ebc45 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 0660c6c1ffb8ff1de04d62432a22b2f0a625fca2 Original-Change-Id: I1ef80c837263a205467f835156dcb8fa667d3a8f Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/19587 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528179 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528179" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/79/528179/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2c8c108fc08f85edb3ddd3f2cb0ec66a8aa1a122" commit="b3562391861d6d046057b3342d163728faaedc1a" commit_message="UPSTREAM: inteltool/ahci: Add Skylake support The SATA device moved from 0:1f.2 to 0:17.0, 0:1f.2 became PMC. We detect that by checking the PCI device class. The ABAR MMIO space has grown to 2KiB and up to 8 ports are supported now. For backwards compatibility, only dump port registers of ports that are enabled in the Ports Implemented (PI) register. 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BUG=none BRANCH=none TEST=none Change-Id: I3033ce4df78f611a85eede2dace4079483e26868 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c272a87f5c2e3a5173b24c0544297bbcb550c40f Original-Change-Id: Id9755d251fc42185c9e8d574deb55c76e129b718 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/19585 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528181 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528181" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/81/528181/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0b936414f7c4d0c17800ea59c2bb3665cf700f6b" commit="14e7af628e40c102b68b17a5e0aa29380b698295" commit_message="UPSTREAM: fsp1_1: Verify FSP_IMAGE_ID/_REV against headers FSP_IMAGE_ID and FSP_IMAGE_REV are defined in `FspUpdVpd.h`. Check against these to avoid mismatching definitions in coreboot and the FSP blob. BUG=none BRANCH=none TEST=none Change-Id: I0b936414f7c4d0c17800ea59c2bb3665cf700f6b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e7947df4621ba27c6c41eccb1a98ec414db1082b Original-Change-Id: Ic86229e7f0c2d0525b8a79add292c6c81a349aa6 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/19635 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528182 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528182" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/82/528182/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I3286388b00ec6800f7a5b6a5c133d96e7d7e8162" commit="667596df5f88d82102683ea579b717156ea9c54c" commit_message="UPSTREAM: soc/intel/skylake/chip.h: Provide some enums Provide some enums instead of unreadable comments that are usually copied all over. BUG=none BRANCH=none TEST=none Change-Id: I3286388b00ec6800f7a5b6a5c133d96e7d7e8162 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 503965f93960fffd2a3b8ba00af4edc5fd894295 Original-Change-Id: Iff551565647f28ecb226e1df633b4deec0ab0a7f Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/19636 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528183 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528183" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/83/528183/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I01bda06d9ef57890891757ed94baf2e5bb4e2f8f" commit="c67e8e3fcdb73bcf97b0112621dc3a088e2268e2" commit_message="UPSTREAM: soc/intel/skylake/chip.h: Reorder declarations Place `tdp_pl2_override` above the FSP options as it's not an FSP option. BUG=none BRANCH=none TEST=none Change-Id: I01bda06d9ef57890891757ed94baf2e5bb4e2f8f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4a47e4b8eedafa3f2099393de1f00365d1846ee5 Original-Change-Id: Idff2b628d19ce1a80294b28c55c05ba4157d07e0 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/19637 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528184 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528184" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/84/528184/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ieb04b1359a1148f0f0b63f00ee2a438cffb4d442" commit="39e7be6bb1e65d38478af6ed32662fc6807dcc69" commit_message="UPSTREAM: buildgcc: Fix color output in download_showing_percentage Probably this was never tested as the return to no color "\033[0m" was printed verbatim. BUG=none BRANCH=none TEST=none Change-Id: Ieb04b1359a1148f0f0b63f00ee2a438cffb4d442 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c2692111495e30b347c4be5d4228f8e7b8cbfed4 Original-Change-Id: I7e6e1049b062ffb138ebdaeb62ddc49581ff8db1 Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/19811 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528185 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528185" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/85/528185/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6ec991d905e16f79eaa162f07c79c1c0f8b85a61" commit="5b6480100d776010cea087fe69807399f0597f99" commit_message="UPSTREAM: Documentation: Describe libgfxinit hook-up BUG=none BRANCH=none TEST=none Change-Id: I6ec991d905e16f79eaa162f07c79c1c0f8b85a61 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b40e5c72b727211752a6e18156280edf067cddce Original-Change-Id: Ieeb53a1694193cd19b5e9aa5bee25e36a60e56bd Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/19054 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528187 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528187" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/87/528187/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I8736136043c526817fc12f52d37a5a1db4fb95b9" commit="3fe2d9f5290f3b567fa7cd7b834be0f453634cc5" commit_message="UPSTREAM: mb/*/*/cmos.layout: Make multibyte options byte aligned Changes the offsets of some options so that options that span multiple bytes are byte aligned. To make the cmos.layout file more consistent some things where moved around in the cmos.layout of thinkpads X200 and T400. BUG=none BRANCH=none TEST=none Change-Id: I8736136043c526817fc12f52d37a5a1db4fb95b9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 00b9f4c4b1cd95a6cafe2b1e66641ff0f113082e Original-Change-Id: Ic84a2a5dc6f9c102f041085871c2ed55e2f3692a Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/18321 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/528188 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528188" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/88/528188/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6612546b44a3d50158b674106fb62e3948561b3e" commit="b3d469404edc4690e4756f5a762e354c7e614557" commit_message="UPSTREAM: util/nvramtool: Bail out on unaligned multi-byte entries coreboot doesn't support CMOS options that are not byte aligned but span multiple bytes. So treat them as error. BUG=none BRANCH=none TEST=none Change-Id: I6612546b44a3d50158b674106fb62e3948561b3e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3af69850507e6e6afac7c0de689bbd8545a6085a Original-Change-Id: I2bcff62f153932e9c6646b4ce08e8da1c1532947 Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/18246 Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/528189 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528189" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/89/528189/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ieb0affec0b5ea2c651469f92d5c15bf57cdc6cf8" commit="53bccfdfd47368e3813539071164cea56935657c" commit_message="UPSTREAM: util/cbfstool/lz4frame.c: Add comment to fall through GCC7 has a new feature called -Wimplicit-fallthrough enabled by default which checks for fallthrough in switch statements which is a common error. When a fallthrough is actually intended a comment saying so will satisfy GCC. Fixes cbfstool not building with GCC7. BUG=none BRANCH=none TEST=none Change-Id: Ieb0affec0b5ea2c651469f92d5c15bf57cdc6cf8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 54fd92bc343da755b53bc290573ca59e63890d07 Original-Change-Id: I83252fc96be7ce0971d4251b0fc88fbbd7440e71 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/20036 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/528190 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528190" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/90/528190/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ie89777bc73c7061676e740f10ada60e1391b312d" commit="e6f73226790616c41035c86854c61d1341c29470" commit_message="UPSTREAM: soc/intel/skylake: Use PCI IDs from device/pci_ids.h Remove PCI IDs inclusion from soc header rather referring those from device/pci_ids.h. BUG=none BRANCH=none TEST=none Change-Id: Ie89777bc73c7061676e740f10ada60e1391b312d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c2165671b0ad0715a7cd1183390ca1b2c301d336 Original-Change-Id: I490da3e336fb6f8194d5fba800132f550ed5ab37 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/20015 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/528191 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528191" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/91/528191/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I336a8de9fc227086e8f6e41296360ef84511e0e8" commit="69d417ac856d6acbe07d490cf80f40acdb4bd796" commit_message="UPSTREAM: superiotool: Add SMSC KBC1126 Device ID is read from HP Elitebook 2760p. Based on: - superio/smsc/kbc1100 (LDNs, keyboard, EC) - DSDT from OEM firmware (COM1 and mailbox) - Datasheet "KBC1122 Priliminary DS Rev. 0.8" BUG=none BRANCH=none TEST=none Change-Id: I336a8de9fc227086e8f6e41296360ef84511e0e8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 7f46fff24c2975f29db7eed3504a7fea846c20d0 Original-Change-Id: Id172ae42411a6d42a4ae7c7f30f96aeda3e6c384 Original-Signed-off-by: Iru Cai <mytbk920423@gmail.com> Original-Reviewed-on: https://review.coreboot.org/18480 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://chromium-review.googlesource.com/528252 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528252" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/52/528252/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ib96966f0b9a22f751c0e359ceaa2c4503cc4d914" commit="0825879ed9f93ce9c6064a33a59673fc6f9fccf2" commit_message="UPSTREAM: nvramcui: Use regular `if` over `#if` for `IS_ENABLED` When using the regular `if` construct, the compiler will check the guarded code independently from the condition. BUG=none BRANCH=none TEST=none Change-Id: Ib96966f0b9a22f751c0e359ceaa2c4503cc4d914 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: afbc2c9c0cf0767a95871f18c96b026335cdb55c Original-Change-Id: I988fa9379e8c748013a67ef29fa908b4d9a970ad Original-Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Original-Reviewed-on: https://review.coreboot.org/18794 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528253 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528253" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/53/528253/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ideb80c381f491925dba2931448fe125a3f54e8f7" commit="a8270f5d10f9d3f14e3f63e9b83b35ba67365010" commit_message="UPSTREAM: asus/kgpe-d16: Add video card ID for VGA BIOS name The comma-separated PCI vendor and device ID is used to associate the VGA BIOS to the video device by using it as the file name of the VGA Option ROM. BUG=none BRANCH=none TEST=none Change-Id: Ideb80c381f491925dba2931448fe125a3f54e8f7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e213bf37672d124af636d95f4f869174d0c1914b Original-Change-Id: I755554eeb9a560d034d6e8fe49de619d800ea045 Original-Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Original-Reviewed-on: https://review.coreboot.org/18741 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528254 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528254" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/54/528254/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If63c7ff3fb041b070dc815ffe05592edbb03dbec" commit="05130a579742e94fbc550cf85f9687d7122875ec" commit_message="UPSTREAM: via/epia-m700: Wrap long line in comment Wrapping the long line tries to address a warning by `checkpatch.pl`, but the line is still over 80 characters long. BUG=none BRANCH=none TEST=none Change-Id: If63c7ff3fb041b070dc815ffe05592edbb03dbec Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 619e83045a3dfc189cf12b2f755b7a888c428382 Original-Change-Id: Ib75d4da1880624eb83f7a419cb6762f1c4c2a7b2 Original-Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-on: https://review.coreboot.org/20033 Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528255 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528255" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/55/528255/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I881e55138a6114c67585ce37d4d719fe2626b83a" commit="17bb373a73c0d0615e4a620d10c562707cc40439" commit_message="UPSTREAM: Use more secure HTTPS URLs for coreboot sites The coreboot sites support HTTPS, and requests over HTTP with SSL are also redirected. So use the more secure URLs, which also saves a request most of the times, as nothing needs to be redirected. Run the command below to replace all occurences. ``` $ git grep -l -E 'http://(www.|review.|)coreboot.org' | xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g' ``` BUG=none BRANCH=none TEST=none Change-Id: I881e55138a6114c67585ce37d4d719fe2626b83a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a8843dee58d15de6860b682975ee01ee61893670 Original-Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369 Original-Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-on: https://review.coreboot.org/20034 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/528256 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528256" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/56/528256/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I4978d8311a07870aee41103912c218ced4569611" commit="ad7c375e2c05012efacabbe8e83f8000f16b057d" commit_message="UPSTREAM: Use www.coreboot.org over coreboot.org <https://coreboot.org> is redirected to <https://www.coreboot.org>. ``` $ curl -I https://coreboot.org HTTP/1.1 301 Moved Permanently Server: nginx/1.8.1 Date: Mon, 05 Jun 2017 10:41:33 GMT Content-Type: text/html Content-Length: 184 Connection: keep-alive Location: https://www.coreboot.org/ ``` So use the command below to use the final location to save a redirect. ``` $ git grep -l https://coreboot.org \ | xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g' ``` BUG=none BRANCH=none TEST=none Change-Id: I4978d8311a07870aee41103912c218ced4569611 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 59e21136708a7619c24c3a79bdb87431b5b624df Original-Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3 Original-Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-on: https://review.coreboot.org/20035 Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/528257 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528257" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/57/528257/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9aeccd7b0dcf3ea7b8801c76251b7409a79b99d4" commit="de4f00a1985eed2d48d8b680c76a099d02b7aa4e" commit_message="UPSTREAM: payloads: change coreboot to lowercase The word 'coreboot' should always be written in lowercase, even at the start of a sentence. BUG=none BRANCH=none TEST=none Change-Id: I9aeccd7b0dcf3ea7b8801c76251b7409a79b99d4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e81ce0483db982c741eebdda649111eee22a853b Original-Change-Id: I2ec18ca55e0ea672343a951ab81a24a5630f45fd Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/20028 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/528258 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528258" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/58/528258/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I280a7abeada01b4d158b2d65c3b59f1b98b81ad9" commit="1e7ace7ba5d99dd5bca7c88aaf09b36875d3d2c0" commit_message="UPSTREAM: src: change coreboot to lowercase The word 'coreboot' should always be written in lowercase, even at the start of a sentence. BUG=none BRANCH=none TEST=none Change-Id: I280a7abeada01b4d158b2d65c3b59f1b98b81ad9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e18e6427d0f3261f9ec361d4418b8fe1dd7cc469 Original-Change-Id: I7945ddb988262e7483da4e623cedf972380e65a2 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/20029 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/528259 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528259" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/59/528259/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7b2d825a5af5b22f5c1182933ef76049344a85ce" commit="e1ea57f18cd42c987319bf6a340cfc008bbde26c" commit_message="UPSTREAM: payloads/Kconfig: Add NO_DEFAULT_PAYLOAD This symbol can be selected (e.g. in site-local/) to disable the user friendly but annoying default payload choice. BUG=none BRANCH=none TEST=none Change-Id: I7b2d825a5af5b22f5c1182933ef76049344a85ce Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9121a364a6d510eefa185df1458e7dacf24057b5 Original-Change-Id: I2f72d4efc0a428dce377c3d003b2c00a6c8d4c08 Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/19808 Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/528260 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528260" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/60/528260/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia5a03c7874d5b50f6259a95c8e8896d0e616cfd7" commit="e5af1d1c449745c0d3520788501abf26903cc484" commit_message="UPSTREAM: intel/common/acpi: Fix ACPI debug log issue with LPSS UART This patch fixes ACPI debug print issue reported internally while using APRT asl method. Potentially some junk characters gets added into final print buffer due to LPSS MMIO register space is 32 bit width and ADBG is one byte at a time. TEST=Built and boo eve to ensure to be able to get ASL console log without any corruption. Change-Id: Ia5a03c7874d5b50f6259a95c8e8896d0e616cfd7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f0c7be4e6344133ee2aaa2bb40e21ca28108be11 Original-Change-Id: I0b6af789c0ffc79f7fee4652b4aa6a125b182296 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/20009 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/528261 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528261" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/61/528261/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id11e2f532857cfb0e6c47fe57a3b1ed1e3d17ce6" commit="02a924846b0c3679da2b288fc49415a8218feb3f" commit_message="UPSTREAM: abuild: Remove space before tab Fix up commit 26174c97 (abuild: Build saved config files) unintentionally adding a space before a tabulator. BUG=none BRANCH=none TEST=none Change-Id: Id11e2f532857cfb0e6c47fe57a3b1ed1e3d17ce6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d2bbaffe405dae3c9c4138534ae4ebdecc48f3ea Original-Change-Id: Ic51dee6ed9d640335c2bde5bd5dfad3691c505e0 Original-Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-on: https://review.coreboot.org/17778 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528262 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528262" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/62/528262/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia652cab86f965ba95ad2105f37493c7a53c52f97" commit="551fda54ba7c009a9d5322d49d5e724040db900d" commit_message="UPSTREAM: Kconfig: Indent help text These Kconfig files had help text that was not indented further than the 'help' keyword. BUG=none BRANCH=none TEST=none Change-Id: Ia652cab86f965ba95ad2105f37493c7a53c52f97 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f482396625628bfadebfacf7cef9a951eaf50aab Original-Change-Id: Ia9fdb22c0f5f0cec0c9d08aa6603b4ce8d60d9a3 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/19850 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528263 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528263" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/63/528263/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1be493f7fbce0a31fefdc589c063d1561a384c5e" commit="660b559b71b6b3069293940852548e1419f9746f" commit_message="UPSTREAM: mainboard/google/poppy: Add support for ELAN device Add support for ELAN 5515 device. BUG=b:62331218 Change-Id: I1be493f7fbce0a31fefdc589c063d1561a384c5e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 5677e7da4b272608091a6bbce3c4584fb49da9f3 Original-Change-Id: Id91a41743330c9e356293cfda7b2e3743dcd480c Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-on: https://review.coreboot.org/20040 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528264 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528264" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/64/528264/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I471dc31bf496936968c3a4a55f7ecac517752e5d" commit="2492e0e36c67780029cda4920beacb3ac8c1e24c" commit_message="UPSTREAM: spi: Remove unused/unnecessary spi_init function definitions Remove spi_init definitions which: 1. Do nothing 2. Set static global variables to 0 BUG=none BRANCH=none TEST=none Change-Id: I471dc31bf496936968c3a4a55f7ecac517752e5d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2dafd897692a257b3727723601ac68f902e746f2 Original-Change-Id: If4c0cdbe2271fc7561becd87ad3b96bd45e77430 Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-on: https://review.coreboot.org/20039 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/528265 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528265" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/65/528265/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I743c991b27887e6e02b45fe1ec42a06005a4dc07" commit="a6c2e37fa8f95fb25478ed3c9f8cdce35d9a8cdf" commit_message="UPSTREAM: util/lint/kconfig_lint: update help checking - Turn the check for help text with no indentation from a warning to an error. - Show an error if the help text is at the same indentation level as the 'help' keyword. BUG=none BRANCH=none TEST=none Change-Id: I743c991b27887e6e02b45fe1ec42a06005a4dc07 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8849f3be4a2c1151e3246affaf9d4c857a793bfa Original-Change-Id: Ibf868c83e2a128ceb6c4d3da7f2cf7dc237054e6 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/19851 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/528266 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528266" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/66/528266/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia8083371f4337a905b94e1325bef8056d2d37a07" commit="01e3defb8f7fea3b4601e3173e2bdc0f73f3df54" commit_message="UPSTREAM: Makefile: add 'filelist' target Add a target to show what files are used in the build. This was already being generated for other targets, but there was no target to just generate and view the list. BUG=none BRANCH=none TEST=none Change-Id: Ia8083371f4337a905b94e1325bef8056d2d37a07 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a18353d7b72e5b7094d25fe5a6c7497993716fcd Original-Change-Id: I6998296bb135d8b7170cacae2be902ef9dac7b54 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/20049 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/528267 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528267" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/67/528267/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5d564165c3842bb64f16db1ee85d24d4bd2dfc52" commit="e2f296f36aba21c26a11fbf673c2dfde21f96892" commit_message="UPSTREAM: util/lint: Give better warning for help spacing issue Because the help block uses significant whitespace to determine whether or not text is inside the help block, a mixture of spaces and tabs confuses the parser. If there's an unrecognized line, and the previous line was inside a help block, it's likely that this line is too. Additionally, this was found with a line that started ' configuration', and threw a perl warning about an uninitialized value because the parser thought this was the start of a new config line, but couldn't find the symbol. Now we make sure that config statements have whitespace after the 'config' statement. BUG=none BRANCH=none TEST=none Change-Id: I5d564165c3842bb64f16db1ee85d24d4bd2dfc52 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 811d93af39142b4e18073574db69bfe36af512b1 Original-Change-Id: I46375738a18903b266ea9fff3102a1a91235e609 Original-Signed-off-by: Martin Roth <gaumless@gmail.com> Original-Reviewed-on: https://review.coreboot.org/19155 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/528268 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528268" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/68/528268/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ieb95c7f281d8f69ecf3cc2e0e176a24923891a2f" commit="c272584694be2bc9542ed5828862de2f0a0d6f3b" commit_message="UPSTREAM: drvs/intel/wifi/wifi: Fix regression Fix regression introduced by commit 5c026445 (drivers/intel/wifi: Add support for generating SSDT table) In case the regular PCI path is taken, there're no chip_ops and the code will segfault. The bug was covered by other bugs that caused this code to never execute. Add NULL pointer checks and only fill in device name if one is provided. Tested on Lenovo T430 and wifi card 8086:0085. BUG=none BRANCH=none TEST=none Change-Id: Ieb95c7f281d8f69ecf3cc2e0e176a24923891a2f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 6086b4ee38bf7f004fdff4e5f783754607da54e5 Original-Change-Id: I84e804f033bcd3af1a7f76670275fdf5159d381f Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-on: https://review.coreboot.org/20082 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/528269 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528269" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/69/528269/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Icc2d79902965feca18c5c502dffcd189329b4c44" commit="4b0663efb9eb3b7622dff8de3601659f14b05ad7" commit_message="UPSTREAM: arch/x86/acpigen: Add additional opcodes Add additional ACPI opcodes, that are going to be used in the following commits. BUG=none BRANCH=none TEST=none Change-Id: Icc2d79902965feca18c5c502dffcd189329b4c44 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a038835716b3a09bd3d5ab3fd7e3d48d3c3a6f13 Original-Change-Id: I20c3aa5a1412e5ef68831027137e9ed9e26ddbc9 Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-on: https://review.coreboot.org/20087 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/528270 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528270" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/70/528270/2" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia5f46992e4d536a21922721eb97061a78e067e74" commit="1d06eccc5a99200fa6aeb7abdf9b0e28afac7f76" commit_message="UPSTREAM: nb/intel/sandybridge/raminit: Advertise correct frequency As of Change-Id: I780d34ded2c1e3737ae1af685c8c2da832842e7c the reference clock can be 100Mhz. Decode the register and use the reference clock to calculate the selected DDR frequency. Tested on Lenovo T430. BUG=none BRANCH=none TEST=none Change-Id: Ia5f46992e4d536a21922721eb97061a78e067e74 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 6ab7e5e0906b02b29e9634343f3e9ca722a1088e Original-Change-Id: I8481564fe96af29ac31482a7f03bb88f343326f4 Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-on: https://review.coreboot.org/19995 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/528271 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="528271" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/71/528271/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I1b1266d20036ca116d81cb744d40d5d4bb3d709d" commit="1bab07381dfe2a674c6574033e19c63adbcbe394" commit_message="usb: Fix configure stream errors 1. When there is only one stream with BLOB format, the resolution of stream on is (0, 0). 2. Restart stream with the same resolution will not trigger stream on BUG=b:24674340 TEST=pass arc_camera3_test Camera3MultiFrameTest.GetFrame Change-Id: I1b1266d20036ca116d81cb744d40d5d4bb3d709d Reviewed-on: https://chromium-review.googlesource.com/513805 Commit-Ready: Heng-ruey Hsu <henryhsu@google.com> Tested-by: Heng-ruey Hsu <henryhsu@google.com> Reviewed-by: Ricky Liang <jcliang@chromium.org> " fail_count="0" gerrit_number="513805" owner_email="henryhsu@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/05/513805/5" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Iac282ca83109dff7b81680aa04f01df8e62dc4a5" commit="f530a56ada3edf680409917e74097b6efb3c5ff4" commit_message="cryptohome: Record free space and xattr size When the ecryptfs->ext4crypto fails with an ENOSPC record UMA stats including the initial free space when the migration started as well as the free space at time of failure. If the error occurs during an attempt to set an xattr, also record the total xattr size of the existing attributes on the file in addition to the xattr that was not successfully set. TEST=cros_workon_make --board=samus --test cryptohome BUG=chromium:731505 Change-Id: Iac282ca83109dff7b81680aa04f01df8e62dc4a5 Reviewed-on: https://chromium-review.googlesource.com/527742 Commit-Ready: Dan Spaid <dspaid@chromium.org> Tested-by: Dan Spaid <dspaid@chromium.org> Reviewed-by: Dan Spaid <dspaid@chromium.org> " fail_count="0" gerrit_number="527742" owner_email="dspaid@chromium.org" pass_count="0" patch_number="4" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/42/527742/4" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Idffb71732bf203536abb27dcd880c92089dce940" commit="12a6636bb712a95f3e3758d267396fa2c0033399" commit_message="cryptohome: Set errno to suppress lsan When unexpected errno is given, base::File::OSErrorToFileError calls UMA_HISTOGRAM_SPARSE_SLOWLY, and for some reason it results in leaks reported by lsan. BUG=chromium:731809 TEST=USE=asan cros_workon_make --board=amd64-generic cryptohome Change-Id: Idffb71732bf203536abb27dcd880c92089dce940 Reviewed-on: https://chromium-review.googlesource.com/530870 Commit-Ready: Ryo Hashimoto <hashimoto@chromium.org> Tested-by: Ryo Hashimoto <hashimoto@chromium.org> Reviewed-by: Hidehiko Abe <hidehiko@chromium.org> " fail_count="0" gerrit_number="530870" owner_email="hashimoto@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/70/530870/5" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Id8458b3886d2218ba507130d61ea7e9ad61d9f7c" commit="3c5ee1bf719ed4602cd61c34b6290ff12723c434" commit_message="cryptohome: Skip migrating GCache/v1/tmp. This path can become a weird state that confuses the migrator (see the BUG.) Chrome anyway deletes all the content of this directory, so there's no need to migrate it anyway. BUG=chromium:728892 TEST=Repro step #c5 in the bug TEST=cros_workon_make --board=reef cryptohome --test Change-Id: Id8458b3886d2218ba507130d61ea7e9ad61d9f7c Reviewed-on: https://chromium-review.googlesource.com/527984 Commit-Ready: Kazuhiro Inaba <kinaba@chromium.org> Tested-by: Kazuhiro Inaba <kinaba@chromium.org> Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org> Reviewed-by: Ryo Hashimoto <hashimoto@chromium.org> " fail_count="1" gerrit_number="527984" owner_email="kinaba@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/84/527984/3" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I57f32e1443347cd9e6f1191764a883fc299a2730" commit="d7bb63a8027d52f2cbc9bcf81d26c1a1e2b55252" commit_message="Chameleon: Power-cycle Type-C ports Type-C dongle becomes corrupted and needs to be re-plugged sometimes. This CL emulate this power-cycle behavior for Type-C ports. BUG=chromium:718571 TEST=Test display_Resolution.mirrored on a video unstable dut and run the test to see if it can be passed. Change-Id: I57f32e1443347cd9e6f1191764a883fc299a2730 Reviewed-on: https://chromium-review.googlesource.com/508531 Commit-Ready: Hsu Wei-Cheng <mojahsu@chromium.org> Tested-by: Hsu Wei-Cheng <mojahsu@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com> " fail_count="4" gerrit_number="508531" owner_email="mojahsu@chromium.org" pass_count="0" patch_number="4" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/31/508531/4" remote="cros" total_fail_count="5"/><pending_commit branch="master" change_id="I1f31afe89a00895434a169401ab76b594ad0a403" commit="1a5ecc02e0c8993ea1be7a67db8e15c17502923e" commit_message="Add a script to generate a keypair for signing Rose RW firmware. Rose decided to leverage the key format of Hammer therefore this script calls Hammer's one to generate a key pair and renames them to key_rose*. BUG=b:37693819 TEST=None BRANCH=None Change-Id: I1f31afe89a00895434a169401ab76b594ad0a403 Reviewed-on: https://chromium-review.googlesource.com/529504 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="1" gerrit_number="529504" owner_email="marcochen@chromium.org" pass_count="0" patch_number="4" project="chromiumos/platform/vboot_reference" project_url="https://chromium-review.googlesource.com/chromiumos/platform/vboot_reference" ref="refs/changes/04/529504/4" remote="cros" total_fail_count="1"/><lkgm version="9642.0.0-rc1"/></manifest> |
