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| <pending_commit branch="chromeos-2016.05" change_id="I21e50441bb458cd76be2a334ceb56fd4b877d73b" commit="a999ccd948cb7eea5e72c63fb765b5eae96c1534" commit_message="UPSTREAM: util/kbc1126: [cosmetic] change Makefile casing BUG=none BRANCH=none TEST=none Change-Id: I21e50441bb458cd76be2a334ceb56fd4b877d73b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b2b1d668269c8af2551df0dbb26a350f92a6795a Original-Change-Id: Iac616fdb3de79f4f58c30a2eb674ed5152b6a6e4 Original-Signed-off-by: Idwer Vollering <vidwer@gmail.com> Original-Reviewed-on: https://review.coreboot.org/21050 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/620589 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620589" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/89/620589/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I99ee7dee7b1082ccc4fbad54c89e706c0b403068" commit="4cc22efd15fd3ba8fe6d6bb91770580b73d0ca7d" commit_message="UPSTREAM: AGESA f14: Sacrifice ACPI S3 support for EARLY_CBMEM_INIT A decision has been made that boards with LATE_CBMEM_INIT will be dropped from coreboot master starting with next release scheduled for October 2017. As existing implementation of CAR teardown in AGESA can only do either EARLY_CBMEM_INIT or ACPI S3 support, choose the former. ACPI S3 support may be brought back at a later date for these platforms but that requires fair amount of work fixing the MTRR issues causing low-memory corruptions. BUG=none BRANCH=none TEST=none Change-Id: I99ee7dee7b1082ccc4fbad54c89e706c0b403068 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: cd7578030b77fd7f2957338285c76f8cbe0b0422 Original-Change-Id: I5d21cf6cbe02ded67566d37651c2062b436739a3 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/20898 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/620590 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620590" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/90/620590/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I75e06d75bcf23abfbfc0eadc1dab0c5da2acc776" commit="3a10e14016a6b81a7be296b01ec3e413566a87f2" commit_message="UPSTREAM: AGESA: Cleanup ACPI S3 support Due to low-memory corruptions S3 support has now been (at least temporarily) removed from AGESA platfroms. Should we bring it back one day, CAR teardown on S3 path will happen with an empty stack so ugly backup/recovery of the stack will no longer be used. If S3 feature is brought back, resume path code for FCH will also see partial rewrite and agesawrapper.c file will not be part of that. BUG=none BRANCH=none TEST=none Change-Id: I75e06d75bcf23abfbfc0eadc1dab0c5da2acc776 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 111926a1664769ab7596f2027ac041c56b5bae35 Original-Change-Id: Ib38c04d0e74f600e0b719940d5e2530f4c726cfd Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/20899 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/620591 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620591" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/91/620591/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0ed07b030720d0c9c27a9cce17a30124c4baa126" commit="1857cc94499c0499b64fc3973cc6d07c4fa2e01a" commit_message="UPSTREAM: AGESA f15tn: Fix MemContext buffer parser for AmdInitPost() Like commit c91ab1cfc that targeted AGESA f14. MemRestore() is still broken after this fix. BUG=none BRANCH=none TEST=none Change-Id: I0ed07b030720d0c9c27a9cce17a30124c4baa126 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f710955b93dddb094b9dacf651fe8a0730b21500 Original-Change-Id: I7457de5e0c52819560e2bfd46b9e351b00d3d386 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/20900 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/620592 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620592" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/92/620592/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia26dac7fb4c60afec14210fcc659d193029c42a1" commit="45dc0eed505cb997e2221147d7b77944ce4c1564" commit_message="UPSTREAM: soc/intel/skylake: Add proper support to enable UART2 in 16550 mode Need to perform a dummy read in order to activate LPSS UART's 16550 8-bit compatibility mode. TEST=Able to get serial log in both 32 bit and 8 bit mode through LPSS UART2 based on CONFIG_DRIVERS_UART_8250MEM_32 and CONFIG_DRIVERS_UART_8250MEM selection. Change-Id: Ia26dac7fb4c60afec14210fcc659d193029c42a1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b27aa82a50cde46d43ea0dd6ad797eb9c248e6c8 Original-Change-Id: I5f23fef4522743efd49167afb04d56032e16e417 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/20939 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/620593 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620593" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/93/620593/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I17aa8fe18949ea5e4cdce8e184681a1b4047e499" commit="94ddde9b020f32056d0693f9a50e0c89f8006030" commit_message="UPSTREAM: soc/intel/cannonlake: Add proper support to enable UART2 in 16550 mode Need to perform a dummy read in order to activate LPSS UART's 16550 8-bit compatibility mode. TEST=Able to get serial log in both 32 bit and 8 bit mode through LPSS UART2 based on CONFIG_DRIVERS_UART_8250MEM_32 and CONFIG_DRIVERS_UART_8250MEM selection. Change-Id: I17aa8fe18949ea5e4cdce8e184681a1b4047e499 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3e550446452a8dad886e02d708aa325266b65663 Original-Change-Id: Ief58fdcb8a91f9951a48c3bd7490b1c7fee17e48 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/20940 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/620594 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620594" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/94/620594/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ie788c2353422ebc642e78812e60ed17016a18497" commit="d33200311c34ef370df890c33c0c4ddab0c62389" commit_message="UPSTREAM: mainboard/google/coral: Add keyboard backlight support BUG=b:64705535 BRANCH=master TEST=emerge-coral coreboot chromeos-bootimage and verify the keyboard backlight can be bright and alt+f6, alt+f7 function keys can be used. Change-Id: Ie788c2353422ebc642e78812e60ed17016a18497 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 82f13e91fa934e787710ed9f1cc0d8a7c18a58cd Original-Change-Id: I777247a6b58d3d50b72f12ca2fcab49a06ed5431 Original-Signed-off-by: Pan Sheng-Liang <Sheng-Liang.Pan@quantatw.com> Original-Reviewed-on: https://review.coreboot.org/21027 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/620595 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620595" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/95/620595/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I13ba009a902897fe2d49de4ce99f6d7c4e46bdce" commit="12c4a648a9f4669b92747b5f697740a77f08293b" commit_message="UPSTREAM: lint: update signed-off-by check The current signed-off-by check doesn't really work well as a lint stable test being run by the pre-commit git hook. This test looks at the PREVIOUS commit instead of the staged commit, which works well on the server. In looking for a way to check the staged commit message, I found the commit-msg hook, which is the correct way to check the staged message. - Update the commit message check from a lint-stable test to a lint-extended test. - Add the check for signed-off-by to the commit-msg hook BUG=none BRANCH=none TEST=none Change-Id: I13ba009a902897fe2d49de4ce99f6d7c4e46bdce Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 0bb936da9ae2454307a1ffb4c97aa7c822c09a9c Original-Change-Id: I8be8aef25730d988c7cf1586ae66ecb839d5f756 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/20920 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Chris Ching <chingcodes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/620596 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620596" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/96/620596/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0b23a82964e6b05f0780a76b6bd91237479568fe" commit="5d1fc08134904ee28f221253e13b2c041df453eb" commit_message="UPSTREAM: util/lint: Change final-newlines to lint-test from lint-extended-test The final newline check is taking longer than we'd like to run. Since it runs on every commit as part of the pre-commit check, we want that to run faster than it currently does. Remove LINT_SKIP_NEWLINE_CHECK as it's no longer needed. BUG=none BRANCH=none TEST=none Change-Id: I0b23a82964e6b05f0780a76b6bd91237479568fe Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 992d8a7711808e7c9ce61c4714d4040ca1cd7e28 Original-Change-Id: Ie945dd6caba84e0d23af499d43367d70b1696089 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/20872 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/620597 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620597" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/97/620597/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I20246ea62db869ab8e49db8fb1a2e7c2f17458be" commit="fcde53eedb5737358a9b42ed620f7b4fa1787128" commit_message="UPSTREAM: soc/intel/skylake: Configure FSP to skip ME MBP step We do not need or use the Management Engine MBP HOB so that step can be skipped when FSP initializes the ME. BUG=b:64479422 TEST=boot with FSP debug enabled binary and ensure that the output indicates this step is being skipped: Skipping MBP data due to SkipMbpHob set! Change-Id: I20246ea62db869ab8e49db8fb1a2e7c2f17458be Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e0b5795b81352aabe72662f48d6b154800021d34 Original-Change-Id: I5ea22ec4b8b47fa17b1cf2bf562337bfaad5ec0d Original-Signed-off-by: Duncan Laurie <dlaurie@google.com> Original-Reviewed-on: https://review.coreboot.org/20951 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://chromium-review.googlesource.com/620598 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620598" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/98/620598/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia8fc1acd11b9bc131885d46c1aee9a1d5b1211d7" commit="580d76cf90857c857c2c09d16f723c6173c2061c" commit_message="UPSTREAM: mainboard/google/poppy: Add ACPI objects for NVMEM device GT24C16S and CAT24C16 The Giantec semiconductor GT24C16S and ON semiconductor CAT24C16 are the industrial standard electrically erasable programmable read only memory (EEPROM's) and this patch adds ACPI objects and power resources for NVMEM device. Update DOVD method to set sensor IO LDO voltage and remove repetitive code from OVFI, VCMP and NVMP power resources. BUG=b:38326541 BRANCH=none TEST=Build and boot soraka. Dump and verify that the generated DSDT table has the required entries. Read the NVMEM content via sysfs interface. Change-Id: Ia8fc1acd11b9bc131885d46c1aee9a1d5b1211d7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e6aab7f1208123b2e0e3afb633572ca094358091 Original-Change-Id: If49ed33b7e1de1eabf317b31ceed8568dfca0aae Original-Signed-off-by: V Sowmya <v.sowmya@intel.com> Original-Reviewed-on: https://review.coreboot.org/20495 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/620599 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620599" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/99/620599/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibfff9a18aed2749458511e4931a79b094f0cea36" commit="de00eb568b8046116eabb30182cf2a2397379478" commit_message="UPSTREAM: soc/intel/apollolake: Fix CONFIG_FSP_CAR build error Remove cpu.h from the cache-as-ram setup and teardown files that rely on the FSP implementation. The struct device statement causes a build failure and there appears to be nothing needed from cpu.h in the two .S files. TEST: Build Google Reef with FSP_CAR selected on Chipset menu and add FSP binaries on the Generic Drivers menu. BUG=none BRANCH=none TEST=none Change-Id: Ibfff9a18aed2749458511e4931a79b094f0cea36 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d0269a636dedbb5ea219f20b5dfa1bebb60720eb Original-Change-Id: I560b730c18d7ec73b65f2e195b790e7dcacfd6bb Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-on: https://review.coreboot.org/21057 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/620600 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620600" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/00/620600/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iec9499ce394ff632c1a8919e345c598d13e74c3d" commit="8a574df942e9acadde11d6a42dc8454d7c98ec41" commit_message="UPSTREAM: arch/x86: Make postcar TempRamExit call generic Move the FSP-specific call for tearing down cache-as-RAM out of postcar.c and replace it with an empty weak function. This patch omits checking if (IS_ENABLED(CONFIG_FSP_CAR)). The temp_ram_exit.c file with the real fsp_temp_ram_exit() is only built when CONFIG_FSP_CAR is true. BUG=none BRANCH=none TEST=none Change-Id: Iec9499ce394ff632c1a8919e345c598d13e74c3d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a102a029c5706a97ca1df6f0939def49b851a656 Original-Change-Id: I9adbb1f2a7b2ff50d9f36d5a3640f63410c09479 Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-on: https://review.coreboot.org/20965 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/620601 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620601" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/01/620601/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9c645e5a02b4b9232b82553a1acc04ec22cf7a81" commit="db41cc3e4097219a7dc198612cf178192aa5fdb0" commit_message="UPSTREAM: intel/common/block/fast_spi: Add config option to disable write status Chrome OS systems rely on the write status register to enable/disable flash write protection and disabling this opcode breaks the ability to enable or disable write protection with flashrom. Add a configure option for this feature that will disable the opcode for Write Status commands unless CONFIG_CHROMEOS is enabled. Tested to ensure that a default build without CONFIG_CHROMEOS has this option enabled while a build with CONFIG_CHROMEOS does not. Also ensured that when this option is disabled (for Chrome OS) then flashrom can be used with the --wp-enable and --wp-disable commands, depending on the state of the external write protect pin. BUG=none BRANCH=none TEST=none Change-Id: I9c645e5a02b4b9232b82553a1acc04ec22cf7a81 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: dc1e6bc2774e0fad2eec31d281c4e3ed22c16fe7 Original-Change-Id: Ia2ef3c3b1e10fba2c437e083f3537022f1fce84a Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/21021 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://chromium-review.googlesource.com/620602 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620602" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/02/620602/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ifd2ca98b0a6ca327f007552c3c88c32bc01f9eeb" commit="f99bbda880c69f9fafed4e272cd1446c7336a46e" commit_message="UPSTREAM: intel/cannonlake/chip: Add initial PCI enum support Add callbacks for initial PCI devices enumeration. BUG=none BRANCH=none TEST=none Change-Id: Ifd2ca98b0a6ca327f007552c3c88c32bc01f9eeb Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 201fa8ffe5908b7fe004fa6a72ccebbde38acb9b Original-Change-Id: Ia8a51973aa2b805d62590114bfc49968244b1668 Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Original-Reviewed-on: https://review.coreboot.org/21053 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/620603 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620603" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/03/620603/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2e0ccdb28a99b796d09ba027125f2d1406d80e3b" commit="fb94460b00a3c6c037997646ea2209cd4239e042" commit_message="UPSTREAM: soc/intel/cannonlake: Add SPI flash controller driver Add SPI driver code for the SPI flash controller, including both fast_spi and generic_spi. BUG=none BRANCH=none TEST=none Change-Id: I2e0ccdb28a99b796d09ba027125f2d1406d80e3b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 321111774ce013b35641fe6d0e03e693974b4a28 Original-Change-Id: Ie45146721f39d3cec20ff5136adf8925c75da1cd Original-Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Original-Reviewed-on: https://review.coreboot.org/21052 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.corp-partner.google.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/620604 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620604" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/04/620604/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I94ee40cdf1818cf5ed8e26c66f2cfd148b393b2a" commit="3ec63b3058079ec8ce2fb537b62b0b417b01b0ec" commit_message="UPSTREAM: soc/intel/common/block: Add functions to common CPU library code This patch adds few helper functions in CPU common libraray code which are mainly needed for ACPI module. The functions those are moved to cpu common code is removed from common acpi files. TEST= System boots properly and no regression observed. Change-Id: I94ee40cdf1818cf5ed8e26c66f2cfd148b393b2a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 5f84310bb1801026b24c57925c8147e33a47a595 Original-Change-Id: Id34eb7e03069656238ca0cbdf6ce33f116e0e413 Original-Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Original-Reviewed-on: https://review.coreboot.org/21051 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/620605 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="620605" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/05/620605/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="I8ecb72eccdfa6ae4b10637857559cb3af0e0439e" commit="ff0a2776ca5205bbe24b4fbf1b2a22e89c7c51d1" commit_message="UPSTREAM: leds: turn off the LED and wait for completion on unregistering LED class device Workqueue, 'set_brightness_work' is used for scheduling brightness control. This workqueue is canceled when the LED class device is unregistered. Currently, LED subsystem handles like below. cancel_work_sync(&led_cdev->set_brightness_work) led_set_brightness(led_cdev, LED_OFF) However, this could be a problem. Workqueue is going to be canceled but LED device needs to be off. The worst case is null pointer access due to scheduling a workqueue. LED module is loaded. LED driver private data is allocated by using devm_zalloc(). LED module is unloaded. led_classdev_unregister() is called. cancel_work_sync() led_set_brightness(led_cdev, LED_OFF) schedule_work() if LED driver uses brightness_set_blocking() In the meantime, driver private data will be freed. ..scheduling.. brightness_set_blocking() callback is invoked. For the brightness control, LED driver tries to access private data but resource is removed! To avoid this problem, LED subsystem should turn off the brightness first and wait for completion. led_set_brightness(led_cdev, LED_OFF) flush_work(&led_cdev->set_brightness_work) It guarantees that LED driver turns off the brightness prior to resource management. Cc: linux-leds@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Milo Kim <milo.kim@ti.com> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com> (cherry picked from commit d1aa577f5e191d77d3ad62da93729b5af9532bb4) Signed-off-by: Wei-Ning Huang <wnhuang@google.com> BUG=b:37971411 TEST=none Change-Id: I8ecb72eccdfa6ae4b10637857559cb3af0e0439e Reviewed-on: https://chromium-review.googlesource.com/562953 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="0" gerrit_number="562953" owner_email="wnhuang@chromium.org" pass_count="0" patch_number="7" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/53/562953/7" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="I08ce86118434e5bee6a6ef58745402313c365b09" commit="7244acc3965d9798e7e2d18b74b40a8c998c3f2f" commit_message="UPSTREAM: leds: core: fix misleading comment after workqueue removal from drivers Now that workqueues have been removed from individual drivers and were replaced with a core-internal workqueue we shouldn't encourage people to add new workqueues to drivers. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com> (cherry picked from commit 70b2563b35b3edcf67819b99e560f3f0f6ce4a9f) Signed-off-by: Wei-Ning Huang <wnhuang@google.com> BUG=b:37971411 TEST=none Change-Id: I08ce86118434e5bee6a6ef58745402313c365b09 Reviewed-on: https://chromium-review.googlesource.com/562954 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="0" gerrit_number="562954" owner_email="wnhuang@chromium.org" pass_count="0" patch_number="7" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/54/562954/7" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="I5f811d78f455e58703f58f90bef9c8227d976a30" commit="d4aa1b9eb44b4f9c3d3271042ab73007cbc311c3" commit_message="UPSTREAM: leds: core: avoid error message when a USB LED device is unplugged When a USB LED device is unplugged the remove call chain calls led_classdev_unregister which tries to switch the LED off. As the device has been removed already this results in a ENODEV error message in dmesg. Avoid this error message by ignoring ENODEV in calls from led_classdev_unregister if the LED device is flagged as pluggable. Therefore a new flag LED_HW_PLUGGABLE was introduced which should be set by all LED drivers handling pluggable LED devices (mainly USB LED devices). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com> (cherry picked from commit d84d80f38f0ff4eb4becf1a3569c8e7b2c463b61) Signed-off-by: Wei-Ning Huang <wnhuang@google.com> BUG=b:37971411 TEST=none Change-Id: I5f811d78f455e58703f58f90bef9c8227d976a30 Reviewed-on: https://chromium-review.googlesource.com/562955 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="0" gerrit_number="562955" owner_email="wnhuang@chromium.org" pass_count="0" patch_number="7" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/55/562955/7" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="I3dd50725d29a63ec96f772b325f7203a99489e7f" commit="521b53558d6f8b1c9e34b9f7f825285bcd32d0b0" commit_message="FROMLIST: HID: google: add google hammer HID driver Add Google hammer HID driver. This driver allow us to control hammer keyboard backlights and support future features. Signed-off-by: Wei-Ning Huang <wnhuang@google.com> (am from https://patchwork.kernel.org/patch/9905315/) BUG=b:37971411,b:63364143 TEST=with stacked CLs, `emerge-soraka chromeos-kernel-4_4` Change-Id: I3dd50725d29a63ec96f772b325f7203a99489e7f Reviewed-on: https://chromium-review.googlesource.com/586210 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Dmitry Torokhov <dtor@chromium.org> " fail_count="0" gerrit_number="586210" owner_email="wnhuang@chromium.org" pass_count="0" patch_number="17" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/10/586210/17" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I32cd48dda2f94b72ebbb07256973d10700518f42" commit="64bef08a354ac049b7a0eb799658a0d4e52c6540" commit_message="goofy.css: Refactor goofy-header style. Refactory style of goofy-header, so it looks better, and works better when we resize the left side of panel. BUG=None TEST=make test TEST=manually on DUT. Change-Id: I32cd48dda2f94b72ebbb07256973d10700518f42 Reviewed-on: https://chromium-review.googlesource.com/620466 Commit-Ready: Pi-Hsun Shih <pihsun@chromium.org> Tested-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> " fail_count="0" gerrit_number="620466" owner_email="pihsun@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/66/620466/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ib99116d99d5de8adb2277914e918bf95e1302432" commit="50da527109ff3d4c4733bb7fc4bbd5427a6de764" commit_message="test_list: Fix JSON test list skipped_tests. The name for device data in eval is device. BUG=None TEST=make test TEST=manually on DUT. Change-Id: Ib99116d99d5de8adb2277914e918bf95e1302432 Reviewed-on: https://chromium-review.googlesource.com/620348 Commit-Ready: Pi-Hsun Shih <pihsun@chromium.org> Tested-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> " fail_count="0" gerrit_number="620348" owner_email="pihsun@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/48/620348/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I43c52a94d55a8e3d65d94be6ec081a6a8acf04e7" commit="3db41d62685a3a133c64b4f46cb71706a8eaf057" commit_message="goofy.js: Silent startup error when there's no error. The empty error handler was incorrectly removed in CL:616624, restore it. BUG=None TEST=make test TEST=manually on DUT. Change-Id: I43c52a94d55a8e3d65d94be6ec081a6a8acf04e7 Reviewed-on: https://chromium-review.googlesource.com/620607 Commit-Ready: Pi-Hsun Shih <pihsun@chromium.org> Tested-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-by: Wei-Han Chen <stimim@chromium.org> " fail_count="0" gerrit_number="620607" owner_email="pihsun@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/07/620607/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I8a5956ae534e921434bbc37689e937bb29e51318" commit="29f0dd4346032ba30cc1eff7bf2a724991818457" commit_message="login: Disable HW codec for cfm screensharing, if flag set. Add startup flag to chrome, to disble hw encoder for guado if running in cfm mode and USE flag indicates it's supported. BUG=b:62726302 TEST=manual Change-Id: I8a5956ae534e921434bbc37689e937bb29e51318 Reviewed-on: https://chromium-review.googlesource.com/616773 Commit-Ready: Erik Språng <sprang@webrtc.org> Tested-by: Erik Språng <sprang@webrtc.org> Reviewed-by: Dan Erat <derat@chromium.org> " fail_count="1" gerrit_number="616773" owner_email="sprang@webrtc.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/73/616773/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ibf0349df780b5e0d65bc094c356566f99f75fc49" commit="10205f01b3a078894091bf75a6266e85ac86d9a9" commit_message="pytest_utils: returns the pytest testcase directly Currently we only have 1 test case per pytest, so when we load a pytest module, we are able to get the testcase instance without ambiguity. BUG=b:64703569 TEST=make test Change-Id: Ibf0349df780b5e0d65bc094c356566f99f75fc49 Reviewed-on: https://chromium-review.googlesource.com/620446 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> " fail_count="0" gerrit_number="620446" owner_email="stimim@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/46/620446/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ifb431abccdba8c49b93deff77952e7d289cf023b" commit="d2776c55c3e95112c2b9776741ab7e8d977e061b" commit_message="goofy.js: Don't maximize splitpane when double click. The goog.ui.SplitPane has a default behavior that double click on split pane handle would maximize one of the pane. The behavior is not very useful, and it's quite easy to misclick on the handle. Remove it. BUG=None TEST=make test Change-Id: Ifb431abccdba8c49b93deff77952e7d289cf023b Reviewed-on: https://chromium-review.googlesource.com/618079 Commit-Ready: Pi-Hsun Shih <pihsun@chromium.org> Tested-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-by: Pi-Hsun Shih <pihsun@chromium.org> " fail_count="0" gerrit_number="618079" owner_email="pihsun@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/79/618079/2" remote="cros" total_fail_count="1"/><lkgm version="9853.0.0-rc4"/></manifest> |
