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BUG=b:62200375 Change-Id: Ic25392119907b4b53d824a3595637400016b9313 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 63300f72920d8ffb2c33669f53b454c794452f92 Original-Change-Id: I9058d9102fc8ea0bd03ea089ba98da4590dd3533 Original-Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Original-Reviewed-on: https://review.coreboot.org/21973 Original-Reviewed-by: Martin Roth <martinroth@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/718461 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718461" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/61/718461/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I24085de5d3acc990caeec1c4a6dac3bc0914662f" commit="c22390293b20eee9ca908b2809c7e462b9deb16d" commit_message="UPSTREAM: soc/intel/cannonlake: Add ACPI platform sleep capability Add the required ACPI sleep states BUG=none BRANCH=none TEST=none Change-Id: I24085de5d3acc990caeec1c4a6dac3bc0914662f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4df1c4cedb51a0e7b249f1af239be30600e9199e Original-Change-Id: I7750062554f087e4f88da56790e4122d5fa20529 Original-Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com> Original-Reviewed-on: https://review.coreboot.org/21975 Original-Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://chromium-review.googlesource.com/718462 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718462" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/62/718462/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I84ae690a7b4beb0317d4879a3f955a07b0e421a9" commit="867207bed7b861f27774e00ca00115abaafd5e45" commit_message="UPSTREAM: mainboard/intel/cannonlake_rvp: Add Sleep states Add sleep state to DSDT table. BUG=none BRANCH=none TEST=none Change-Id: I84ae690a7b4beb0317d4879a3f955a07b0e421a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b4e275f97bc5221b98b91bb5b54f088d07570a57 Original-Change-Id: Ic14e34e29d5f881949765dee5c6b433c1499c491 Original-Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com> Original-Reviewed-on: https://review.coreboot.org/21976 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://chromium-review.googlesource.com/718463 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718463" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/63/718463/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id785cc884806d67e7ca76d08659c31384eca31ea" commit="4da3082a2be500cf1c0d1ed8296cb5439ffd3d13" commit_message="UPSTREAM: soc/intel/cannonlake: add length information for communities TEST = Boot to OS, check if pinctrl probed successfully BUG=none BRANCH=none TEST=none Change-Id: Id785cc884806d67e7ca76d08659c31384eca31ea Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 630b644cecf0cb3ac3dacc8b0854a92d0ac58598 Original-Change-Id: Ib20c955d535cd9c48175b4d3934b4699b6186874 Original-Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Original-Reviewed-on: https://review.coreboot.org/21974 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://chromium-review.googlesource.com/718464 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718464" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/64/718464/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5afd2db927b85f06dbae7bb3ec9d8f725b52fc1d" commit="69e5810a2ae35c3fdc4b65fb853879ac30f70451" commit_message="UPSTREAM: vboot: Exclude platform specific files from RW cbfs Add a Kconfig option to allow platforms to exclude specific files from being copied from RO into RW sections. BUG=b:65484600 TEST=Exclude apu/amdfw from the RW cbfs sections Change-Id: I5afd2db927b85f06dbae7bb3ec9d8f725b52fc1d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: bbd5ee4187dd5b85a8ccf6de28b24a70c0343174 Original-Change-Id: I7723b63392c1620b75ceb6d8e25fe1ce2c75cf18 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/21899 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/718465 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718465" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/65/718465/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I244a78e079d36e4172a0ce50eb632d67df5468e5" commit="37a3ba2ff8806e6537b4469827133c4401aab19b" commit_message="UPSTREAM: soc/intel/common: Clean up PMC library GPE handling API 1. Update gpe handling function names to explicitly mention if they are operating on: a. STD GPE events b. GPIO GPE events c. Both 2. Update comment block in pmclib.h to use generic names for STD and GPIO GPE registers instead of using any one platform specific names. BUG=b:67712608 Change-Id: I244a78e079d36e4172a0ce50eb632d67df5468e5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c4e652ff572d7eea3bbbae21825d0085e294cb98 Original-Change-Id: I03349fe85ac31d4215418b884afd8c4b531e68d3 Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-on: https://review.coreboot.org/21968 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/718466 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718466" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/66/718466/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibc636a6daf08acbdb84af6338a3692ac978dacb3" commit="49ca8056141cf3d3aa8a870740601ae70cd3137d" commit_message="UPSTREAM: intel/common/pmc: Disable all GPEs during pmc_init If GPEs are not cleared during pmc_init, it could result in issues if standard wake events are generated while coreboot is initializing. e.g. (Observed on soraka): 1. Suspend to S3 2. Lidclose 3. Lidopen 4. EC wakes up the host using WAKE# pin 5. On wakeup, pmc_init occurs which does not clear GPEs 6. MP init enables SMI 7. In order to add wake event to elog, coreboot sets wake mask on the EC, which causes the EC to assert WAKE#. 8. Since WAKE# is asserted, it results in an SMI#. However, EC does not de-assert WAKE# until host queries and clears the host event bit (which does not happen since coreboot is stuck in handling the SMIs). This is one of the issues that can occur when GPEs are unnecessarily enabled in coreboot. Before the move to PMC common library, SKL PMC driver set all GPEs to 0 and hence this issue did not occur. This change explicitly disables all GPEs during pmc init in order to avoid any side-effects. BUG=b:67712608 TEST=Verified that device resumes fine using lidclose/lidopen to suspend and resume. Change-Id: Ibc636a6daf08acbdb84af6338a3692ac978dacb3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 74145f7615b67acae77fdf45c3e7f3f373b9b2c7 Original-Change-Id: Ic5be02a23a8dbf43c4d7adf00251639ded4a94c9 Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-on: https://review.coreboot.org/21969 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/718467 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718467" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/67/718467/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I3956561c8fca6e42dcec0e3e24633ddd82a7010e" commit="9afcdf830f33d38ff26e088d65ef1c8a28bf7df0" commit_message="UPSTREAM: drv/intel/gma/opregion: Add common init_idg_opregion() Add a new common method to initialize ACPI OpRegion. * Try to locate vbt.bin in CBFS. * Try to locate VBIOS in CBFS. * Keep existing code to probe at 0xc0000. Tested on Lenovo T430 (sandybridge) using vbt.bin, tested using buggy VBIOS with wrong vbt_offset, tested with fake vbt written by NGI at 0xc0000. Tested with https://review.coreboot.org/#/c/21766/ on i945 (using fake vbt at 0xc0000), x4x (using vbt.bin) and gm45 (using vendor VBIOS). In all cases linux was successfully provided with VBT from ACPI opregion. BUG=none BRANCH=none TEST=none Change-Id: I3956561c8fca6e42dcec0e3e24633ddd82a7010e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 53e41956256bdf52bb5823838c62674e0e838861 Original-Change-Id: I8ee50ea9900537bd9e3ca5ab0cd3f48d2acec970 Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-on: https://review.coreboot.org/20969 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/718468 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718468" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/68/718468/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id6b7d21366669e68a3006f766fe629772b4954a4" commit="dfb22e0e424a937d1b8cd7dc28c2a80f154eec0b" commit_message="UPSTREAM: nb/intel/*/gma: Port ACPI opregion to older platforms Port the ACPI opregion implementation that resides in drivers/intel/gma to older platforms. It allows to include a vbt.bin and allows GNU/Linux to load the opregion as ASLS is being set. Windows' Intel will likely ignore it as it relies on legacy VBIOS to be loaded at 0xc0000. Tested successfully on DG43GT (x4x) with vbt.bin, with X200 (gm45) with vendor option rom and D945GCLF (i945) with fake vbt. BUG=none BRANCH=none TEST=none Change-Id: Id6b7d21366669e68a3006f766fe629772b4954a4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f6aa7d94c8ce003383008c366248faebd1f31e9f Original-Change-Id: I1896411155592b343e48cbd116e2f70fb0dbfafa Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-on: https://review.coreboot.org/21766 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/718469 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718469" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/69/718469/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5614540ffcf90b4ed64f63b88fef73649c8defa2" commit="d1cdb8ae0edfa42e0b562a50a20241a16cdca4e4" commit_message="UPSTREAM: Makefile: Exclude util directory from project_filelist This list should be about files included in the ROM output, not related files. BUG=none BRANCH=none TEST=none Change-Id: I5614540ffcf90b4ed64f63b88fef73649c8defa2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8a02727f508826ef8f1e8bbe7581eedc2e0c1198 Original-Change-Id: I390d58ef9ab76ff05062b5fbc1e031b7c6d2f388 Original-Signed-off-by: Martin Roth <martinroth@google.com> Original-Reviewed-on: https://review.coreboot.org/21698 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/719000 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="719000" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/00/719000/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ie037bc57ced9e8f81d2762a8f8c8cbfe3261f642" commit="1c829bcee28076065f2ca79678934647e36f5802" commit_message="UPSTREAM: google/cyan variants: fix single/dual channel reporting Fix typos in determining single/dual channel in cyan variants which resulted in all boards being reported as 4GB/dual channel in the cbmem console log. These typos were found and fixed in yet-to-be-merged variants; this patch applies the same fixes to already-merged boards. BUG=none BRANCH=none TEST=none Change-Id: Ie037bc57ced9e8f81d2762a8f8c8cbfe3261f642 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a34cf524692737b83bfdf7e482ddf15ab9108c0d Original-Change-Id: I615463668e77bd817d5270f0f04d4d01f74e3b47 Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-on: https://review.coreboot.org/21917 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/719001 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="719001" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/01/719001/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6add83341773fb1b39ae86393fd7dc5c775adcb3" commit="c6b0c56858da3671e00eb6a18c7c5ca8b85aecea" commit_message="UPSTREAM: google/cyan variants: fix non-functional typo in gpio.c Typo found/fixed in to-be-merged boards; applying same fix to already-merged boards. BUG=none BRANCH=none TEST=none Change-Id: I6add83341773fb1b39ae86393fd7dc5c775adcb3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d6735b0f148eba402a27699da6786b1ab4e61b84 Original-Change-Id: I15f97467a5442888165399be997b0b690a3c312a Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-on: https://review.coreboot.org/21918 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/719002 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="719002" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/02/719002/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I3e4b0910693439caef6999cd8242530cb755a991" commit="e2e1cc760eb5500a04c41d1eb734beb3401636dc" commit_message="UPSTREAM: util/crossgcc: Add bootstrap-only mode buildgcc -B (--bootstrap-only) builds only a bootstrap compiler. That useful if you want to package the cross compilers: first build the bootstrap compiler, then all required cross compilers in a separate directory (using the bootstrap compiler through an adjusted PATH). BUG=b:65441143 BRANCH=none TEST=none Change-Id: I3e4b0910693439caef6999cd8242530cb755a991 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9681cdc1b495eb88ed33cacdcd37e2393df6c1c4 Original-Change-Id: I089b51d1b898d4cf530845ba51283997fd229451 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://review.coreboot.org/21683 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/719003 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="719003" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/03/719003/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0cfe285fdab2208f497ddc9cb796b2f9aa639e82" commit="11bd4e6b4e303282aac6a382591fa8de5b7440be" commit_message="UPSTREAM: google/kefka: add new board as variant of cyan baseboard Add support for google/kefka (Dell Chromebook 11 3180) as a variant of the cyan Braswell baseboard. - Add board-specific code as the new kefka variant - Add new shared SPD file to baseboard Sourced from Chromium branch firmware-strago-7287.B, commit ef41a46: Kefka: Modify USB2 settings to match the eye diagram BUG=none BRANCH=none TEST=none Change-Id: I0cfe285fdab2208f497ddc9cb796b2f9aa639e82 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 35213664cf8f490df3e6b79199774b84f7648d01 Original-Change-Id: Ic6c8c5e5b6029bb99039c64b0182214e93552fa2 Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-on: https://review.coreboot.org/21573 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/718900 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718900" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/00/718900/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I80767c509ec83dd902a694b27e1f562ee1c86fef" commit="d31dfb52578ba58c8d94e7b36a0cb8a74db85aec" commit_message="UPSTREAM: google/relm: add new board as variant of cyan baseboard Add support for google/relm (white label Chromebook) as a variant of the cyan Braswell baseboard. - Add board-specific code as the new relm variant - Add new shared SPD files to baseboard Sourced from Chromium branch firmware-strago-7287.B, commit 02dc8db: Banon: 2nd source DDR memory (Micro-MT52L256M32D1PF) BUG=none BRANCH=none TEST=none Change-Id: I80767c509ec83dd902a694b27e1f562ee1c86fef Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c8374e32920d2bffbd5fe7b65621fe0b90cfb19e Original-Change-Id: Ife10f5f75435f356cd896588dd6f425e54f3c88e Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Original-Reviewed-on: https://review.coreboot.org/21574 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Reviewed-on: https://chromium-review.googlesource.com/718901 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718901" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/01/718901/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic9f220714a02aa9603db1e167ebd3f24db74e7de" commit="95bc95a33db1f40bfc2b6f4f382816673b6d2a4a" commit_message="UPSTREAM: src/device: Update LTR configuration scheme This patch moves out LTR programming under L1 substate to pchexp_tune_device function, as substate programming and LTR programming are independent. LTR programming scheme is updated to scan through entire tree and enable LTR mechanism on pci device if LTR mechanism is supported by device. BRANCH=none BUG=b:66722364 TEST=Verify LTR is configured for end point devices and max snoop latency gets configured. Change-Id: Ic9f220714a02aa9603db1e167ebd3f24db74e7de Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2188f57a806feb7b25816d70919f12e5e2ba84b3 Original-Change-Id: I6be99c3b590c1457adf88bc1b40f128fcade3fbe Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Original-Reviewed-on: https://review.coreboot.org/21868 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/718902 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="718902" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/02/718902/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I8bc62c2ad8116d3b7884781d5a53c8b580a4e51d" commit="13a019ab7ad6ed9f00f2afd527cec2578132150d" commit_message="chromeos-config: Add get-firmware-uris to cros_config_host_py CLI Finish piping GetFirmwareUris through to the CLI via the command addition 'get-firmware-uris'. BUG=chromium:771187 TEST=FEATURES=test sudo -E emerge chromeos-base/chromeos-config-tools Change-Id: I8bc62c2ad8116d3b7884781d5a53c8b580a4e51d Reviewed-on: https://chromium-review.googlesource.com/719605 Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Alec Thilenius <athilenius@chromium.org> Reviewed-by: Jason Clinton <jclinton@chromium.org> " fail_count="2" gerrit_number="719605" owner_email="athilenius@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/05/719605/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I92b1cea787b88d4ad2837be49940fbd72030bbf4" commit="e7ed167045fe330376d69050c81e55c9f20ab6c1" commit_message="chromeos-config: Remove string comparisons from unit tests Remove string comparisons from cros_config_host_unittest.py and added very basic sanity checks. Also fixed an sort-order bug. BUG=chromium:771187 TEST=FEATURES=test sudo -E emerge chromeos-base/chromeos-config-tools Change-Id: I92b1cea787b88d4ad2837be49940fbd72030bbf4 Reviewed-on: https://chromium-review.googlesource.com/719974 Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> " fail_count="1" gerrit_number="719974" owner_email="athilenius@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/74/719974/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I4caa08e3b965f4bc77beed46a3ad74c3e084d28e" commit="2c8ed865ecf3f59d38f0044dc259cefe75d897b8" commit_message="chromeos-config: Removed second testGetSharedFirmwareUris Removed the second testGetSharedFirmwareUris from the cros_config_host_unittest.py unit test as it was decided to be unnecessary. BUG=chromium:771187 TEST=FEATURES=test sudo -E emerge chromeos-base/chromeos-config-tools Change-Id: I4caa08e3b965f4bc77beed46a3ad74c3e084d28e Reviewed-on: https://chromium-review.googlesource.com/720017 Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> " fail_count="1" gerrit_number="720017" owner_email="athilenius@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/17/720017/3" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I3139d64609a16032c95d97cf347e5ae1e698a435" commit="85689b938333c0fdc9798720dbac8d4f275ac7cd" commit_message="chromeos_config: apply no_vmtest template late. Apparently pre-cq and other builders don't use CreateBoardConfigs. Move the application of the no_vmtest_builder template to the very end. Also add new unit test to check that no board that isn't listed attempts to run VM tests. Did check that it uncovered several config before this change and not after. BUG=chromium:765364, chromium:772568 TEST=run_tests Change-Id: I3139d64609a16032c95d97cf347e5ae1e698a435 Reviewed-on: https://chromium-review.googlesource.com/719771 Commit-Ready: Ilja H. Friedel <ihf@chromium.org> Tested-by: Ilja H. Friedel <ihf@chromium.org> Reviewed-by: Ilja H. Friedel <ihf@chromium.org> " fail_count="1" gerrit_number="719771" owner_email="ihf@chromium.org" pass_count="0" patch_number="8" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/71/719771/8" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I0021db9c4d4e432b2e00f2a318e37f09c046c272" commit="bb42683e4b441dc403c1d241463e3590e0ef35f7" commit_message="chromeos_config: re-add amd64-generic-asan. In 9af4a9a23a7589ce4dec411604695c4572c75190 I switched all of amd64-generic-asan to betty-asan. Now I have more information and I believe it is better if they co-exist. (amd64-generic is fully public and VM capable, while betty has private bits.) So this is a partial revert and re-adds amd64-generic-asan. BUG=chromium:765364, chromium:772568, chromium:774251 TEST=unittest Change-Id: I0021db9c4d4e432b2e00f2a318e37f09c046c272 Reviewed-on: https://chromium-review.googlesource.com/720151 Commit-Ready: Ilja H. Friedel <ihf@chromium.org> Tested-by: Ilja H. Friedel <ihf@chromium.org> Reviewed-by: Ilja H. Friedel <ihf@chromium.org> " fail_count="1" gerrit_number="720151" owner_email="ihf@chromium.org" pass_count="0" patch_number="1" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/51/720151/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Icbc6019e35fbb574e12392fce300b93df1e65924" commit="989f71792cc0a069a69152948decb4ef1154a50f" commit_message="[autotest] Merge the preconditions into the regular suite. The preconditions are now integrated into the generate script re-run to generate the combined control files. Update to r10 TEST=inspection/diff BUG=chromium:773604, b:67710777 Change-Id: Icbc6019e35fbb574e12392fce300b93df1e65924 Reviewed-on: https://chromium-review.googlesource.com/712695 Commit-Ready: Keith Haddow <haddowk@chromium.org> Tested-by: Keith Haddow <haddowk@chromium.org> Reviewed-by: Keith Haddow <haddowk@chromium.org> " fail_count="1" gerrit_number="712695" owner_email="haddowk@chromium.org" pass_count="0" patch_number="7" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/95/712695/7" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I5888ab3c5218fd12206d2fb3291d900d7f4421f0" commit="ec8575e26bf43e12adc4d77a85404404d8544f5b" commit_message="COMMIT-QUEUE.ini: Create an INI and add moblab. The update_payloads ebuild is part of the update_engine repository, but is used as part of the devserver code, so we only run it's unittests for a small number of boards. Include one of those boards here so we can catch problems before they hit the CQ. BUG=chromium:774689 TEST=None Change-Id: I5888ab3c5218fd12206d2fb3291d900d7f4421f0 Reviewed-on: https://chromium-review.googlesource.com/719772 Commit-Ready: Don Garrett <dgarrett@chromium.org> Tested-by: Don Garrett <dgarrett@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="1" gerrit_number="719772" owner_email="dgarrett@chromium.org" pass_count="0" patch_number="1" project="aosp/platform/system/update_engine" project_url="https://chromium-review.googlesource.com/aosp/platform/system/update_engine" ref="refs/changes/72/719772/1" remote="cros" total_fail_count="1"/><lkgm version="10033.0.0-rc2"/></manifest> |
