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| <pending_commit branch="chromeos-2016.05" change_id="Icfabf77fb9b414facbb2c85b864eb6a0e54e1a94" commit="c77fa943b2727e6a93c5ed9ef95836f2f9c97323" commit_message="UPSTREAM: mb/google/poppy/variants/nami: Use GPP_E4 for BT_OFF# The BT W_DISABLE2# pin is connected to GPP_E4 in the latest schematic. Update GPP_E4 as GPO and set 1 as default. BUG=b:79993692, b:72007632 BRANCH=None TEST=Enable/disable BT/WLAN by following command. Enable: localhost ~ # iotools mmio_write32 0xfdae0590 0x40000201 localhost ~ # iotools mmio_write32 0xfdae05a0 0x40000201 Disable: localhost ~ # iotools mmio_write32 0xfdae0590 0x40000200 localhost ~ # iotools mmio_write32 0xfdae05a0 0x40000200 Change-Id: Icfabf77fb9b414facbb2c85b864eb6a0e54e1a94 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9b26127a45503bf8f048b417df7e40184346ef18 Original-Change-Id: I9ef1a5314652ab29172d246abd58ee4e1a8a6299 Original-Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/26502 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075488 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075488" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/88/1075488/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1e7982b7777394f17bcf19c7e19a0d56a1ee4acf" commit="733789659308b2bd5bb98310ec4aba09d21631e5" commit_message="UPSTREAM: mb/google/reef: fix indention in memory.c In cbdbf018 (mb/google/reef/variants/: Add new memory ID) a new memory configuration entry was added. However, it was using spaces for indention. Correct that. BUG=none BRANCH=none TEST=none Change-Id: I1e7982b7777394f17bcf19c7e19a0d56a1ee4acf Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 59326f35a98beca19b6aeb5c1c95ca1a1f7d8e76 Original-Change-Id: Iaf788b0ad8a6ef3b001e7f29a6710e6e8f731ecf Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://review.coreboot.org/26513 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1075489 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075489" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/89/1075489/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9bc2ba544062e4efba6be6768fc3321556d8df42" commit="ad275c5b6c542b0a64f60b5417957c81e19ae87b" commit_message="UPSTREAM: sb/intel/common/pirq_gen: Rework generating pin-route tables This creates a pin-route matrix first and then generates the ACPI entries based on that. This approach has the advantage of being simpler (no need for checks on double entries) and requiring less access to the pci config space. A few thing that are also fixed: * Don't declare DEFAULT_RCBA redundantly. * Only loop over PCI devices on bus 0 * Add a license header to rcba_pirq.c * Remove inappropriate use of typedefs * Fix the pin field: needs to be a byte * Fix the source field: it should either be a byte or a path (according to Advanced Configuration and Power Interface Specification rev 2.0c) BUG=none BRANCH=none TEST=none Change-Id: I9bc2ba544062e4efba6be6768fc3321556d8df42 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e8620146d964df8e5adfb084ed503bef2d877321 Original-Change-Id: Ic68a91d0cb55942a4d928b30f73e1c779142420d Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/22979 Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075490 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075490" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/90/1075490/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0d34dc687ab685a88c5f26745d4c1f6b9012d652" commit="f31b181b9a5705ff8b7696c9a8ce4da074a5c2db" commit_message="UPSTREAM: mb/google/poppy/variants/nami: Perform PL2 setting in variant_devtree_udpate This change moves PL2 override to variant_devtree_update for two reasons: 1. This function was added to basically override devtree settings in variant specific code. So, it would be a good idea to perform all the overrides in a single place. 2. Adding a device for performing nami_enable would require changes to devicetree and special handling for calling this device enable. Thus, nami_enable was never getting called. BUG=b:80148703 Change-Id: I0d34dc687ab685a88c5f26745d4c1f6b9012d652 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e3011451cccece7668f95e59dfb6f61c878b7e0a Original-Change-Id: Ifa24a7b6e99cad2368b3d656a757f26297373121 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://review.coreboot.org/26499 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1075491 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075491" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/91/1075491/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic2a6d68c6c0e2192622624a144175ddecca17797" commit="3580e6495e816a68b8017b49262c539790838289" commit_message="UPSTREAM: mb/intel/dg41wv: Add mainboard This board was used a test target for the x4x DDR3 raminit patches and has an easy to access DIP8 socket. What is tested and works: * S3 resume * PEG, PCI, USB, SATA * Sound * Ethernet * Native graphic init (textmode and linear fb) on the VGA output * Passing memtest86+ with 2 2Rx8 4G dimms * PS2 Keyboard * Flashing coreboot internally from vendor BIOS. What does not work: * Running dram at 533 MHz (limited at 400MHz currently) Tested with two 4G dual rank DDR3 dimm, booted SeaBIOS and Linux 4.10. BUG=none BRANCH=none TEST=none Change-Id: Ic2a6d68c6c0e2192622624a144175ddecca17797 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: fbc508fbb84ddbd047a8fde271c3877f032e48d1 Original-Change-Id: If01bf658e52d273c3c203d362f21c3cb9c623f40 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/20003 Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075492 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075492" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/92/1075492/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ib146e05c1bc8cdf8a25629dc65c08a50a8772946" commit="155c70ebeb82cf159b49475a6bce9b90469923cc" commit_message="UPSTREAM: mainboard/intel/dg41wv: Fix lint check error Fix lint error due to non-ASCII characters BUG=none BRANCH=none TEST=check if no error in checkpatch.pl script. Change-Id: Ib146e05c1bc8cdf8a25629dc65c08a50a8772946 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2aa13eff9d5df7c19898acecbcdb2fda1ec00d44 Original-Change-Id: Iec7682e460c8e0d467a70349a23390554cc1de92 Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Original-Reviewed-on: https://review.coreboot.org/26562 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075493 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075493" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/93/1075493/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ife7b131e1aea298b6799669ab302252d01461298" commit="1df855e0178e456ed5640a6d6c8c0a343ef3fadf" commit_message="UPSTREAM: stoneyridge GPIO: Create and use PAD_INT for interrupt pins The default interrupt control for GPIO pins within stoneyridge is for edge triggered, high. However, sometimes these need to change, or maybe the interrupt needs to be reported or delivered. This was the case of platform grunt, where the interrupt related bits were being changed afterwards. Ideally all the bits should be programmed through the same procedure. Create several PAD_INT definitions (for general configuration, for trigger configuration and for interrupt type configuration) and change function sb_program_gpios() to accept the output from PAD_INT_XX and program all the necessary bits while keeping compatibility with other PAD_XX definitions. BUG=b:72875858 TEST=Add code to report GPIO and interrupt configuration, build grunt and record a baseline. Add new code, rebuild grunt and record a test output. Compare baseline against test, there should be no change in GPIO or interrupt programming. Remove code that reports GPIO/interrupt configuration. Change-Id: Ife7b131e1aea298b6799669ab302252d01461298 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2db06bba0fdeb2465108da487b0b2d1ecedef985 Original-Change-Id: I3457543bdf64ec757fd82df53c83fdc1d03c1f22 Original-Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Original-Reviewed-on: https://review.coreboot.org/25758 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/1075494 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075494" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/94/1075494/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I73e300952c9bd1d2d7555c8975b56537ab6f6c19" commit="84542e2a7ded2db0c55cf69e890a33ad6cf03a58" commit_message="UPSTREAM: amd: Don't call halt() when in SMM This copies what Intel does. BUG=b:80295434 TEST=grunt: Made sure that the S5 SMI interrupt gets fired. Change-Id: I73e300952c9bd1d2d7555c8975b56537ab6f6c19 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 06bc4d712c4276115c4e7692836fb8928689217a Original-Change-Id: I7874824cad01054c6bdeff12d248e671f27be030 Original-Signed-off-by: Raul E Rangel <rrangel@chromium.org> Original-Reviewed-on: https://review.coreboot.org/26545 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1075495 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075495" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/95/1075495/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic84d36aae56325e11197af299930c338209e149f" commit="2d8e8172b7c10d2b49990440257021c352545f8a" commit_message="UPSTREAM: grunt: Wire up the EC SMI handler This won't actually get called yet since the GPIO pin has not been configured as SMI. BUG=b:80295434 TEST=grunt: Made sure events could be processed. Change-Id: Ic84d36aae56325e11197af299930c338209e149f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8173ad1ed79e6d191c5ed7d4a06c20d0536b485b Original-Change-Id: I189e26196e4543b3e34bff5d9df8566eff07d585 Original-Signed-off-by: Raul E Rangel <rrangel@chromium.org> Original-Reviewed-on: https://review.coreboot.org/26546 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1075496 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075496" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/96/1075496/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5c73fa55b95ba5a345cc4db656c71d61c8610c70" commit="33ab604633c638717361d91c572a1ac37cab3c7b" commit_message="UPSTREAM: soc/intel/cannonlake: Select common XHCI code This patch select CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI to include common xhci code block. BUG=b:78109109 BRANCH=none TEST=Build and boot cnlrvp Change-Id: I5c73fa55b95ba5a345cc4db656c71d61c8610c70 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 98376b84592aea85089f047957c39b3889136574 Original-Change-Id: I7f1e59792159dae5835fbbe7fcb1604fc01893ba Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/26465 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1075497 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075497" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/97/1075497/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ib2d316de5c8655e6784cf473a7b9e845b9fd6fda" commit="09ce68b31b41e7f182fe44533964692024318328" commit_message="UPSTREAM: Documentation: Add HP Compaq 8200 and NPCD378 BUG=none BRANCH=none TEST=none Change-Id: Ib2d316de5c8655e6784cf473a7b9e845b9fd6fda Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: facc08c47aded7002b1a867fb7dd67640f6e2830 Original-Change-Id: I56db0cc11cfa5a1a537091553393542312d4f212 Original-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Original-Reviewed-on: https://review.coreboot.org/26543 Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075498 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075498" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/98/1075498/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic38f9561840486980bb23b0c77c2c3f793f16017" commit="ae4b6685fb748fb521df0ada1a650cd39ad21a96" commit_message="UPSTREAM: Documentation: More markdown fixes after switching to sphinx Fix markdown code to work with sphinx. BUG=none BRANCH=none TEST=none Change-Id: Ic38f9561840486980bb23b0c77c2c3f793f16017 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 90f515a14b531ba6740419acedb3eb65d6efa13f Original-Change-Id: I52014494dc2d09731fe14ab527073352ada860d1 Original-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Original-Reviewed-on: https://review.coreboot.org/26544 Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075499 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075499" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/99/1075499/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I52b126c8e22b15567fa2f81975466cfe46a040ac" commit="5f049dd4232223e3d20f45e586aa1ef94ccbc59e" commit_message="UPSTREAM: soc/nvidia: Get rid of device_t Use of device_t has been abandoned in ramstage. BUG=none BRANCH=none TEST=none Change-Id: I52b126c8e22b15567fa2f81975466cfe46a040ac Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3fcb2185658a17169fd7df007c236ce084aad74f Original-Change-Id: I065ed3a0deab2f59e510717f5d52beb2a62e900d Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/26537 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://chromium-review.googlesource.com/1075500 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075500" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/00/1075500/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6f036199eed4174d68b23a06c87187b59fb8d8c4" commit="73bc8f6f9dcd640542582397d7393a84f222c4cb" commit_message="UPSTREAM: soc/qualcomm: Get rid of device_t Use of device_t has been abandoned in ramstage. BUG=none BRANCH=none TEST=none Change-Id: I6f036199eed4174d68b23a06c87187b59fb8d8c4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d6cd2553210d303eb8593400dfc87f7f71d7d995 Original-Change-Id: Ib7bcfefaecc053a1ed28d708a614acb81207bccf Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/26536 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://chromium-review.googlesource.com/1075501 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075501" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/01/1075501/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iac3c7892cd46547486305740c126f164be1f89e3" commit="e145d0438e1399990e2828e6e5839a2e814c26d2" commit_message="UPSTREAM: soc/intel/quark: Get rid of device_t Use of device_t has been abandoned in ramstage. BUG=none BRANCH=none TEST=none Change-Id: Iac3c7892cd46547486305740c126f164be1f89e3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 696545db7bf3dd2682a1d636db5411fe0e7c0c54 Original-Change-Id: I102c9b9b1066064589149388d5ebbcd6d0d81fa7 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/26542 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://chromium-review.googlesource.com/1075502 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075502" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/02/1075502/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If4bf5ceb95dc56079df655e050033c28307cea75" commit="694348712798ae4897f70fd5b51b7fc0550eb5e1" commit_message="UPSTREAM: acpi: device: Walk up the tree to find identifier Instead of just checking the immediate parent for an device name, walk up the tree to check if any parent can identify the device. This allows devices to be nested more than one level deep and still have them identified in one place by the SOC. The recursive method calling this function has been changed to handle a null return from acpi_device_name and abort instead of continuing and perhaps forming an invalid ACPI path. BUG=none BRANCH=none TEST=none Change-Id: If4bf5ceb95dc56079df655e050033c28307cea75 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4702914e34a1cd3dc04f1396d549a120918abb58 Original-Change-Id: Ic17c5b6facdcb1a0ac696912867d62652b2bf18e Original-Signed-off-by: Duncan Laurie <dlaurie@google.com> Original-Reviewed-on: https://review.coreboot.org/26487 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1075503 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075503" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/03/1075503/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I63bed2cb0a7620a53474d0673f9810603a5f52e4" commit="50afe9f9456d699186d76cafee6c10e9cc45e7bc" commit_message="UPSTREAM: drivers/i2c/max98373: update DT property names Upstream Kernel side codec driver expect DT properties to have 'maxim' prefix. Update accordingly while filling SSDT entries. BUG=b:79362472 TEST=dump DT properties in kerenl side and cross checked TEST=Audio playback works with this change Change-Id: I63bed2cb0a7620a53474d0673f9810603a5f52e4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: adb176b81a14f048d64e26980c0b4a87068dca66 Original-Change-Id: Iaa4b14492dbb5a0087242f1485493f3192336f60 Original-Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Original-Reviewed-on: https://review.coreboot.org/26532 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1075504 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075504" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/04/1075504/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1ad04fb2edf8b00c55fe04d9d5432163cdb2c416" commit="fee77fd952942f08a243f7bc97fddaff47e131a3" commit_message="UPSTREAM: intel/skylake: nhlt: Update Max98373's capture format Max98373's NHLT capture configuration is used for IV feedback for DSM algorithm. Feedback is 4-channel data. Without this configuration below error is seen in dmesg: [ 315.784250] snd_soc_skl 0000:00:1f.3: Blob NULL for id 0 type 3 dirn 1 [ 315.784263] snd_soc_skl 0000:00:1f.3: PCM: ch 4, freq 48000, fmt 32 So, update nhlt configuration accordingly. BUG=b:79362472 TEST=Audio playback works with IV feedback enabled Change-Id: I1ad04fb2edf8b00c55fe04d9d5432163cdb2c416 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 89a82371e8633e0b982d0c914932042a379f0547 Original-Change-Id: I75434a63fe030ed9bb963c6d300d833a8e7d2d66 Original-Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Original-Reviewed-on: https://review.coreboot.org/26384 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075505 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075505" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/05/1075505/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5102b801f1731cc34dcfb2512f9c19271b850957" commit="eef5bbcd4d0af764a7bead5f8af264a007ad5fcf" commit_message="UPSTREAM: soc/intel/apollolake: Don't use pulldowns in standby state for 1.8/3.3V pins. These pins should not have pull downs configured in standby state as that can cause contention on the termination circuitry and lead to incorrect behavior as per Doc# 572688 Gemini Lake Processor GPIOTermination Configuration. Furthermore, some of these pins were configured with normal termination of None which would as per above mentioned document lead to a standby termination of None anyways. Instead of pull downs, use the IOSSTATE setting for driving low via the Tx mode. BUG=b:79874891, b:79494332, b:79982669 BRANCH=None TEST=Flashed image and booted to OS on Yorp. Touchscreen does not consume power in suspend state. Change-Id: I5102b801f1731cc34dcfb2512f9c19271b850957 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: dc3910cfd7e59301a323a7cd98339876e4f79f87 Original-Change-Id: I7dcf3691b969d018b3cfb6af3f7467c9b523fee5 Original-Signed-off-by: Shamile Khan <shamile.khan@intel.com> Original-Reviewed-on: https://review.coreboot.org/26491 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1075506 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075506" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/06/1075506/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Idce6d7f7a3006dc6eb20537b9fd3b44966c02875" commit="2a0e42f6381dd32eda65d5389de3fa508b21cf89" commit_message="UPSTREAM: fsp_broadwell_de: Select TSC_MONOTONIC_TIMER by default This is currently selected by each derivative board's Kconfig even though it's really an SoC-specific option. BUG=none BRANCH=none TEST=none Change-Id: Idce6d7f7a3006dc6eb20537b9fd3b44966c02875 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: da8e2ca32e85603f4f2636f2428d1a0d987f7a26 Original-Change-Id: Iad135261915a0857c53c18aaebde7e46c97a8f40 Original-Signed-off-by: David Hendricks <dhendricks@fb.com> Original-Reviewed-on: https://review.coreboot.org/26344 Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1075647 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075647" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/47/1075647/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id294d617d38a32be0cb7ee054283e471cc60f7a4" commit="bbbfa5da50ea5673a16146aae4a670caa2215916" commit_message="UPSTREAM: arch/x86: Define HPET_ADDRESS_OVERRIDE Symbol defined in via/cx700 but also used elsewhere. BUG=none BRANCH=none TEST=none Change-Id: Id294d617d38a32be0cb7ee054283e471cc60f7a4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b433d26ef11b78dda353723ff7c8797d06f76f21 Original-Change-Id: I31d6043e71dea474de00f609b9609a628ecc6eb8 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/26510 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/1075648 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1075648" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/48/1075648/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I1d3012107b0c29148268fb076ebc27f9bd5c497b" commit="5d21391dcb95086f0f798f764acc1f6e67737507" commit_message="adhd: Fix memory leak in cras_alsa_card (11/16 leaking tests for the issue) Free dev get from ucm_get_dev_for_mixer in filter_controls. BUG=chromium:844092 TEST=Apply full patch set and run FEATURES="test noclean nostrip" emerge-eve adhd and valgrind --leak-check=full --show-leak-kinds=all alsa_card_unittest Change-Id: I1d3012107b0c29148268fb076ebc27f9bd5c497b Reviewed-on: https://chromium-review.googlesource.com/1073130 Commit-Ready: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> " fail_count="3" gerrit_number="1073130" owner_email="paulhsia@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/adhd" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/adhd" ref="refs/changes/30/1073130/1" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I497db1ae9232d5e357f60973a21a6bef0aee78ec" commit="1156aeced7ecf842a0cba76a4efd60c3dac6ee76" commit_message="adhd: Fix memory leak in alsa_card_unittest (11/16 leaking tests for the issue) Call destroy for cras_alsa_card. Initialize enum. Remove unused ucm_section. Make alsa stub functions snd_pcm_info_get_name and snd_pcm_info_get_id. BUG=chromium:844092 TEST=Apply full patch set and run FEATURES="test noclean nostrip" emerge-eve adhd and valgrind --leak-check=full --show-leak-kinds=all alsa_card_unittest Change-Id: I497db1ae9232d5e357f60973a21a6bef0aee78ec Reviewed-on: https://chromium-review.googlesource.com/1073131 Commit-Ready: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> " fail_count="3" gerrit_number="1073131" owner_email="paulhsia@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/adhd" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/adhd" ref="refs/changes/31/1073131/1" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I8e7b6b96da8a9b9e6523a3c1aadc8bb10a10e8e0" commit="803770173f69ebf8c6c5820135af689edde28884" commit_message="adhd: Fix memory leaks in cras_alsa_ucm (12/16 leaking tests for the issue) Free several local allocated char* in cras_alsa_ucm functions. BUG=chromium:844092 TEST=Apply full patch set and run FEATURES="test noclean nostrip" emerge-eve adhd and valgrind --leak-check=full --show-leak-kinds=all alsa_ucm_unittest Change-Id: I8e7b6b96da8a9b9e6523a3c1aadc8bb10a10e8e0 Reviewed-on: https://chromium-review.googlesource.com/1073347 Commit-Ready: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> " fail_count="2" gerrit_number="1073347" owner_email="paulhsia@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/adhd" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/adhd" ref="refs/changes/47/1073347/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I7d92707cc7fa4f6d43281fc58aec7db1d114935b" commit="a11dca9bf7b39a540ac8695e97eb51edc5a1d895" commit_message="adhd: Fix memory leaks in alsa_ucm_unittest (12/16 leaking tests for the issue) Free several local allocated char* in tests in alsa_ucm_unittest. BUG=chromium:844092 TEST=Apply full patch set and run FEATURES="test noclean nostrip" emerge-eve adhd and valgrind --leak-check=full --show-leak-kinds=all alsa_ucm_unittest Change-Id: I7d92707cc7fa4f6d43281fc58aec7db1d114935b Reviewed-on: https://chromium-review.googlesource.com/1073348 Commit-Ready: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> " fail_count="2" gerrit_number="1073348" owner_email="paulhsia@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/adhd" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/adhd" ref="refs/changes/48/1073348/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I4ca4bcafd81694e5e16a5c920d3f7a4093147297" commit="1c6a6dc8d2773470cdd5e1b27b932df68b171269" commit_message="Rename bridge.conf to arc-network-bridge.conf. BUG=b:79129901 TEST=Ran on DUT. CQ-DEPEND=CL:1073038 Change-Id: I4ca4bcafd81694e5e16a5c920d3f7a4093147297 Reviewed-on: https://chromium-review.googlesource.com/1073039 Commit-Ready: Hidehiko Abe <hidehiko@chromium.org> Tested-by: Hidehiko Abe <hidehiko@chromium.org> Reviewed-by: Yusuke Sato <yusukes@chromium.org> Reviewed-by: Eric Caruso <ejcaruso@chromium.org> " fail_count="2" gerrit_number="1073039" owner_email="hidehiko@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/39/1073039/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I5f1238865f14e0a79517904355144be82371db44" commit="21abd4c1d95215eaae54c3f8c5f0d81c7dc83b7f" commit_message="arc: Rename bridge.conf to arc-network-bridge.conf. For logging purpose, arc- prefix is useful so rename the script. BUG=b:79129901 TEST=Ran on DUT. CQ-DEPEND=CL:1073039 Change-Id: I5f1238865f14e0a79517904355144be82371db44 Reviewed-on: https://chromium-review.googlesource.com/1073038 Commit-Ready: Hidehiko Abe <hidehiko@chromium.org> Tested-by: Hidehiko Abe <hidehiko@chromium.org> Reviewed-by: Yusuke Sato <yusukes@chromium.org> Reviewed-by: Eric Caruso <ejcaruso@chromium.org> " fail_count="2" gerrit_number="1073038" owner_email="hidehiko@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/38/1073038/2" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="Ie1b2fe4746a5fd5938289ff5bc1c4a699d067988" commit="4d13c9eea18b543ee0e16dd40e6dc06ec0125bbb" commit_message="Update comment along with the file renaming. BUG=b:79129901 TEST=n/a CQ-DEPEND=CL:1073038 Change-Id: Ie1b2fe4746a5fd5938289ff5bc1c4a699d067988 Reviewed-on: https://chromium-review.googlesource.com/1072989 Commit-Ready: Hidehiko Abe <hidehiko@chromium.org> Tested-by: Hidehiko Abe <hidehiko@chromium.org> Reviewed-by: Yusuke Sato <yusukes@chromium.org> Reviewed-by: Eric Caruso <ejcaruso@chromium.org> " fail_count="2" gerrit_number="1072989" owner_email="hidehiko@chromium.org" pass_count="0" patch_number="1" project="aosp/platform/system/connectivity/shill" project_url="https://chromium-review.googlesource.com/aosp/platform/system/connectivity/shill" ref="refs/changes/89/1072989/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="Ied474ce906442b2a065ef7d1959f02179d38c897" commit="bac619f780824f56103ae77b5ccdbc258f7b27f2" commit_message="cbuildbot: Add Tast to autotest_server_package.tar.bz2. Include the tast and remote_test_runner executables and test bundles and data files in a "tast" directory within the autotest_server_package.tar.bz2 file that's generated by the UploadTestArtifacts and MoblabVMTest stages. These files are needed for Server-Side Packaging in order to run versions of remote tests that match the DUT's system image. BUG=chromium:845289 TEST=updated unit test; also performed builds and verified that autotest_server_package.tar.bz2 contains a 'tast' directory with the expected files Change-Id: Ied474ce906442b2a065ef7d1959f02179d38c897 Reviewed-on: https://chromium-review.googlesource.com/1072964 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Aviv Keshet <akeshet@chromium.org> " fail_count="7" gerrit_number="1072964" owner_email="derat@chromium.org" pass_count="0" patch_number="5" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/64/1072964/5" remote="cros" total_fail_count="7"/><pending_commit branch="master" change_id="I10c5efd176f4b6f5cdc0912a576586e8b1c2e4bb" commit="625182595796ce80ebc1f2f197343c8c87b8fdab" commit_message="autotest: Make tast.py use host files installed from SSP. Make the tast.py server test fall back to using Tast host files installed to /usr/local/tast from autotest_server_package.tar.bz when using Server-Side Packaging. This replaces the old logic to use CIPD-installed files from /opt/infra-tools. BUG=chromium:845289 TEST=passes locally and in tryjobs CQ-DEPEND=Ied474ce906442b2a065ef7d1959f02179d38c897 Change-Id: I10c5efd176f4b6f5cdc0912a576586e8b1c2e4bb Reviewed-on: https://chromium-review.googlesource.com/1072719 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Aviv Keshet <akeshet@chromium.org> " fail_count="7" gerrit_number="1072719" owner_email="derat@chromium.org" pass_count="0" patch_number="4" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/19/1072719/4" remote="cros" total_fail_count="7"/><pending_commit branch="master" change_id="Ia7df759636f97fc2beae9d7931d78cd1fb4fe37e" commit="1da077f374700afaf768d71431ea839c8842f731" commit_message="tast: Add -buildlocalrunner flag. Add a flag that can be passed to the tast "run" and "list" subcommands to force local_test_runner to be built and pushed to the DUT. This is useful when testing changes to local_test_runner. BUG=none TEST=manual: passed new flag and verified that local_test_runner is built and pushed even if it already exists on the DUT Change-Id: Ia7df759636f97fc2beae9d7931d78cd1fb4fe37e Reviewed-on: https://chromium-review.googlesource.com/1074167 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Jason Clinton <jclinton@chromium.org> " fail_count="7" gerrit_number="1074167" owner_email="derat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/tast" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast" ref="refs/changes/67/1074167/1" remote="cros" total_fail_count="7"/><pending_commit branch="master" change_id="I9b30c04805917d38a992a53a1397bb08cfe6f46b" commit="22f1a1ff9fa2b001fe070230fc57429b38a2b688" commit_message="tast: Uniquify "run_tests" timing stage. Rename the "run_tests" timing stage (previously used by both run.local and run.remote) to "run_local_tests" and "run_remote_tests". There are no consumers of timing.json, and I wasn't planning on requiring stage names to be unique, but using different names here makes it easier to see where time is going. BUG=none TEST=ran tests and looked at timing.json in results dir Change-Id: I9b30c04805917d38a992a53a1397bb08cfe6f46b Reviewed-on: https://chromium-review.googlesource.com/1074087 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Jason Clinton <jclinton@chromium.org> " fail_count="7" gerrit_number="1074087" owner_email="derat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/tast" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast" ref="refs/changes/87/1074087/1" remote="cros" total_fail_count="7"/><pending_commit branch="master" change_id="I9019e056a7c68816a0f868c2e371e0627ec20103" commit="d15c935a597026430cdba23b30247cf01800d590" commit_message="autotest: Delete testHostDirMissing. Delete a flaky test in shared_host_dir_unittest.py. BUG=chromium:843268 TEST=shared_host_dir_unittest.py passes locally Change-Id: I9019e056a7c68816a0f868c2e371e0627ec20103 Reviewed-on: https://chromium-review.googlesource.com/1067732 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Aviv Keshet <akeshet@chromium.org> " fail_count="21" gerrit_number="1067732" owner_email="derat@chromium.org" pass_count="0" patch_number="2" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/32/1067732/2" remote="cros" total_fail_count="21"/><pending_commit branch="master" change_id="I9b21b5ae389480d92f0f663fbb846b0f27b15de1" commit="ad0aa247d6c0a9e16c50fb9b77f09d19f5482ecc" commit_message="rma_reset: add p256 ECC option This patch adds RMA shared secret generation support using the p256 curve. It is not a simple shoe in replacement for the x25519 because of a different key representations. This new code uses openssl library for all calculations. A new option is being added to indicate that p256 is supposed to be used, the new server Key ID value is used for p256, which allows to pick the correct curve when parsing the previously generated challenge. BRANCH=none BUG=b:73296606 TEST=verified that the same secret value is generated on the client and server side when using either x25519 or p256 curves. ./rma_reset -t ./rma_reset -c <challenge generated by the previous command> ./rma_reset -t -p ./rma_reset -c <challenge generated by the previous command> Change-Id: I9b21b5ae389480d92f0f663fbb846b0f27b15de1 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1073757 Reviewed-by: Randall Spangler <rspangler@chromium.org> " fail_count="0" gerrit_number="1073757" owner_email="vbendeb@chromium.org" pass_count="0" patch_number="6" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/57/1073757/6" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I390bd901a84213fddf9edb4332c29054e440dcdb" commit="e545894bd17ba10915d731ed1d35637e7ff07d4d" commit_message="power_suspend: Add additional RTC time on octopus To give us enough time to fully suspend on octopus, this increases the wakeup delay by 5 seconds. BUG=b:79782439 TEST=power_Resume on octopus Change-Id: I390bd901a84213fddf9edb4332c29054e440dcdb Reviewed-on: https://chromium-review.googlesource.com/1074487 Commit-Ready: Derek Basehore <dbasehore@chromium.org> Tested-by: Derek Basehore <dbasehore@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> " fail_count="0" gerrit_number="1074487" owner_email="dbasehore@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/87/1074487/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Icffd833ef4fd4fde899b7adb0d9b8c9fa708420e" commit="9d76c992326d52973f8f0f67afd9110b97c338d5" commit_message="CHROMIUM: alsa-lib, alsa-plugins, alsa-utils: upgraded packages to upstream Upgraded media-libs/alsa-lib to version 1.1.6-r1 on amd64, arm, x86 Upgraded media-plugins/alsa-plugins to version 1.1.6 on amd64, arm, x86 Upgraded media-sound/alsa-utils to version 1.1.6 on amd64, arm, x86 verified+1 from @intel.com ensures that it doesnt cause any audio regression in any x86 chromebook. BUG= b:78152106 TEST= ./build_packages --board=<BOARD> installs 1.1.6 version of alsa-lib, alsa-utils and alsa-plugins. Change-Id: Icffd833ef4fd4fde899b7adb0d9b8c9fa708420e Signed-off-by: Abhijeet Kumar <abhijeet.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1045947 Commit-Ready: Abhijeet Kumar <abhijeet.kumar@intel.corp-partner.google.com> Tested-by: Girish DS <girish.ds@intel.corp-partner.google.com> Reviewed-by: Dylan Reid <dgreid@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org> " fail_count="0" gerrit_number="1045947" owner_email="abhijeet.kumar@intel.corp-partner.google.com" pass_count="0" patch_number="3" project="chromiumos/overlays/portage-stable" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/portage-stable" ref="refs/changes/47/1045947/3" remote="cros" total_fail_count="0"/><lkgm version="10729.0.0-rc6"/></manifest> |
