blob: a5f93d57421ec34ed0f990c61f283ac76fe7c60f [file] [log] [blame]
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<pending_commit branch="chromeos-2016.05" change_id="I639357023f689887c4554d08e9a58d677d17bc16" commit="f612d613eda00540222f400d7f65fbf1f8b78c12" commit_message="UPSTREAM: riscv: add support to check machine length at runtime Highest two bits of misa can be used to check machine length. Add code to support this. BUG=none BRANCH=none TEST=none Change-Id: I639357023f689887c4554d08e9a58d677d17bc16 Signed-off-by: Patrick Georgi &lt;pgeorgi@google.com&gt; Original-Commit-Id: ce1af8b0bf8569ad2d0ebc7bc7b0babe1579c7f2 Original-Change-Id: I3bab301d38ea8aabf2c70437e179287814298b25 Original-Signed-off-by: Xiang Wang &lt;wxjstz@126.com&gt; Original-Reviewed-on: https://review.coreboot.org/27770 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Jonathan Neuschfer &lt;j.neuschaefer@gmx.net&gt; Reviewed-on: https://chromium-review.googlesource.com/1208490 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Tested-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Reviewed-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="2" gerrit_number="1208490" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/90/1208490/1" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Ia30dc5dfbfe8a4d06ceb2afb421f70de72905ea1" commit="f08b2678212f4b2eb283e28f60583e1e936c131c" commit_message="UPSTREAM: mb/lenovo: Support dual graphics for xx20/xx30 ThinkPads Add CMOS option that allows to use both integrated and discrete GPU. Tested on ThinkPad W530. BUG=none BRANCH=none TEST=none Change-Id: Ia30dc5dfbfe8a4d06ceb2afb421f70de72905ea1 Signed-off-by: Patrick Georgi &lt;pgeorgi@google.com&gt; Original-Commit-Id: 384e9aed8c477922c960e2cbd429bd3a15b371de Original-Change-Id: I8842fef0fa1235eb91abf6b7e655ed4d8598adc7 Original-Signed-off-by: Evgeny Zinoviev &lt;me@ch1p.com&gt; Original-Reviewed-on: https://review.coreboot.org/28393 Original-Reviewed-by: Patrick Rudolph &lt;siro@das-labor.org&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1208491 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Tested-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Reviewed-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="2" gerrit_number="1208491" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/91/1208491/1" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Ibf609832972c22b43577154d29cca55ba9d90221" commit="7a072777976befc2eff0d46ecb9b8da1c6f45c17" commit_message="UPSTREAM: riscv: add entry assembly file for RAMSTAGE RAMSTAGE will revoke CAR/scratchpad, so stack and exception handling needs to be moved to ddr memory. So add a assembly file to do this. BUG=none BRANCH=none TEST=none Change-Id: Ibf609832972c22b43577154d29cca55ba9d90221 Signed-off-by: Patrick Georgi &lt;pgeorgi@google.com&gt; Original-Commit-Id: 21ed107958b3a2525f01875162d5a83a7900d4b4 Original-Change-Id: I58aa6ff911f385180bad6e026d3c3eace846e37d Original-Signed-off-by: Xiang Wang &lt;wxjstz@126.com&gt; Original-Reviewed-on: https://review.coreboot.org/28384 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1208492 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Tested-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Reviewed-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="2" gerrit_number="1208492" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/92/1208492/1" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Ifdb13ac306c11abb008edef7dcfaf42558ae0721" commit="44c70ae8d3b155bffd418e7abff3039eef731b22" commit_message="UPSTREAM: mb/intel/dg43gt/dsdt.asl: fix globalnvs.asl include path Use ICH10's file instead of ICH7's. BUG=none BRANCH=none TEST=none Change-Id: Ifdb13ac306c11abb008edef7dcfaf42558ae0721 Signed-off-by: Patrick Georgi &lt;pgeorgi@google.com&gt; Original-Commit-Id: 0fc76910d6e71b48ae5fc42735b0a706fb09f83f Original-Change-Id: I02678179e8f1dbd9b9f7d6407383a7a6cad15011 Original-Signed-off-by: Stefan Tauner &lt;stefan.tauner@gmx.at&gt; Original-Reviewed-on: https://review.coreboot.org/28450 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Arthur Heymans &lt;arthur@aheymans.xyz&gt; Reviewed-on: https://chromium-review.googlesource.com/1208493 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Tested-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Reviewed-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="2" gerrit_number="1208493" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/93/1208493/1" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Ic4be2821dfbd819214d2a2561025ae6e46e8f910" commit="704a9cdd2744744f14f87649263f198cae3ba9e0" commit_message="UPSTREAM: arch/x86/Makefile: include dependencies for romcc bootblock We already explicitly generated a dependencies file for the romcc bootblock. Though, as it has its own rule and isn't registered to any of our object-file classes, the dependencies file wasn't included automatically. BUG=none BRANCH=none TEST=none Change-Id: Ic4be2821dfbd819214d2a2561025ae6e46e8f910 Signed-off-by: Patrick Georgi &lt;pgeorgi@google.com&gt; Original-Commit-Id: 4ba7b26019235d82b4c84361552ab6dff5766762 Original-Change-Id: I441cf229312dff82f377dcb594939fb85c441eed Original-Signed-off-by: Nico Huber &lt;nico.huber@secunet.com&gt; Original-Reviewed-on: https://review.coreboot.org/28442 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1208494 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Tested-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Reviewed-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="2" gerrit_number="1208494" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/94/1208494/1" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="If81166166c3a0adcc110ff61c47af48cbbeb28d0" commit="29b6c8cfc1d33b30aacad9697d1e1e6439d6d89b" commit_message="UPSTREAM: nb/intel/x4x/gma.c: fix skipping of native graphics init CB:27984 (e6c8f7e) is supposed to skip over NGI if bit #1 in register GCC is set. However the check for x4x was wrongly checking if any bit of the whole register is set. BUG=none BRANCH=none TEST=none Change-Id: If81166166c3a0adcc110ff61c47af48cbbeb28d0 Signed-off-by: Patrick Georgi &lt;pgeorgi@google.com&gt; Original-Commit-Id: 3e3bae03cffba8d997cb8816b71828f1bc1d244a Original-Change-Id: I5000f5e771abb98f046e2ad19c1bee7dbc0743fc Original-Signed-off-by: Stefan Tauner &lt;stefan.tauner@gmx.at&gt; Original-Reviewed-on: https://review.coreboot.org/28447 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Arthur Heymans &lt;arthur@aheymans.xyz&gt; Original-Reviewed-by: Felix Held &lt;felix-coreboot@felixheld.de&gt; Reviewed-on: https://chromium-review.googlesource.com/1208495 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Tested-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; Reviewed-by: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="2" gerrit_number="1208495" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/95/1208495/1" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="Ic2ec4d9dde5a0abef25426fc3a57c03d220efaeb" commit="d61b346151960979f2119810597905505ff66ebc" commit_message="UPSTREAM: mainboard/google/kahlee: Enable the BCLK buffer Set GPIO135 high to enable audio through the BCLK buffer. BUG=b:113559558 TEST=None BRANCH=grunt Change-Id: Ic2ec4d9dde5a0abef25426fc3a57c03d220efaeb Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 11f7298249837507832c7b08f6c773dcf89d47f3 Original-Change-Id: I1dcecf5960d3c91e0c2165e7f8856ff423c06e8c Original-Signed-off-by: Martin Roth &lt;martinroth@google.com&gt; Original-Reviewed-on: https://review.coreboot.org/28482 Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Original-Reviewed-by: Raul Rangel &lt;rrangel@chromium.org&gt; Original-Reviewed-by: Daniel Kurtz &lt;djkurtz@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1213884 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213884" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/84/1213884/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I23ef982cdc1f66f54b815c9641e9e0c07b638194" commit="bb13f80a213344ca2b5e8114b4ae615cb41cb241" commit_message="UPSTREAM: mb/google/octopus: Enable TBMC device This change enables tablet mode ACPI device for all octopus boards. BUG=b:113348027 Change-Id: I23ef982cdc1f66f54b815c9641e9e0c07b638194 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: c36e8bf24fdc42808be57336d7fcfb36c161859a Original-Change-Id: I69a5dd41cd0958b93f8eed338fed4b6ee77a178f Original-Signed-off-by: Amanda Huang &lt;amanda_hwang@compal.corp-partner.google.com&gt; Original-Reviewed-on: https://review.coreboot.org/28466 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Original-Reviewed-by: Furquan Shaikh &lt;furquan@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213885 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213885" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/85/1213885/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I5eb2e18aa24865efaae79b2e502b38b5ef19f4eb" commit="c79c3eb0fc3ab3de11b7daa4aaed0936792db09a" commit_message="UPSTREAM: intel/fsp2_0: Add fsp2.1 shared stack feature support FSP 2.1 implementation is adding features on top of fsp2_0. One such feature is a shared stack implementation that requires coreboot to allocate stack for fspm and then fsp uses the same stack as coreboot. This implementation adds support for shared stack feature. BUG=none BRANCH=none TEST=none Change-Id: I5eb2e18aa24865efaae79b2e502b38b5ef19f4eb Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 6d569e0c6b9a3e16d2a2c7276b26aba163b97dbc Original-Change-Id: I6581111dbaddfa403eca14100577ccc8a05c4ec7 Original-Signed-off-by: Aamir Bohra &lt;aamir.bohra@intel.com&gt; Original-Reviewed-on: https://review.coreboot.org/28358 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Original-Reviewed-by: Subrata Banik &lt;subrata.banik@intel.com&gt; Original-Reviewed-by: Furquan Shaikh &lt;furquan@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213886 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213886" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/86/1213886/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Id83b057da0e45145956fe9ee3f83e6e730a7aee1" commit="073976a14d4df1c132361b1ce4e9194fbcd7817f" commit_message="UPSTREAM: mb/google/poppy/variants/nautilus: Bump VCC_SA voltage offset 75mV Nautilus-Wifi with m3 AP got a halt issue during CTS test. Nautilus-Wifi was FCS with Celeron AP first and also its PCB/BOM was validated only with Celeron. Since Celeron deos not support turbo boost mode, its steady power demend and lower CPU frequency may not reflect the potential noise hidden inside the board. Bumping VCC_SA voltage offset 75mV confirmed works to mitigate the potential noise coupling to VCC_GT/SA, and we verified this change makes this issue go away on Nautilus-Wifi board. Nautilus-LTE doesn't show this issue, since it has 10L PCB, will have better grounding and less noise/ripple than 8L PCB. BUG=b:111417632 BRANCH=poppy TEST=Verified CTS test pass without an issue. Change-Id: Id83b057da0e45145956fe9ee3f83e6e730a7aee1 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: c76e53ce30a13f77c0f3282a649ca4bfd84dede8 Original-Change-Id: Id13fcc36a5b6ed42620c66f57a7303f30bff1a50 Original-Signed-off-by: Seunghwan Kim &lt;sh_.kim@samsung.com&gt; Original-Reviewed-on: https://review.coreboot.org/28439 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Furquan Shaikh &lt;furquan@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213887 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="2" gerrit_number="1213887" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/87/1213887/1" remote="cros" total_fail_count="2"/><pending_commit branch="chromeos-2016.05" change_id="I6c5ff04262805f932769dff115760c0481638f5c" commit="89136ee547234bc0e25da9dc821831421d87de10" commit_message="UPSTREAM: src/include: Introduce guid_t type Duplicate the guid_t and GUID_INIT framework from the Linux driver. Adapt it for coreboot, and create supporting copy and compare functions. BUG=none BRANCH=none TEST=none Change-Id: I6c5ff04262805f932769dff115760c0481638f5c Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 05b1bac072bf10f092d19014eb1e84b9182f8c24 Original-Change-Id: Ia1cd7a1f0e0f900858830e1a6a7e2bbbe272fa30 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28467 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213888 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213888" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/88/1213888/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I7a535100de8aacc82933f291a15bcb6369567b18" commit="85cdffc5e51bee8cd70ff5ba8f1964a9b876d235" commit_message="UPSTREAM: src/include: Add CPER definitions Add definitions from the UEFI appendix on Common Platform Error Record (appx. N in revision 2.7-A). The structures and fields defined are the minimum required for generating ACPI Boot Error Record data in a subsequent patch. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: I7a535100de8aacc82933f291a15bcb6369567b18 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: fd39f915f58694759a6781ffae5f98776b780d6f Original-Change-Id: I74d8ec8311de749e891827747b84dce0e737aceb Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28468 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213889 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213889" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/89/1213889/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I106eded4a6470672284f02770948bc191ead9557" commit="dac03efa8a1a6690a36ccce56d719677c76a4d4f" commit_message="UPSTREAM: x86/acpi: Add APEI definitions Add ACPI Platform Error Interfaces definitions that will be used for building a BERT table region in a subsequent patch. Two tables are defined: the Generic Error Status Block, Generic Error Data Entry. For reference, see the ACPI specification 6.2-A tables 381 and 382. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: I106eded4a6470672284f02770948bc191ead9557 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 8e5e9cf1a89c66859564679dfd74c847d20bf9d9 Original-Change-Id: Ib9f4e506080285a7c3de6a223632c6f70933e66c Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28469 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213890 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213890" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/90/1213890/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="If7befc3b12890dd5028e631b29dd25888faf0329" commit="e5ec97e14b84637e3011db9a215f07c09bdaa156" commit_message="UPSTREAM: chromeos/gnvs: remove function and naming cleanup - Remove unused acpi_get_chromeos_acpi_info (see CB:28190) - Make function naming in gnvs.h consistent (start with &quot;chromeos_&quot;) BUG=b:112288216 TEST=compile and run on eve Change-Id: If7befc3b12890dd5028e631b29dd25888faf0329 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 6fbd87439119d3c1d99adfbcf0265f2f9c53723e Original-Change-Id: I5b0066bc311b0ea995fa30bca1cd9235dc9b7d1b Original-Signed-off-by: Joel Kitching &lt;kitching@google.com&gt; Original-Reviewed-on: https://review.coreboot.org/28406 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Original-Reviewed-by: Paul Menzel &lt;paulepanter@users.sourceforge.net&gt; Original-Reviewed-by: Furquan Shaikh &lt;furquan@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213891 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213891" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/91/1213891/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I1bc20c3f6b47b063c43df5a61aea40118ef18f42" commit="8111639043b0a791c27a1c6fba77cd31275f12ad" commit_message="UPSTREAM: soc/intel/common: Add function to set BILD bit in RTC Add a function to set the Bios Interface Lock Down bit (bit 31) in RTC Configuration register (0x3400). This bit when set prevents the top swap enable bit (bit 0) in the RTC BUC register (0x3414) from being changed. BUG=none BRANCH=none TEST=none Change-Id: I1bc20c3f6b47b063c43df5a61aea40118ef18f42 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 55597ff2799d0028179f0ce84a5c9cfec4971194 Original-Change-Id: Iacaeeb0d6cabcf0c2c46a58948457ab832351476 Original-Signed-off-by: Rizwan Qureshi &lt;rizwan.qureshi@intel.com&gt; Original-Reviewed-on: https://review.coreboot.org/28057 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1213892 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213892" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/92/1213892/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Icae0064bd0243307558199217fe3368d58668504" commit="1581e52913fe69bb2cfb8a17c889a09e67ca4970" commit_message="UPSTREAM: mb/google/poppy/variants/nocturne: Enable DMIC CLK0/DATA0 DMIC's are now connected to DMIC_CLK0/DMIC_DATA0. So, enable the pins accordingly. BUG=b:113744731,b:111106010 BRANCH=none TEST='emerge-nocturne coreboot chromeos-bootimage' builds the image Change-Id: Icae0064bd0243307558199217fe3368d58668504 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 6f70d51facd3332f2fcc057fe0eed818d4d347c3 Original-Change-Id: I48cace3c6099a2853fcb377c695a5e325094baf6 Original-Signed-off-by: Sathyanarayana Nujella &lt;sathyanarayana.nujella@intel.com&gt; Original-Signed-off-by: Harsha Priya &lt;harshapriya.n@intel.com&gt; Original-Reviewed-on: https://review.coreboot.org/28433 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Furquan Shaikh &lt;furquan@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213893 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213893" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/93/1213893/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ia71e28cd6ddecf6567c6bc7497b1b195c5c39101" commit="bc12d6fdd9f02b249a0e4ba91b4e9caf998d2f93" commit_message="UPSTREAM: mediatek: Refactor memory test code among similar SoCs Refactor memory test code which will be reused among similar SoCs. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: Ia71e28cd6ddecf6567c6bc7497b1b195c5c39101 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 79b990d96535f394fc97c796230f1d572e5a2732 Original-Change-Id: I800aa9a73f0b4588f46a98c964e2794bdf04f09d Original-Signed-off-by: Tristan Shieh &lt;tristan.shieh@mediatek.com&gt; Original-Reviewed-on: https://review.coreboot.org/28436 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Joel Kitching &lt;kitching@google.com&gt; Original-Reviewed-by: Julius Werner &lt;jwerner@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213894 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213894" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/94/1213894/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ib085420b0af1857da91d93cadf4a3fd0c838eedb" commit="128f9caa80e4d02d7ce993051124a251f7dbbc5c" commit_message="UPSTREAM: soc/intel/cannonlake: Fix Coverity Scan report Fix uninitialized variable OnModuleSpd, init bool with false first. BUG=CID 1395330, 1395331 TEST=N/A Change-Id: Ib085420b0af1857da91d93cadf4a3fd0c838eedb Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 013ebbfa58e82fb420226adb4da6ce90c285b00d Original-Change-Id: I050287370f7321ff9905937304bb3cc7f20d8c6a Original-Signed-off-by: Lijian Zhao &lt;lijian.zhao@intel.com&gt; Original-Reviewed-on: https://review.coreboot.org/28409 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1213895 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213895" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/95/1213895/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ia3607db1e40b02f1de43ecafc69714190b3e6c1a" commit="25bc52a250e60e57cecedcab522331b55b37bc9e" commit_message="UPSTREAM: mainboard/google/poppy/variants/rammus: Enable GSPI clock for bus 0. On rammus, system halt was observed because of gspi clk value being set to 0. Log info from serial coreboot: FMAP: area RW_NVRAM found @ 9fa000 (24576 bytes) SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x1000000 VBNV: Restore from flash failed ASSERTION ERROR: file 'src/soc/intel/common/block/gspi/gspi.c', line 443 gspi.c 442 443 assert(gspi_clk_mhz != 0); 444 assert(ref_clk_mhz != 0); 445 return (DIV_ROUND_UP(ref_clk_mhz, gspi_clk_mhz) - 1) &amp; SSCR0_SCR_MASK; BUG=none BRANCH=master TEST=emerge-rammus coreboot chromeos-ec chromeos-bootimage Flash FW to DUT, and make sure system boots up. Change-Id: Ia3607db1e40b02f1de43ecafc69714190b3e6c1a Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: e781856af1d68318c2d876ebb9daa7e68db0ae01 Original-Change-Id: Ibe3937902901b2cdc1a196415c08fabb0f3155f2 Original-Signed-off-by: YanRu Chen &lt;kane_chen@pegatron.corp-partner.google.com&gt; Original-Reviewed-on: https://review.coreboot.org/28405 Original-Reviewed-by: Furquan Shaikh &lt;furquan@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1213896 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213896" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/96/1213896/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Id83c3bb9bebdc74650cb3074811673173363173f" commit="fee0a5e77638ddedf28daa945ec7e69c6530ab3a" commit_message="UPSTREAM: wedge100s: enable mrc cache in fmap this enables mrc cache in fmap for wedge100s and always enable it in Kconfig. BUG=none BRANCH=none TEST=none Change-Id: Id83c3bb9bebdc74650cb3074811673173363173f Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 1c8f699758cab20ef839a3fe023fb7bd6373eebc Original-Change-Id: I27cd236f67a6500b40fc3eb731397d408402f041 Original-Signed-off-by: Okash Khawaja &lt;okash.khawaja@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28527 Original-Reviewed-by: Philipp Deppenwiese &lt;zaolin.daisuki@gmail.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1213897 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213897" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/97/1213897/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ie0f14b308970a487b24b4420bd3b09111e5addb8" commit="90a91bcb0173f43014651352572dee68eb0f97f9" commit_message="UPSTREAM: qemu-q35: Use the TSC for udelay Use the TSC for delays on q35, ensuring that the TSC delay code is included in the correct stages when selected. Tested on qemu-35 and wedge-100s (for no regressions). BUG=none BRANCH=none TEST=none Change-Id: Ie0f14b308970a487b24b4420bd3b09111e5addb8 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 401f8c59bd955d9b435ebab06fa1a3d0dd138765 Original-Change-Id: I3f8368509807974bfcf2a0fcff7a4aa21adf47ed Original-Signed-off-by: Michael van der Westhuizen &lt;rmikey@fb.com&gt; Original-Reviewed-on: https://review.coreboot.org/28526 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Paul Menzel &lt;paulepanter@users.sourceforge.net&gt; Original-Reviewed-by: Patrick Rudolph &lt;siro@das-labor.org&gt; Original-Reviewed-by: Philipp Deppenwiese &lt;zaolin.daisuki@gmail.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213898 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213898" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/98/1213898/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Iba32de050d66048a02bda8595d46b281bc9ec0e3" commit="583ae3b4b8e0c3b7088a8ea500e3f40c49b7e67f" commit_message="UPSTREAM: mb/google/octopus: Configure H1 interrupt pad using Rx level config This change configures GPIO_63 (which is used for H1 interrupts) as Rx Level. This ensures that the signal gets passed on to the next logic state as is and the APIC entry can be configured to trigger interrupt on level or edge as per the kernel driver expectation. TEST=Verified that no H1 interrupt timeouts are seen with 100 iterations of warm and 100 iterations of cold reboot. Change-Id: Iba32de050d66048a02bda8595d46b281bc9ec0e3 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 2d602098f9def150d1111f334a668391c25da5cf Original-Change-Id: I7aac30300a4251d9b40276dcca7ebc6a6d814c40 Original-Signed-off-by: Furquan Shaikh &lt;furquan@google.com&gt; Original-Reviewed-on: https://review.coreboot.org/28507 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Aaron Durbin &lt;adurbin@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1213899 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213899" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/99/1213899/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ide7235e11ca0a3e75b336466c2a89cb8e628704b" commit="c807787e9c7f852d8aebd93e943a88a09466b481" commit_message="UPSTREAM: fsp_broadwell_de: enable spi console this enables spi console for wedge100s with broadwell_de. the console size is 64kb. enabling spi console in `board.fmd` enables code which calls into `timer_monotonic_get` (from `spi_flash_cmd_poll_bit`) and `udelay` (from `ich_status_poll`). this patch selects `TSC_CONSTANT_RATE` in fsp_broadwell_de's Kconfig to satisfy that. BUG=none BRANCH=none TEST=none Change-Id: Ide7235e11ca0a3e75b336466c2a89cb8e628704b Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: dd5411a8b1c7d94de98eab3a23e655a7267d818c Original-Change-Id: Ib925c5aee88b65c46a81534405c364dd5649f8e8 Original-Signed-off-by: Okash Khawaja &lt;okash.khawaja@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28528 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Philipp Deppenwiese &lt;zaolin.daisuki@gmail.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1213900 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213900" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/00/1213900/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I9750eb68fa2dfd0f3f2dc5527bc00591d28174bf" commit="6097e40dce78dde61a02157df980e8c9c64f38b7" commit_message="UPSTREAM: wedge100s: Add TPM support BUG=none BRANCH=none TEST=none Change-Id: I9750eb68fa2dfd0f3f2dc5527bc00591d28174bf Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: fad5395879bc7c8834587393296fa98d3c6dda95 Original-Change-Id: Id7e8ad63de2a6094c66cbd47ae9b7707a9af4e81 Original-Signed-off-by: Mikolaj Walczak &lt;mwalczak@fb.com&gt; Original-Reviewed-on: https://review.coreboot.org/28529 Original-Reviewed-by: Philipp Deppenwiese &lt;zaolin.daisuki@gmail.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1213901 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1213901" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/01/1213901/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I5479843e2fb653bed8bbdabbe6dfe19b039623ff" commit="db8deb26dcfdde337997aa7be43b185e5c9db5b2" commit_message="UPSTREAM: include/cper.h: Add max of enum Define the maximum value of the cper_x86_check_type enum, for use later in determining a legal function argument. BUG=none BRANCH=none TEST=none Change-Id: I5479843e2fb653bed8bbdabbe6dfe19b039623ff Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 03b99772f748c227d3d30e191fd409e363380726 Original-Change-Id: I73df4c6daa5d232c2d38b0896442b5bcab5aa15f Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28533 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214142 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214142" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/42/1214142/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="If6db5d347d51458ed23d9c7b96d3babf8cf3c2dc" commit="d71a91b394f4b9cd6320a7b5febd154838d4fcfe" commit_message="UPSTREAM: arch/x86: Add BERT region support functions Add code for generating the region pointed to in an ACPI Boot Error Record Table. The BERT region must be reported as Reserved to the OSPM, so this code calls out to a system-specific region locator. cbmem is reported as type 16 and is not usable for the BERT region. Events reported via BERT are Generic Error Data, and are constructed as follows (see ACPI and UEFI specs for reference): * Each event begins with a Generic Error Status Block, which may contain zero or more Generic Data Entries * Each Generic Data Entry is identifiable by its Section Type field, and the data structures associated are also in the UEFI spec. * The GUIDs are listed in the Section Type field of the CPER Section Descriptor structure. BERT doesn't use this structure but simply uses its GUIDs. * Data structures used in the Generic Data Entry are named as Error Sections in the UEFI spec. * Some sections may optionally include a variable number of additional structures, e.g. an IA32/X64 processor error can report error information as well as machine contexts. It is worth noting that the Linux kernel (as of v4.4) does not attempt to parse IA32/X64 sections, and opts to hexdump them instead. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: If6db5d347d51458ed23d9c7b96d3babf8cf3c2dc Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 991467da4d42fd5c66a1bb693d5ecaacd651204a Original-Change-Id: I54826981639b5647a8ca33b8b55ff097681402b9 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28470 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214143 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214143" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/43/1214143/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Iec68a81b29e533a0ee69fb2653d9c4572d827492" commit="e614d06809703f3a8710090a11998fa4e3b9c338" commit_message="UPSTREAM: x86/acpi: Add BERT to the revision table Add the proper table revision level for the Boot Error Record Table. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: Iec68a81b29e533a0ee69fb2653d9c4572d827492 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 44705c6e5e5075f450d6acaa470a04b620deb13f Original-Change-Id: Ib4596fe8c0dd2a4e2e98df3a1bb60803c48d0256 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28471 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214144 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214144" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/44/1214144/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ib01e5e34ed0e783c6e3eef53b58354cf017dea79" commit="c42278da861250dac0d7b84aaf16f17586ff83b4" commit_message="UPSTREAM: x86/acpi: Add BERT table Create a structure for the Boot Error Record Table, and a generic table generator function. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: Ib01e5e34ed0e783c6e3eef53b58354cf017dea79 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 1d8d369dad880a9787bd97ff01ecb2434d328374 Original-Change-Id: Ibeef4347678598f9f967797202a4ae6b25ee5538 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28472 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1214145 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214145" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/1214145/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ia89436968228d300f39d7616957dadd94e0586e1" commit="2ee4212086d5c1c147e36c26a05a579792be6b40" commit_message="UPSTREAM: amd/fam15: Add more MCA information Add more definitions to be used for Machine Check Architecture support, mainly for determining the type of error that is being interpreted. MCA is described in detail in the BKDG. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: Ia89436968228d300f39d7616957dadd94e0586e1 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: bb7f1b41e7cf04f81c9ed37b1e275495fa4397a9 Original-Change-Id: I0682288aa58c69aee323fb43f74027f7a1905b68 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28473 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1214146 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214146" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/46/1214146/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="Ifc0c8569ea4d3677e6e5a818daa05d05fbb6a2d2" commit="67bebdbcb21ae134e7ee983ea11fee5915bcf148" commit_message="UPSTREAM: amd/stoneyridge: Adjust memory map for reserved Carve out memory to be reported to the OS as reserved. This makes room for a region usable for Boot Error Record Table information. The BERT region reserved size is larger than likely requried, however the SMM region's base must be on a boundary matching the granularity of its size. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: Ifc0c8569ea4d3677e6e5a818daa05d05fbb6a2d2 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 4b0f6fa156a9a474adb2e1e296ed990458ecdf26 Original-Change-Id: I0958f6b6bab3fe9dae36c83e1fd9ae6ed0290a18 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28474 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214147 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214147" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/47/1214147/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I1612023e180c97b9e0f35697d52802c24cfe93ee" commit="dbeca29ba85514240242f5a15926edd344e26397" commit_message="UPSTREAM: amd/stoneyridge: Relocate MCA error identification Move the process of interrogating the Machine Check registers into its own file. This rearranges source code in preparation of supporting a Boot Error Record Table, which stoneyridge will use to report latent MC errors to the OS. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: I1612023e180c97b9e0f35697d52802c24cfe93ee Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 0b4a1e220a62ec531c4850167ef000cf4715b474 Original-Change-Id: Ia3275e9135dc96ba4a717c9371f38843fa1e3e64 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28475 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1214148 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214148" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/48/1214148/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I446514683c793dfbfc7c2756d11858b747b10930" commit="322f02b5500b1eb5233cbbde08cf22db5ae297bd" commit_message="UPSTREAM: amd/stoneyridge: Create an MCA structure Convert the Machine Check reporting to use a newly defined structure. This will facilitate later patches that will pass pointers to the MSR values. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: I446514683c793dfbfc7c2756d11858b747b10930 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: e1bd38bec5164de0faf164eb8b28f472ec10b4a8 Original-Change-Id: I0a98aecc83a0fa1c5ca7926849a89145a595d9ff Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28476 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214149 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214149" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/49/1214149/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I877c5e2d650151c46ce3ea9b18515736be4348f3" commit="d0d4614ca81fffee401cad701c9b0138e3bc3785" commit_message="UPSTREAM: amd/stoneyridge: Construct BERT region from machine check Add functions to build a Boot Error Record Table region based on settings found in the MCA registers. Two entries are reported for each error due to the nature of the ACPI driver. The first is a Generic Processor Error, which the OS recognizes and parses. Generic errors cannot convey much error description or processor context. Therefore an IA32/X64 Processor Error is also added, which allows reporting the values found in the MCA MSR registers. Follow-on work could decode the MC errors more precisely, and better completing the Generic Error and the Check structure. The current level of support is sufficient to identify a (i.e., human readable) problem in dmesg, and provides adequate context information for analysis. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: I877c5e2d650151c46ce3ea9b18515736be4348f3 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 64e1fcaaf9d424dd28a8da68292d340701a874b7 Original-Change-Id: I4d4ce29ddefa22aa29e6d3184f1adeaea1d5f837 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28477 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214150 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214150" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/50/1214150/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="I773a237b9edadad70b1431831cacd8b8840147df" commit="108208b4fb3504260d1d312759795528d46a9daf" commit_message="UPSTREAM: amd/stoneyridge: Construct ACPI BERT table Add a Boot Error Record Table to the ACPI information. Avoid a driver error message by skipping the table altogether when no errors are found, or support isn't built in. BUG=b:65446699 TEST=inspect BERT region, and dmesg, on full patch stack. Use test data plus a failing Grunt system. Change-Id: I773a237b9edadad70b1431831cacd8b8840147df Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 653f760b133fcad4b6465a25867f0c6d9b24bdb0 Original-Change-Id: I6fe38eefacaad0bc73d0cb4ae44a339a45857128 Original-Signed-off-by: Marshall Dawson &lt;marshalldawson3rd@gmail.com&gt; Original-Reviewed-on: https://review.coreboot.org/28478 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214151 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214151" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/51/1214151/1" remote="cros" total_fail_count="1"/><pending_commit branch="chromeos-2016.05" change_id="If336267d847beddfecc7b5ca0de8c202623a7789" commit="f966b30648fb2fcac585d277da70a9a64cd1bc7f" commit_message="UPSTREAM: lib/gpio.c: Fix _gpio_base3_value invalid shift Coverity CID 1395334: (BAD_SHIFT) - In function _gpio_base3_value(), if gpio_num is 32 and gpio[31] is floating, the end result is 1 &lt;&lt; 32, which does not fit into a int. To avoid a possible error, make it an error to have num_gpio &gt; 31. Function _gpio_base2_value also have the same issue, but the limit would be 32. As in practice it'll never be used with more than 20 GPIO, create a helper function to limit it to 31 and call it everywhere needed. BUG=b:113788440 TEST=Add a fake code to southbridge_final calling the function and printing the result. Build and boot grunt, check result. Change-Id: If336267d847beddfecc7b5ca0de8c202623a7789 Signed-off-by: Martin Roth &lt;martinroth@chromium.org&gt; Original-Commit-Id: 7160766ebf97aa33b2cd708146ba84701b5a6fff Original-Change-Id: I0b79725bcbaf120587c7440e176643aaa7a1d5bb Original-Signed-off-by: Richard Spiegel &lt;richard.spiegel@silverbackltd.com&gt; Original-Reviewed-on: https://review.coreboot.org/28445 Original-Reviewed-by: Martin Roth &lt;martinroth@google.com&gt; Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214152 Commit-Ready: Patrick Georgi &lt;pgeorgi@chromium.org&gt; " fail_count="1" gerrit_number="1214152" owner_email="martinroth@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/52/1214152/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ib4336b5b618d9655a09d843e54d915f7e0248688" commit="4a1fa41bd2a54f9bbea3f5223df3d13d5059c6e6" commit_message="modemfwd: support extra arguments for helper process This CL adds support for specifying extra command line arguments for the helper process through a new repeatable 'extra_argument' field in the helper manifest proto. BUG=b:113246249 TEST=Run unit tests. Change-Id: Ib4336b5b618d9655a09d843e54d915f7e0248688 Reviewed-on: https://chromium-review.googlesource.com/1212187 Commit-Ready: Ben Chan &lt;benchan@chromium.org&gt; Tested-by: Ben Chan &lt;benchan@chromium.org&gt; Reviewed-by: Brian Norris &lt;briannorris@chromium.org&gt; Reviewed-by: Mike Frysinger &lt;vapier@chromium.org&gt; " fail_count="1" gerrit_number="1212187" owner_email="benchan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/87/1212187/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Id7dc3fa0819169ca2aa1e8e3f3f040cf0cdbf50d" commit="5da824840ff8f751e5a319debf5729c57fa47497" commit_message="cr50: Export Virtual NVRAM header Virtual NVRAM indexes are defined in this header. This change exports that header so that the indexes can be referenced safely from outside the cr50 codebase. CQ-DEPEND=CL:1193563 BUG=b:110971075 TEST=build Change-Id: Id7dc3fa0819169ca2aa1e8e3f3f040cf0cdbf50d Reviewed-on: https://chromium-review.googlesource.com/1193622 Commit-Ready: Louis Collard &lt;louiscollard@chromium.org&gt; Tested-by: Louis Collard &lt;louiscollard@chromium.org&gt; Reviewed-by: Andrey Pronin &lt;apronin@chromium.org&gt; " fail_count="1" gerrit_number="1193622" owner_email="louiscollard@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/22/1193622/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Id0754d2b1c9817aeb3db4d4d01ee9fbce8ca2a10" commit="2935457eed86a3f9622185b278a81c14d71af2e0" commit_message="cr50: Move Virtual NVRAM indexes into header file. This is so that they can be referenced outside of the cr50 codebase. BUG=b:110971075 TEST=build BRANCH=none Change-Id: Id0754d2b1c9817aeb3db4d4d01ee9fbce8ca2a10 Signed-off-by: Louis Collard &lt;louiscollard@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1193563 Reviewed-by: Andrey Pronin &lt;apronin@chromium.org&gt; " fail_count="1" gerrit_number="1193563" owner_email="louiscollard@chromium.org" pass_count="0" patch_number="4" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/63/1193563/4" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ib89884ac5f373eac152229524b85e9b0bc7c241e" commit="5d3f53208a1b59d0d95982b990ee8cac278bf3b4" commit_message="attestation: Add dependency on cr50 headers. Attestation service will query virtual NVRAM indexes. To do this reliably it needs access to the header where they are defined. BUG=chromium:859542 TEST=build attestationd with change that includes cr50 header Change-Id: Ib89884ac5f373eac152229524b85e9b0bc7c241e Reviewed-on: https://chromium-review.googlesource.com/1193623 Commit-Ready: Louis Collard &lt;louiscollard@chromium.org&gt; Tested-by: Louis Collard &lt;louiscollard@chromium.org&gt; Reviewed-by: Chirantan Ekbote &lt;chirantan@chromium.org&gt; " fail_count="1" gerrit_number="1193623" owner_email="louiscollard@chromium.org" pass_count="0" patch_number="3" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/23/1193623/3" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ibbd7dd9a6626ea6388ca67f30d4efafd41f0f1d7" commit="c61b265b85d09256cd88133e2b768805609ff331" commit_message="firmware: Drop 'todev' mode. The 'todev' was mainly used by updater v2 generation (alex, zgb; those need to reflash a DEV firmware) and was replaced by crossystem settings since v3, and since then replaced by enable_dev_usb_boot script in vboot_reference repository. We have already revised all documents to use enable_dev_usb_boot instead of running &quot;chromeos-firmwareupdate --mode=todev&quot;, and updater v2 has been removed for a long time so it should be fine to drop 'todev' support. BUG=chromium:806383 TEST=make test Change-Id: Ibbd7dd9a6626ea6388ca67f30d4efafd41f0f1d7 Reviewed-on: https://chromium-review.googlesource.com/1180622 Commit-Ready: Hung-Te Lin &lt;hungte@chromium.org&gt; Tested-by: Hung-Te Lin &lt;hungte@chromium.org&gt; Reviewed-by: Hung-Te Lin &lt;hungte@chromium.org&gt; " fail_count="1" gerrit_number="1180622" owner_email="hungte@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/firmware" project_url="https://chromium-review.googlesource.com/chromiumos/platform/firmware" ref="refs/changes/22/1180622/3" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ia1b408894f25a3fbbc1d05d1a8998c7d63577e3d" commit="06afa821bd5dafd5ab0864ddc51140ff1d57ef56" commit_message="updater: Add a new mode 'legacy' to enforce updating RW_LEGACY For devices that are going to run newly released legacy firmware, we should provide a simple way so people can easily update their firmware without unpacking and flashing manually, i.e., mkdir tmp; chromeos-firmwareupdate --sb_extract tmp; flashrom -p host -i RW_LEGACY tmp/bios.bin Now, with the new mode it's simply: chromeos-firwmareupdate --mode=legacy BUG=b:110721285 TEST=manual Change-Id: Ia1b408894f25a3fbbc1d05d1a8998c7d63577e3d Reviewed-on: https://chromium-review.googlesource.com/1209052 Commit-Ready: Hung-Te Lin &lt;hungte@chromium.org&gt; Tested-by: Hung-Te Lin &lt;hungte@chromium.org&gt; Reviewed-by: Hung-Te Lin &lt;hungte@chromium.org&gt; " fail_count="1" gerrit_number="1209052" owner_email="hungte@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/firmware" project_url="https://chromium-review.googlesource.com/chromiumos/platform/firmware" ref="refs/changes/52/1209052/2" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="Ic2fa7a74b452a313f75101e37c875f38ef374fdc" commit="5534679bb831231dc727cc12bb3b41290d838c6c" commit_message="[moblab] Copy the files from the project-moblab overlay. The cros-workon build is broken for the project-moblab overlay until that is fixed move the init files to platform-moblab so multiple changes can be in flight at the same time. BUG=chromium:881529 TEST= ad hoc moblab testing Change-Id: Ic2fa7a74b452a313f75101e37c875f38ef374fdc Reviewed-on: https://chromium-review.googlesource.com/1214286 Commit-Ready: Keith Haddow &lt;haddowk@chromium.org&gt; Tested-by: Keith Haddow &lt;haddowk@chromium.org&gt; Reviewed-by: Matt Mallett &lt;mattmallett@chromium.org&gt; " fail_count="1" gerrit_number="1214286" owner_email="haddowk@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/moblab" project_url="https://chromium-review.googlesource.com/chromiumos/platform/moblab" ref="refs/changes/86/1214286/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ia5a534c98224023e6629fd004b951369687767e4" commit="714718640069a216d14ef91d012a0194b1233ccb" commit_message="[moblab] Copy the files from the project-moblab overlay. The cros-workon build is broken for the project-moblab overlay until that is fixed move the init files to platform-moblab so multiple changes can be in flight at the same time. CQ-DEPEND=CL:1214286 BUG=chromium:881529 TEST=ad hoc moblab testing Change-Id: Ia5a534c98224023e6629fd004b951369687767e4 Reviewed-on: https://chromium-review.googlesource.com/1214290 Commit-Ready: Keith Haddow &lt;haddowk@chromium.org&gt; Tested-by: Keith Haddow &lt;haddowk@chromium.org&gt; Reviewed-by: Matt Mallett &lt;mattmallett@chromium.org&gt; " fail_count="1" gerrit_number="1214290" owner_email="haddowk@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/board-overlays" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/board-overlays" ref="refs/changes/90/1214290/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I9ce48b0b9f3a9cfe4d6a8d22f0e780f56e977c07" commit="28c64121ba5b2ed368e75d95c05c34f490aefcbc" commit_message="diagnostics: Define APIs for /proc and /sys data Add gRPC APIs exposed by diagnosticsd that provide telemetry information from /proc/ and /sys/. BUG=chromium:869377 TEST=check the diagnostics package builds Change-Id: I9ce48b0b9f3a9cfe4d6a8d22f0e780f56e977c07 Reviewed-on: https://chromium-review.googlesource.com/1189223 Commit-Ready: Maksim Ivanov &lt;emaxx@chromium.org&gt; Tested-by: Maksim Ivanov &lt;emaxx@chromium.org&gt; Reviewed-by: Igor &lt;igorcov@chromium.org&gt; Reviewed-by: Roman Sorokin &lt;rsorokin@chromium.org&gt; " fail_count="0" gerrit_number="1189223" owner_email="emaxx@chromium.org" pass_count="0" patch_number="13" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/23/1189223/13" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I8c702fb8afdb922756ef03afdb2257d9e55d29df" commit="baf591710b82ba8704c5791bfc989ea5583a8107" commit_message="UPSTREAM: mb/google/poppy/variants/atlas: enable NVMe This adds support for a x2 NVMe device on PCIe bus PCIe lines 5+6 and clock#4. BUG=b:113369699 TEST=booted on atlas Change-Id: I8c702fb8afdb922756ef03afdb2257d9e55d29df Signed-off-by: Furquan Shaikh &lt;furquan@google.com&gt; Original-Commit-Id: 41979d862a972375d6800afdf2b8b52d408fd220 Original-Change-Id: I08e7c4d65662ddbb7d936915c896eb1fcb240ba8 Original-Signed-off-by: Caveh Jalali &lt;caveh@chromium.org&gt; Original-Reviewed-on: https://review.coreboot.org/28535 Original-Tested-by: build bot (Jenkins) &lt;no-reply@coreboot.org&gt; Original-Reviewed-by: Furquan Shaikh &lt;furquan@google.com&gt; Original-Reviewed-by: Paul Menzel &lt;paulepanter@users.sourceforge.net&gt; Reviewed-on: https://chromium-review.googlesource.com/1214264 Commit-Ready: Furquan Shaikh &lt;furquan@chromium.org&gt; Tested-by: Furquan Shaikh &lt;furquan@chromium.org&gt; Reviewed-by: Furquan Shaikh &lt;furquan@chromium.org&gt; " fail_count="0" gerrit_number="1214264" owner_email="furquan@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/64/1214264/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I72814d3c9ea11721e1b361e7f6d300658306562d" commit="245416d178824257c5c67c4031ac60afd83e8dd7" commit_message="cr50: make EC RST synchronous When the RBOX register controlling the EC reset output is written, RBOX does not act immediately, as it is controlled by its own clock. This results in the program continuing executing before RBOX output value change. This patch makes sure that execution does not continue until RBOX reacted to the request to change the EC RST output value. BRANCH=cr50. cr50-mp BUG=b:75976718 TEST=verified with logic analyzer that processing does not continue until EC RST output value changes. Change-Id: I72814d3c9ea11721e1b361e7f6d300658306562d Signed-off-by: Vadim Bendebury &lt;vbendeb@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1214101 Reviewed-by: Mary Ruthven &lt;mruthven@chromium.org&gt; " fail_count="0" gerrit_number="1214101" owner_email="vbendeb@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/ec" project_url="https://chromium-review.googlesource.com/chromiumos/platform/ec" ref="refs/changes/01/1214101/3" remote="cros" total_fail_count="0"/><pending_commit branch="arc-18.2.0-pre1" change_id="Ie8f6355c9661f1dc7f006b03fc1835b89415e265" commit="3137de425a0f45107d3364309f646c8766fd94ef" commit_message="UPSTREAM: glapi: actually implement GL_EXT_robustness for GLES The extension was exposed but not the functions. This fixes: dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.readn_pixels dEQP-GLES31.functional.debug.negative_coverage.get_error.state.get_nuniformfv dEQP-GLES31.functional.debug.negative_coverage.get_error.state.get_nuniformiv BUG=b:69235178 TEST=emerge-grunt arc-mesa dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.readn_pixels pass on grunt (cherry picked from commit 37eee90df730ac6ba371b2ba8e61a1db9e55d7df) Cc: 18.1 18.2 &lt;mesa-stable@lists.freedesktop.org&gt; Reviewed-by: Tapani Plli &lt;tapani.palli@intel.com&gt; Change-Id: Ie8f6355c9661f1dc7f006b03fc1835b89415e265 Signed-off-by: Deepak Sharma &lt;Deepak.Sharma@amd.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1211648 Commit-Ready: Deepak Sharma &lt;deepak.sharma@amd.com&gt; Tested-by: Deepak Sharma &lt;deepak.sharma@amd.com&gt; Reviewed-by: Gurchetan Singh &lt;gurchetansingh@chromium.org&gt; " fail_count="3" gerrit_number="1211648" owner_email="deepak.sharma@amd.com" pass_count="0" patch_number="1" project="chromiumos/third_party/mesa" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/mesa" ref="refs/changes/48/1211648/1" remote="cros" total_fail_count="3"/><pending_commit branch="chromeos-4.4" change_id="I72edc74e2315da6ee97d67101bb4d432814c2052" commit="390a841eff55914cbd4c61ea6a943f6a54047558" commit_message="FIXUP: BACKPORT: nvme-pci: implement the HMB entry number and size limitations 0day reports: &gt;&gt; drivers/nvme/host/pci.c:3137:23: sparse: cast to restricted __le32 &gt;&gt; drivers/nvme/host/pci.c:3137:23: sparse: cast from restricted __le16 hmmaxd is a 16-bit variable, so use le16_to_cpu() to convert it. BUG=b:112464830 TEST=Check NVMe device use HMB. Change-Id: I72edc74e2315da6ee97d67101bb4d432814c2052 Signed-off-by: Guenter Roeck &lt;groeck@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1210984 Tested-by: Gwendal Grignou &lt;gwendal@chromium.org&gt; Reviewed-by: Gwendal Grignou &lt;gwendal@chromium.org&gt; " fail_count="4" gerrit_number="1210984" owner_email="groeck@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/84/1210984/1" remote="cros" total_fail_count="4"/><pending_commit branch="chromeos-4.4" change_id="I23c62e7c34bbdf5d0492f8ffe189a231f3fd2bca" commit="6f194c6418487f782eff6b61ea8ad15612a581eb" commit_message="CHROMIUM: Merge 'v4.4.154' into chromeos-4.4 Merge of v4.4.154 into chromeos-4.4 Conflicts: arch/arm64/mm/init.c Changelog: ---------------------------------------------------------------- Alexander Sverdlin (1): i2c: davinci: Avoid zero value of CLKH Andi Kleen (1): x86/spectre: Add missing family 6 check to microcode check Andrey Ryabinin (1): fuse: Don't access pipe-&gt;buffers without pipe_lock() Arnd Bergmann (1): ext4: sysfs: print ext4_super_block fields as little-endian Bart Van Assche (2): scsi: sysfs: Introduce sysfs_{un,}break_active_protection() scsi: core: Avoid that SCSI device removal through sysfs triggers a deadlock Bernd Edlinger (1): nl80211: Add a missing break in parse_station_flags Calvin Walton (1): tools/power turbostat: Read extended processor family from CPUID Claudio Imbrenda (1): s390/kvm: fix deadlock when killed by oom Colin Ian King (1): drivers: net: lmc: fix case value for target abort error Dan Carpenter (1): pinctrl: freescale: off by one in imx1_pinconf_group_dbg_show() Eric Sandeen (1): ext4: reset error code in ext4_find_entry in fallback Ethan Zhao (1): sched/sysctl: Check user input value of sysctl_sched_time_avg Eugeniu Rosca (1): usb: gadget: f_uac2: fix endianness of 'struct cntrl_*_lay3' Eyal Birger (1): vti6: fix PMTU caching and reporting on xmit Florian Westphal (2): xfrm: free skb if nlsk pointer is NULL atl1c: reserve min skb headroom Govindarajulu Varadarajan (1): enic: handle mtu change for vf properly Greg Hackmann (1): arm64: mm: check for upper PAGE_SHIFT bits in pfn_valid() Greg Kroah-Hartman (1): Linux 4.4.154 Guenter Roeck (2): media: staging: omap4iss: Include asm/cacheflush.h after generic includes Merge remote-tracking branch 'origin/linux/v4.4.154' into merge/chromeos-4.4-v4.4.154 Gustavo A. R. Silva (1): ASoC: sirf: Fix potential NULL pointer dereference Jerome Brunet (1): ASoC: dpcm: don't merge format from invalid codec dai Jia-Ju Bai (2): usb: gadget: r8a66597: Fix two possible sleep-in-atomic-context bugs in init_controller() usb: gadget: r8a66597: Fix a possible sleep-in-atomic-context bugs in r8a66597_queue() Jim Gill (1): scsi: vmw_pvscsi: Return DID_RESET for status SAM_STAT_COMMAND_TERMINATED Johannes Thumshirn (1): scsi: fcoe: drop frames in ELS LOGO error path Josef Bacik (1): btrfs: don't leak ret from do_chunk_alloc Julian Wiedmann (1): s390/qdio: reset old sbal_state flags Kiran Kumar Modukuri (3): fscache: Allow cancelled operations to be enqueued cachefiles: Fix refcounting bug in backing-file read monitoring cachefiles: Wait rather than BUG'ing on &quot;Unexpected object collision&quot; Kirill Tkhai (1): fuse: Add missed unlock_page() to fuse_readpages_fill() Len Brown (1): tools/power turbostat: fix -S on UP systems Li Wang (1): zswap: re-check zswap_is_full() after do zswap_shrink() Lucas Stach (2): drm/imx: imx-ldb: disable LDB on driver bind drm/imx: imx-ldb: check if channel is enabled before printing warning Maciej W. Rozycki (1): MIPS: Correct the 64-bit DSP accumulator register size Martin Schwidefsky (1): s390: fix br_r1_trampoline for machines without exrl Masami Hiramatsu (2): selftests/ftrace: Add snapshot and tracing_on test case kprobes: Make list and blacklist root user read only Mike Christie (1): iscsi target: fix session creation failure handling Miklos Szeredi (4): fuse: fix double request_end() fuse: fix unlocked access to processing queue fuse: umount should wait for all requests fuse: Fix oops at process_init_reply() Mikulas Patocka (3): udl-kms: change down_interruptible to down udl-kms: handle allocation failure udl-kms: fix crash due to uninitialized memory Nicholas Mc Guire (2): can: mpc5xxx_can: check of_iomap return before use cifs: check kmalloc before use Nick Desaulniers (1): x86/irqflags: Mark native_restore_fl extern inline Paul Burton (1): MIPS: lib: Provide MIPS64r6 __multi3() for GCC &lt; 7 Peter Senna Tschudin (1): tools: usb: ffs-test: Fix build on big endian systems Punit Agrawal (2): KVM: arm/arm64: Skip updating PTE entry if no change KVM: arm/arm64: Skip updating PMD entry if no change Rafa Miecki (1): Revert &quot;MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum&quot; Randy Dunlap (4): usb/phy: fix PPC64 build errors in phy-fsl-usb.c net: prevent ISA drivers from building on PPC32 arc: fix build errors in arc/include/asm/delay.h arc: fix type warnings in arc/mm/cache.c Rian Hunter (1): x86/process: Re-export start_thread() Scott Bauer (1): cdrom: Fix info leak/OOB read in cdrom_ioctl_drive_status Sean Paul (1): drm/bridge: adv7511: Reset registers on hotplug Sebastian Ott (1): s390/pci: fix out of bounds access during irq setup Shubhrajyoti Datta (1): net: axienet: Fix double deregister of mdio Steve French (3): cifs: add missing debug entries for kconfig options smb3: Do not send SMB3 SET_INFO if nothing changed smb3: don't request leases in symlink creation and query Sudarsana Reddy Kalluru (2): qed: Fix possible race for the link state value. bnx2x: Fix invalid memory access in rss hash config path. Theodore Ts'o (1): ext4: check for NUL characters in extended attribute's name Tommi Rantala (1): xfrm: fix missing dst_release() after policy blocking lbcast and multicast Varun Prakash (1): scsi: libiscsi: fix possible NULL pointer dereference in case of TMF Vlastimil Babka (3): x86/speculation/l1tf: Fix overflow in l1tf_pfn_limit() on 32bit x86/speculation/l1tf: Fix off-by-one error when warning that system has too much RAM x86/speculation/l1tf: Suggest what to do on systems with too much RAM YueHaibing (1): net: caif: Add a missing rcu_read_unlock() in caif_flow_cb jie@chenjie6@huwei.com (1): mm/memory.c: check return value of ioremap_prot mpubbise@codeaurora.org (1): mac80211: add stations tied to AP_VLANs during hw reconfig yujuan.qi (1): Cipso: cipso_v4_optptr enter infinite loop Makefile | 2 +- arch/arc/include/asm/delay.h | 3 + arch/arc/mm/cache.c | 7 +- arch/arm/kvm/mmu.c | 42 +++++++++--- arch/arm64/mm/init.c | 6 +- arch/mips/bcm47xx/setup.c | 6 -- arch/mips/include/asm/mipsregs.h | 3 - arch/mips/include/asm/processor.h | 2 +- arch/mips/kernel/ptrace.c | 2 +- arch/mips/kernel/ptrace32.c | 2 +- arch/mips/lib/multi3.c | 6 +- arch/s390/include/asm/qdio.h | 1 - arch/s390/mm/fault.c | 2 + arch/s390/net/bpf_jit_comp.c | 2 - arch/s390/pci/pci.c | 2 + arch/x86/include/asm/irqflags.h | 3 +- arch/x86/include/asm/processor.h | 4 +- arch/x86/kernel/cpu/bugs.c | 4 ++ arch/x86/kernel/cpu/intel.c | 3 + arch/x86/kernel/process_64.c | 1 + arch/x86/mm/init.c | 4 +- arch/x86/mm/mmap.c | 2 +- drivers/cdrom/cdrom.c | 2 +- drivers/gpu/drm/i2c/adv7511.c | 12 ++++ drivers/gpu/drm/imx/imx-ldb.c | 9 ++- drivers/gpu/drm/udl/udl_fb.c | 2 +- drivers/gpu/drm/udl/udl_main.c | 35 +++++----- drivers/i2c/busses/i2c-davinci.c | 8 ++- drivers/net/can/mscan/mpc5xxx_can.c | 5 ++ drivers/net/ethernet/3com/Kconfig | 2 +- drivers/net/ethernet/amd/Kconfig | 4 +- drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 1 + .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 13 +++- drivers/net/ethernet/cirrus/Kconfig | 1 + drivers/net/ethernet/cisco/enic/enic_main.c | 78 ++++++++-------------- drivers/net/ethernet/qlogic/qed/qed_mcp.c | 1 + drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c | 1 + drivers/net/wan/lmc/lmc_main.c | 2 +- drivers/pinctrl/freescale/pinctrl-imx1-core.c | 2 +- drivers/s390/cio/qdio_main.c | 5 +- drivers/scsi/fcoe/fcoe_ctlr.c | 4 +- drivers/scsi/libiscsi.c | 12 ++-- drivers/scsi/scsi_sysfs.c | 20 +++++- drivers/scsi/vmw_pvscsi.c | 11 ++- drivers/staging/media/omap4iss/iss_video.c | 3 +- drivers/target/iscsi/iscsi_target_login.c | 35 ++++++---- drivers/usb/gadget/function/f_uac2.c | 20 +++--- drivers/usb/gadget/udc/r8a66597-udc.c | 6 +- drivers/usb/phy/phy-fsl-usb.c | 4 +- fs/btrfs/extent-tree.c | 2 +- fs/cachefiles/namei.c | 1 - fs/cachefiles/rdwr.c | 17 +++-- fs/cifs/cifs_debug.c | 30 +++++++-- fs/cifs/inode.c | 2 + fs/cifs/link.c | 4 +- fs/cifs/sess.c | 6 ++ fs/cifs/smb2inode.c | 2 +- fs/ext4/namei.c | 1 + fs/ext4/sysfs.c | 13 +++- fs/ext4/xattr.c | 2 + fs/fscache/operation.c | 6 +- fs/fuse/dev.c | 39 +++++++++-- fs/fuse/file.c | 1 + fs/fuse/fuse_i.h | 1 + fs/fuse/inode.c | 23 +++---- fs/sysfs/file.c | 44 ++++++++++++ include/linux/sysfs.h | 14 ++++ kernel/kprobes.c | 4 +- kernel/sysctl.c | 3 +- mm/memory.c | 3 + mm/zswap.c | 9 +++ net/caif/caif_dev.c | 4 +- net/ipv4/cipso_ipv4.c | 12 +++- net/ipv6/ip6_vti.c | 11 +-- net/mac80211/util.c | 3 +- net/wireless/nl80211.c | 1 + net/xfrm/xfrm_policy.c | 3 + net/xfrm/xfrm_user.c | 10 +-- sound/soc/sirf/sirf-usp.c | 7 +- sound/soc/soc-pcm.c | 8 +++ tools/power/x86/turbostat/turbostat.c | 8 +-- .../selftests/ftrace/test.d/00basic/snapshot.tc | 28 ++++++++ tools/usb/ffs-test.c | 19 +++++- 83 files changed, 513 insertions(+), 235 deletions(-) create mode 100644 tools/testing/selftests/ftrace/test.d/00basic/snapshot.tc BUG=chromium:880916 TEST=Build and test on various affected systems Change-Id: I23c62e7c34bbdf5d0492f8ffe189a231f3fd2bca Signed-off-by: Guenter Roeck &lt;groeck@chromium.org&gt; Reviewed-on: https://chromium-review.googlesource.com/1208013 " fail_count="2" gerrit_number="1208013" owner_email="groeck@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/13/1208013/1" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="Ifea508cd9a10cf36297e94ddd466a4cd29ce5d47" commit="bdea1c98b62af19876bbde2a7f599e099426c228" commit_message="intel: ipu3: Correct frame_use parameter for IPU algo [Issue] The image quality of STILL capture didn't match with IQ tuning simulation. It caused bad STILL image quality when taking picture on device. The wrong frame_use type passed to IPU algorithm and caused the wrong tuning data used for STILL image. BUG=b:77833943 TEST=Build and deploy package to poppy and camera works Change-Id: Ifea508cd9a10cf36297e94ddd466a4cd29ce5d47 Signed-off-by: Qingwu Zhang &lt;qingwu.zhang@intel.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1212549 Commit-Ready: Andy Yeh &lt;andy.yeh@intel.com&gt; Tested-by: Andy Yeh &lt;andy.yeh@intel.com&gt; Reviewed-by: Ricky Liang &lt;jcliang@chromium.org&gt; " fail_count="0" gerrit_number="1212549" owner_email="wei.meng@intel.com" pass_count="0" patch_number="1" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/49/1212549/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I5fb95c5623b937e930dac00d37edcb7effdada64" commit="110fcb8ab169d77ba45542c1991b835f62ea3a3e" commit_message="purge asm/atomic.h usage We've never really guaranteed that this code works in a multithreaded setup, and the only two users of this code are single threaded (`verity` and `cros_installer`). So simplify the atomic_t logic by inlining it all and then dump the support code. BUG=chromium:878440 TEST=build works Change-Id: I5fb95c5623b937e930dac00d37edcb7effdada64 Reviewed-on: https://chromium-review.googlesource.com/1201402 Commit-Ready: Mike Frysinger &lt;vapier@chromium.org&gt; Tested-by: Mike Frysinger &lt;vapier@chromium.org&gt; Reviewed-by: Mike Frysinger &lt;vapier@chromium.org&gt; " fail_count="0" gerrit_number="1201402" owner_email="vapier@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/dm-verity" project_url="https://chromium-review.googlesource.com/chromiumos/platform/dm-verity" ref="refs/changes/02/1201402/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ie661c8d07f5ca0a613372aa2e870614ac09e7a5e" commit="aa9e34b2c078149f5415ac74d6330b1e457add55" commit_message="apt: hardcode apt config to M71 BUG=chromium:882032 TEST=manual Change-Id: Ie661c8d07f5ca0a613372aa2e870614ac09e7a5e Reviewed-on: https://chromium-review.googlesource.com/1214098 Commit-Ready: Stephen Barber &lt;smbarber@chromium.org&gt; Tested-by: Stephen Barber &lt;smbarber@chromium.org&gt; Tested-by: kokoro &lt;noreply+kokoro@google.com&gt; Reviewed-by: Stephen Barber &lt;smbarber@chromium.org&gt; " fail_count="0" gerrit_number="1214098" owner_email="smbarber@chromium.org" pass_count="0" patch_number="1" project="chromiumos/containers/cros-container-guest-tools" project_url="https://chromium-review.googlesource.com/chromiumos/containers/cros-container-guest-tools" ref="refs/changes/98/1214098/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I854a8e0e3fbed1186faf1df54ef8d7ed5a1ae46e" commit="5e1b2a0809e9b1caf8970127f53af1f97d7e6322" commit_message="crash: anomaly_collector: drop --fifo flag Nothing uses this, and it's less effort to drop it than to try and convert it to the new C++ form. People can use the existing --test flag anyways: $ anomaly_collector --test &lt;fifo BUG=chromium:874698 TEST=precq passes Change-Id: I854a8e0e3fbed1186faf1df54ef8d7ed5a1ae46e Reviewed-on: https://chromium-review.googlesource.com/1188857 Commit-Ready: Mike Frysinger &lt;vapier@chromium.org&gt; Tested-by: Mike Frysinger &lt;vapier@chromium.org&gt; Reviewed-by: Luigi Semenzato &lt;semenzato@chromium.org&gt; " fail_count="0" gerrit_number="1188857" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/57/1188857/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ib1ae32bdf71fc1c92cc3ff6c9a25cd341da298c7" commit="94df40909cf4e22156033d68cbe8185ebb28b93d" commit_message="rammus: enable pre-cq check Add the COMMIT-QUEUE.ini to enable pre-cq check BUG=b:110006063 TEST=none Change-Id: Ib1ae32bdf71fc1c92cc3ff6c9a25cd341da298c7 Reviewed-on: https://chromium-review.googlesource.com/1208115 Commit-Ready: Zhuohao Lee &lt;zhuohao@chromium.org&gt; Tested-by: Zhuohao Lee &lt;zhuohao@chromium.org&gt; Reviewed-by: YH Lin &lt;yueherngl@chromium.org&gt; " fail_count="1" gerrit_number="1208115" owner_email="zhuohao@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/board-overlays" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/board-overlays" ref="refs/changes/15/1208115/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ie29300114da1826bf5547d597be43928b8fe3ec9" commit="7572b69394c18f449bc8a18524abd53752e96d3d" commit_message="B50 : Elan Touchpad Firmware Updater (HID Interface) v1.1 BUG=b:79157488 TEST=Test Elan Touchpad Firmware Update for B50 Change-Id: Ie29300114da1826bf5547d597be43928b8fe3ec9 Signed-off-by: Sai Samuel &lt;sai.samuel@gmail.com&gt; Reviewed-on: https://chromium-review.googlesource.com/1174583 Commit-Ready: Bob Moragues &lt;moragues@chromium.org&gt; Tested-by: Bob Moragues &lt;moragues@chromium.org&gt; Reviewed-by: Bob Moragues &lt;moragues@chromium.org&gt; Reviewed-by: Mike Frysinger &lt;vapier@chromium.org&gt; " fail_count="0" gerrit_number="1174583" owner_email="sai.samuel@gmail.com" pass_count="0" patch_number="8" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/83/1174583/8" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="If34ca1fd2080bd06999e2f5d96d2a1f94824fe37" commit="69d71577b2793897b036a35949501dd7678a204f" commit_message="UPSTREAM: staging: gasket: page table: fix header file include guard symbol The include guard symbol for gasket_page_table.h is out-of-date. BUG=b:79253135 TEST=none CQ-DEPEND=CL:1186093 Signed-off-by: Todd Poynor &lt;toddpoynor@google.com&gt; Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt; (cherry picked from commit 799d8a8e0500ec782fb9fe8c95ded67e80ad4346) Signed-off-by: Zhongze Hu &lt;frankhu@google.com&gt; Change-Id: If34ca1fd2080bd06999e2f5d96d2a1f94824fe37 Reviewed-on: https://chromium-review.googlesource.com/1186094 Commit-Ready: Zhongze Hu &lt;frankhu@google.com&gt; Tested-by: Zhongze Hu &lt;frankhu@google.com&gt; Reviewed-by: Dmitry Torokhov &lt;dtor@chromium.org&gt; " fail_count="4" gerrit_number="1186094" owner_email="frankhu@google.com" pass_count="0" patch_number="1" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/94/1186094/1" remote="cros" total_fail_count="4"/><pending_commit branch="master" change_id="I3fef0582b971b7973948c5df91e799fd6728d697" commit="85c827191b369ba3f9abd6022cc444548d6ffe4b" commit_message="autotest: Add Cr50VirtualNVRam[Server] to autotest ebuild. CQ-DEPEND=CL:1174573, CL:1189252 BUG=b:112385847 TEST=test_that .. firmwareCr50VirtualNVRamServer Change-Id: I3fef0582b971b7973948c5df91e799fd6728d697 Reviewed-on: https://chromium-review.googlesource.com/1189270 Commit-Ready: Louis Collard &lt;louiscollard@chromium.org&gt; Tested-by: Louis Collard &lt;louiscollard@chromium.org&gt; Reviewed-by: Mike Frysinger &lt;vapier@chromium.org&gt; " fail_count="3" gerrit_number="1189270" owner_email="louiscollard@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/70/1189270/2" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="Ia01960976019b4e9b44717d3a2d9b5f1bee17b5b" commit="168e193e0d3711d00db98acb7d5c844002477c07" commit_message="glib: use /run for dbus sockets /var/run might not be available, so make sure we use /run directly. BUG=chromium:853158 TEST=precq passes Change-Id: Ia01960976019b4e9b44717d3a2d9b5f1bee17b5b Reviewed-on: https://chromium-review.googlesource.com/1214625 Commit-Ready: Mike Frysinger &lt;vapier@chromium.org&gt; Tested-by: Mike Frysinger &lt;vapier@chromium.org&gt; Reviewed-by: Ben Chan &lt;benchan@chromium.org&gt; " fail_count="0" gerrit_number="1214625" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/25/1214625/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I730007d2c7424c2e6fb73c7e303dc50bc4fe95ad" commit="10b32b71bc72c0467266fe8cd53374abbe9fc9c3" commit_message="Upgraded the following 5 packages Upgraded app-emulation/virt-what to version 1.18 on amd64 Upgraded dev-python/pyyaml to version 3.12 on amd64 Upgraded net-analyzer/fping to version 3.13 on amd64 Upgraded net-ftp/tftp-hpa to version 5.2-r1 on amd64 Upgraded sys-apps/ethtool to version 4.13 on amd64 Trybot result: https://cros-goldeneye.corp.google.com/chromeos/healthmonitoring/buildDetails?buildbucketId=8936829608849771456 BUG=chromium:870100 TEST=cros tryjob moblab Change-Id: I730007d2c7424c2e6fb73c7e303dc50bc4fe95ad Reviewed-on: https://chromium-review.googlesource.com/1195538 Commit-Ready: Keith Haddow &lt;haddowk@chromium.org&gt; Tested-by: Keith Haddow &lt;haddowk@chromium.org&gt; Reviewed-by: Mike Frysinger &lt;vapier@chromium.org&gt; " fail_count="1" gerrit_number="1195538" owner_email="haddowk@chromium.org" pass_count="0" patch_number="4" project="chromiumos/overlays/portage-stable" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/portage-stable" ref="refs/changes/38/1195538/4" remote="cros" total_fail_count="2"/><lkgm version="11046.0.0-rc3"/></manifest>