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| <pending_commit branch="chromeos-2016.05" change_id="I060ba2fcd2b9fa61eac254de80db8c5a4a8864ab" commit="57d533407f166e0004180ad28f9ee549c07c5598" commit_message="UPSTREAM: util/cbfstool/rmodule.{c,h}: Fix typo and correct header Header contains ':' in copyright line. rmdoule is a typo Remove the ';' and correct typo to rmodule. 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Remove include and post_code() call always solving build errors. BUG=NA TEST=NA Change-Id: I8e44fa0aca0d9b7d3277a2aaaf5c924e32e04378 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 613da18fecc757ed75dca97578f316b15bd3f826 Original-Change-Id: Iebae2940eb10c9ca9054437be4740c79137bcc61 Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29687 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Huang Jin <huang.jin@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1350132 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350132" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/32/1350132/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I4c298f98e793aae03f531052708507ecc59533c5" commit="f38c2b735fdc3c6b83b00983893405aa186ac9a2" commit_message="UPSTREAM: grunt: Default SPK_PA_EN to LOW We need to default this to low so the speakers don't activate in S3. BUG=b:118248953 TEST=Used a scope to look at the line and made sure depthcharge still beeps. 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Adding a local variable with the same name will lead to the following error on older GCC versions (e.g. version 4.4.7): declaration of 'buffer_size' shadows a global declaration To fix this rename the local variable to buffer_len. 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BUG=none BRANCH=none TEST=none Change-Id: I4053f06f4fcc8599152656648fa58391e245746a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2fd2923aebae63bdf4567f70d933831f44e082ed Original-Change-Id: I69e6b3a83c072036c5b3ae801f8d80dfda82478e Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/29764 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350135 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350135" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/35/1350135/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I712c138982e3d73a2d07291d6bed2206f6a433ff" commit="4b638cb5af79e7809c9f538fb6a984b44172fdc9" commit_message="UPSTREAM: mb/intel/icelake_rvp: Add ICL U and Y RVP DIMM configuration List of ICL board variants 1. ICL-U DDR4 - All possible DDR4 memory type LPDDR4 - Memory down fixed DIMM configuration 2. ICL-Y All LPDDR4 DIMM on platform This patch ensures to have all proper SPD configuration. BUG=none BRANCH=none TEST=none Change-Id: I712c138982e3d73a2d07291d6bed2206f6a433ff Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4041bcf629c9b0239cca7a71091f6e6f0c669b4b Original-Change-Id: Id596a3c85b13559b3002dcadfee9c945256e28e7 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/29770 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350136 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350136" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/36/1350136/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I264ee10cd3e48825ee57b1ceaffe85a9999798ef" commit="a7065c97edbfc1dc763cf9a4b689c52b2ff5d2b1" commit_message="UPSTREAM: mb/intel/icelake_rvp: Add support for ALPS touchpad BUG:none TEST:Verify cursor response and button clicks BUG=none BRANCH=none TEST=none Change-Id: I264ee10cd3e48825ee57b1ceaffe85a9999798ef Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3032d7677883eb726d14fcd85efae7a7c068259a Original-Change-Id: I4085b70560e2840c71b989348f56ca907e7cea4b Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/29777 Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-by: Shelley Chen <shchen@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350137 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350137" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/37/1350137/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia8b5b9f38b551382649a906ad454e462d607c27e" commit="5621b022a26bac831d3d1feecb0a0bd425eba98a" commit_message="UPSTREAM: soc/intel/common: Bring DISPLAY_MTRRS into the light Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the "Debug" menu. It turned out, though, that the code looks rather generic. No need to hide it in soc/intel/. To not bloat src/Kconfig up any further, start a new `Kconfig.debug` hierarchy just for debug options. If somebody wants to review the code if it's 100% generic, we could even get rid of HAVE_DISPLAY_MTRRS. BUG=none BRANCH=none TEST=none Change-Id: Ia8b5b9f38b551382649a906ad454e462d607c27e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d67edcae6e9d438f2e60f6b67d97a7d3f09cb18b Original-Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24 Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/c/29684 Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350138 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350138" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/38/1350138/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia9f24bc492dd9a3a9281d8945f3250d0ffe3a638" commit="504fce9e81f70063fe3d658adcbacbfe5d745dc1" commit_message="UPSTREAM: cpu/x86/Kconfig.debug: Move more options here Gather x86 specific debug options and deflate their code a little. We keep their hiding rules and help texts, although they don't seem much useful. BUG=none BRANCH=none TEST=none Change-Id: Ia9f24bc492dd9a3a9281d8945f3250d0ffe3a638 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 5a03ddcd91b282682935cc02bbf5ee0de3211364 Original-Change-Id: I3bb8e759fc6a4871d30fccff47babfb7a291b45c Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/c/29751 Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350139 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350139" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/39/1350139/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7ad43cedbca5e2c441bfc782d8007c5cedc1277e" commit="49311c1c4ae6a1dea9f897648929b347f9df2fd2" commit_message="UPSTREAM: cpu/x86/Kconfig.debug: Remove weird dependencies and comments No need to hide prompts, it's a user choice anyway, they should know. The help texts were just rephrasing the prompts or stating the obvious. BUG=none BRANCH=none TEST=none Change-Id: I7ad43cedbca5e2c441bfc782d8007c5cedc1277e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 387f3e5ff939c4e872051cd64f3f8c619b7470af Original-Change-Id: I5694a88f2da57af2a20357c4e22c7c648053cc26 Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/c/29802 Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350140 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350140" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/40/1350140/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I79d075fea41d2476e71f1b87a3df5eee0fb0a766" commit="3f319137a9115767b4c09f6a9f5d2b2ebd22758f" commit_message="UPSTREAM: MAINTAINERS: Add myself as maintainer for the getac/p470 BUG=none BRANCH=none TEST=none Change-Id: I79d075fea41d2476e71f1b87a3df5eee0fb0a766 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8fb453e6f56c20b0760240b08e7c0399048ddefe Original-Change-Id: Iae87a2e6f223f1d6e39034be4c8b511187eca6f5 Original-Signed-off-by: Patrick Georgi <patrick@georgi.software> Original-Reviewed-on: https://review.coreboot.org/c/29782 Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350141 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350141" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/41/1350141/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I735ee7aefaff01f725f61ae2cc3ed9487eb27fd8" commit="0d1138c0cecf788787c502090788b5bb92dfbaea" commit_message="UPSTREAM: MAINTAINERS: Add maintainer for all Siemens mc_xxxx mainboards BUG=none BRANCH=none TEST=none Change-Id: I735ee7aefaff01f725f61ae2cc3ed9487eb27fd8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e7207593ec1854431375f8c4f5c0f03dd12723fc Original-Change-Id: If8f662d088bf57fd27c5a01a47bc094dcb53a4de Original-Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/29806 Original-Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350142 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350142" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/42/1350142/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Id5b585f5e9ee2304041aaffbd9f64dc21d7c9fd8" commit="9ad0c19fbf47a9af1e674f4d7be4df2e6d789c79" commit_message="UPSTREAM: mb: Set coreboot as DSDT's manufacturer model ID Field 'OEMID' & "OEM Table ID" are related to DSDT table not to mainboard. So use macro to set them respectvely to "COREv4" and "COREBOOT". BUG=none BRANCH=none TEST=none Change-Id: Id5b585f5e9ee2304041aaffbd9f64dc21d7c9fd8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 6d19a20f5fb46956d4324dff28ed4b59dc7776a3 Original-Change-Id: I060e07a730e721df4a86128ee89bfe168c69f31e Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/29790 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-by: David Guckian Reviewed-on: https://chromium-review.googlesource.com/1350143 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350143" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/43/1350143/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5fdb18f7de214258cb48ec849aadfe6879841b61" commit="ebf9e730fc325adb69ed01b05a971dc3e9b3291f" commit_message="UPSTREAM: intelblocks/cpu: Add function to set CPU clock to minimum value Provide a library function to set the CPU frequency to minimum value. This will result in the lowest possible CPU clock with the lowest possible power consumption. This can be useful in mobile devices where the power dissipation is limited. This setting can be overruled by the OS if it has an p-state driver which can adjust the clock to it's need. BUG=none BRANCH=none TEST=none Change-Id: I5fdb18f7de214258cb48ec849aadfe6879841b61 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 52c58929fd8d9011e7990c042418624b567ffa1b Original-Change-Id: I817095b13ab8cbaab82f25c72947b00ee854d549 Original-Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/29771 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://chromium-review.googlesource.com/1350144 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350144" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/44/1350144/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I9cb361badcbbcd3bbf3b75c1448010f91fa3025d" commit="c9968a172399c4a3c7ff01b3f3934afbb9e91b71" commit_message="UPSTREAM: soc/intel/apollolake: Add Kconfig switch to enable minimum clock ratio Add a Kconfig switch to be able to set the CPU clock to the lowest possible ratio. If enabled the CPU will consume as little power as possible while providing the lowest performance. This setting can be overruled by the OS if it has an p-state driver which can adjust the clock to its need. BUG=none BRANCH=none TEST=none Change-Id: I9cb361badcbbcd3bbf3b75c1448010f91fa3025d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 26361862bdff9bc12c31e4f153e83422e21179b6 Original-Change-Id: I4a59586da72d1915749110a36f565fe2aa69e073 Original-Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/29772 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/1350145 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350145" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/1350145/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ib7b7aff388b248e8beb4a9129aa01491a4047d12" commit="b6fef0b7041a6a909840ee00ccbd1e2e99b93940" commit_message="UPSTREAM: siemens/mc_apl4: Set CPU clock to minimum ratio The power budget for this mainboard is very limited while the performance demand is low. Set the CPU clock to the lowest value to enable maximum efficiency and thus lowest power dissipation. BUG=none BRANCH=none TEST=none Change-Id: Ib7b7aff388b248e8beb4a9129aa01491a4047d12 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 697faf0d5fa1e4a8c221f083ab4b469d4a4b57d2 Original-Change-Id: I23c7c5393deb676b94f2b0ac25e21a7a44cd8cb3 Original-Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/29773 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/1350146 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350146" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/46/1350146/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I298b8678ba898bef696acb64a8145faebea93016" commit="fa92fc673e63562444176d2f78fd5944db2cf5ce" commit_message="UPSTREAM: intelblocks/cpu: Fix wrong comment for P_Req field in PERF_CTL MSR The mentioned bits 14:8 are wrong as the functions always write bits 15:8. What happens is visible in the written code. There is no need for an extra comment. BUG=none BRANCH=none TEST=none Change-Id: I298b8678ba898bef696acb64a8145faebea93016 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 6b522c31aa55f1e09b63843e183c0f6f298a5605 Original-Change-Id: I59b4d24d01a0a8fa74912f9754e7bbb217ca269d Original-Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/29798 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://chromium-review.googlesource.com/1350147 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350147" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/47/1350147/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibda62ae2898a2bbacb5b748fc2959e6c9920898d" commit="6c896345ae0d7b642b546a8c1926343108ece66a" commit_message="UPSTREAM: src/arch/x86/acpi.c: Create log area and extend TPM2 table According to newest TCG ACPI Specification for Family 1.2 and 2.0 Version 1.2, Revision 8, TPM2 ACPI table has two more fields LAML and LASA. Update the table structure definition, create the log area for TPM2 in coreboot tables and fill the missing fields in TPM2 table. TPM2 should be now probed well in SeaBIOS rel-1.12.0 or master. Tested on apu2 with Infineon SLB9665 TT2.0. BUG=none BRANCH=none TEST=none Change-Id: Ibda62ae2898a2bbacb5b748fc2959e6c9920898d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 6e8692e184e919c25feade059e30775798b640c2 Original-Signed-off-by: Micha ygowski <michal.zygowski@3mdeb.com> Original-Change-Id: Ie482cba0a3093aae996f7431251251f145fe64f3 Original-Signed-off-by: Micha ygowski <michal.zygowski@3mdeb.com> Original-Reviewed-on: https://review.coreboot.org/c/29800 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1350148 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350148" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/48/1350148/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I41e151220d34846feaea11da4a874cc1fe723848" commit="d588e382f4ddd911d933907f4b024a3a7ebd22bc" commit_message="UPSTREAM: soc/intel/skylake: Drop FSP_CAR options It's not implemented for Skylake, all combinations that try to enable it either result in Kconfig or linker errors. Move `config SKIP_FSP_CAR` into drivers/intel/fsp1_1 where it's effective. TEST=Built Intel/Kunimitsu (FSP1.1) and Intel/KBLRVP8 (FSP2.0) default configs with and without this patch: binaries stay the same. Change-Id: I41e151220d34846feaea11da4a874cc1fe723848 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2f1ef98bdcea248671bf2b5ad1547c1dcfec2c64 Original-Change-Id: Iae0a2d2c7fd7a71ed24118564e6080c4789cda28 Original-Signed-off-by: Nico Huber <nico.huber@secunet.com> Original-Reviewed-on: https://review.coreboot.org/c/29533 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1350729 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350729" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/29/1350729/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1c24a179919971bab7806f45839e44c058c65388" commit="edc433da0af55750631cde907a01f5790f58809f" commit_message="UPSTREAM: src/soc/intel/baytrail/southcluster.c: Replace fixed values by defines The GPIO and ACPI base sizes have defines, but they are not used. Use GPIO_BASE_SIZE and ACPI_BASE_SIZE. BUG=N/A TEST=Intel BayTrail CRB Change-Id: I1c24a179919971bab7806f45839e44c058c65388 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 802f43d67fc12c738325c860c5547e33141cff66 Original-Change-Id: I3fe50effdb8236bc45d33a2345a773653df68d90 Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29330 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Reviewed-by: Huang Jin <huang.jin@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1350730 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350730" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/30/1350730/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I27bcab8a68bc0385fd320d6329d1e4eb3390cf07" commit="aca25a562189cf7a6113bf47043051873c6e53fe" commit_message="UPSTREAM: src/soc/intel/braswell/southcluster.c: Replace fixed values by defines The GPIO and ACPI base sizes have defines, but they are not used. Use GPIO_BASE_SIZE and ACPI_BASE_SIZE. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I27bcab8a68bc0385fd320d6329d1e4eb3390cf07 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4b2c12f0937fe39c12cb56e1787e15e8ac51aa2c Original-Change-Id: I348eda57ab9dc0bd45f8dc9ab0e7c47c462102fe Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29788 Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350731 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350731" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/31/1350731/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0b766c646a5ecf10d045e7c7d143eda6743cc649" commit="1f5f1842a1b0101897109153d29319245af303b4" commit_message="UPSTREAM: soc/intel/apollolake: Remove cycle in Kconfig symbol dependencies BUG=none BRANCH=none TEST=none Change-Id: I0b766c646a5ecf10d045e7c7d143eda6743cc649 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b3070a5f1b0953a80d215b08358130ab45366c89 Original-Change-Id: Iad60a5c8863283b7d373e1f6aaff48c40b7bb274 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://review.coreboot.org/c/29812 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/1350732 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350732" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/32/1350732/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic06c67afccc8c5c4736bf84e1d748d7b47d26ae0" commit="ee3b68891380a6f343fa5b6ecc1ccc05ed2eb835" commit_message="UPSTREAM: arch/x86: drop special case cbfs locator CBFS used to have a special region for the x86 bootblock, which also contained a pointer to a CBFS master header, which describes the layout of the CBFS. Since we adopted other architectures, we got rid of the bootblock region as a separate entity and add the x86 bootblock as a CBFS file now. The master header still exists for compatibility with old cbfstool versions, but it's neatly wrapped in either the bootblock file or in a file carefully crafted at the right location (on all other architectures). All the layout information we need is now available from FMAP, a core part of a contemporary coreboot image, even on x86, so we can just use the generic master header locator in src/lib/cbfs.c and get rid of the special version. Among the advantages: the x86 header locator reduced the size of the CBFS by 64 bytes assuming that there's the bootblock region of at least that size - this breaks assumptions elsewhere (eg. when walking CBFS in cbfs_boot_locate() because the last file, the bootblock, will exceed the CBFS region as seen by coreboot (since it's CBFS - 64bytes). TEST=emulation/qemu-q35 still boots Change-Id: Ic06c67afccc8c5c4736bf84e1d748d7b47d26ae0 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: caf6d0bc5239c4e9fd72b98cfe8b3d47d19a3616 Original-Change-Id: I6fa78073ee4015d7769ed588dc67f9b019d42d07 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reported-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/29801 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1350733 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350733" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/33/1350733/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibd2e6623c4c63c2317125f38d3e5ff6ffc08aef1" commit="669449850a23260d8df4894e784ed256d3a0529a" commit_message="UPSTREAM: mb/google/kahlee: Enable 2T mode for liara in DVT phase Change the board id detection to support rev5, since the 2T mode still needed in DVT build. BUG=b:116082728 TEST=verify by ODM. Change-Id: Ibd2e6623c4c63c2317125f38d3e5ff6ffc08aef1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 386b084ee187e7705d16c7f67f28b62d02eb9ca9 Original-Change-Id: Ibb4cc1fd2bb54984cb7a8856ed7b9f49b78eddce Original-Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/29779 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350734 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350734" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/34/1350734/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iefa5b092a5a6d75b061fea7e8d7920d583a30d2a" commit="d876949bccf73011024f703ebd76afa4a966a8d9" commit_message="UPSTREAM: sb/intel/bd82x6x/early_usb.c: Fix formatting Remove whitespace between the function name and open parenthesis, and fix 81+ characters lines. Unnecessary comment about 'include sandybridge.h'removed. BUG=none BRANCH=none TEST=none Change-Id: Iefa5b092a5a6d75b061fea7e8d7920d583a30d2a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f385e9d253bdc83a5cda4d56cacafa1c98a52335 Original-Change-Id: I0db1263ec11240003fe1f7080c758994fc0224d3 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/29428 Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Original-Reviewed-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350735 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350735" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/35/1350735/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ie0ee2aa7847d5dc336151fd36d6dadc2fa6efd55" commit="aef80a7b2e9d1f47c8cc34501b78acf3dbbbe1ca" commit_message="UPSTREAM: MAINTAINERS: Drop "the rest" component The semantics in util/scripts/maintainers.go have changed in that a file can be part of multiple components. This means that all files are part of "the rest" now, which doesn't make much sense. BUG=none BRANCH=none TEST=none Change-Id: Ie0ee2aa7847d5dc336151fd36d6dadc2fa6efd55 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 501956750f9b82716963e5201bc163e0847250c0 Original-Change-Id: I220afe27e78aa5358fca61851242812f2d763992 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://review.coreboot.org/c/29657 Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350736 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350736" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/36/1350736/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2d0eb3d36797dcff1de1661a591b84c1bfc021ef" commit="41e17c55784514684d75957d98288ef153378650" commit_message="UPSTREAM: util/scripts/maintainers.go: drop special case for "THE REST" It's not useful anymore. BUG=none BRANCH=none TEST=none Change-Id: I2d0eb3d36797dcff1de1661a591b84c1bfc021ef Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9651058c42e69e00e47ccbcdbbc6b4e5ab7b4a63 Original-Change-Id: Iba7f10dc87301911ff5f73c182b41c268fba310a Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://review.coreboot.org/c/29658 Original-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350737 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350737" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/37/1350737/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ida617b45cd6a2aff6ba6719c521b91e6becc1751" commit="9742b66dfa3dacba3f8e7a16289bd56b15b958f1" commit_message="UPSTREAM: nb/intel/gm45/northbridge.c: Check for NULL pointers BUG=none BRANCH=none TEST=none Change-Id: Ida617b45cd6a2aff6ba6719c521b91e6becc1751 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 48fa9225ca18e6320e032b8eedf81087de224cc4 Original-Change-Id: Ic12a8c145d6348086f9931af93ce6d3b3dcb9039 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/c/29688 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/1350738 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350738" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/38/1350738/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I94c7b32f1ecd606246ff1767e30fc44b61418ff1" commit="7c33c81a90ad8d7b9ece9b4251a28b2e675bca31" commit_message="UPSTREAM: nb/intel/i945/early_init.c: Correct the PEG_LC address of DEV(0:01.0) This bug/typo was spoted by Felix Held. As documented in the datasheet, to enable PMEGPE, HPGPE, GENGPE, we need to write 0x7 into DEV(0:01.0) register "PCI Express-G Legacy Control" located at 0xec. Used address at 0x114 to enable GPEs is likely a typo. Patch not tested. BUG=none BRANCH=none TEST=none Change-Id: I94c7b32f1ecd606246ff1767e30fc44b61418ff1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a9068aa4e058a72b0cdeaffa423db17d7dd09fc6 Original-Change-Id: Iee1c1e4b7fef21608f2678a1d4104b668a66a7e5 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/27307 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://chromium-review.googlesource.com/1350739 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350739" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/39/1350739/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Idc5173b0ee503f5273bd48cae76b0d8c093f6ccc" commit="ef06744c36ba3d20cb2049b73064d4767df632f1" commit_message="UPSTREAM: nb/intel/i945: Add and use defines for registers of device 0:01.0 Some registers are not documented in "Mobile Intel 945 Express Chipset Family" datasheet but they are in "Intel 945G/945GZ/ 945GC/945P/945PL Express Chipset Family" datasheet. BUG=none BRANCH=none TEST=none Change-Id: Idc5173b0ee503f5273bd48cae76b0d8c093f6ccc Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a6634f1f78da9d05082f94f2c86f5ab15adf0d40 Original-Change-Id: I81f68a5b16e195626d4d271f8c7036032611bea3 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/29824 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1350740 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350740" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/40/1350740/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I945f7214f593c252779a3a72d75322d71977826b" commit="4923a4dcc1de495a3f2e88ba9446a7ebc1db2355" commit_message="UPSTREAM: soc/intel/icelake: Add support to enable/disable USB charging in s3/S5 BUG=none BRANCH=none TEST=none Change-Id: I945f7214f593c252779a3a72d75322d71977826b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9df0440c6cd0031c81d15ed10df68a94fc43bac6 Original-Change-Id: I0559b8a546f7a67759377c7f51b2faa2280aa797 Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/29793 Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350741 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350741" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/41/1350741/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I48fad46ba6d78a05f3a6184aee55cce4fcc62326" commit="407350db50c97855f2e3d84c900fef3328c2b2ab" commit_message="UPSTREAM: siemens/mc_apl1/variants/mc_apl*: Remove unneeded PTN read An additional read of PTN configuration data at the end of the ptn3460_init function is not necessary. BUG=none BRANCH=none TEST=none Change-Id: I48fad46ba6d78a05f3a6184aee55cce4fcc62326 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 016cc4296e7040c60c741b186d6b3e87a688421c Original-Change-Id: I5f7f647242e94b1af13757d00e80ed9813d435d0 Original-Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Original-Reviewed-on: https://review.coreboot.org/c/29799 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/1350742 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350742" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/42/1350742/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iaaced72b9e59c26ac053b8acb01fc02deb94f475" commit="12156d362141e17f45b2fc64558868a0c2f3305a" commit_message="UPSTREAM: drivers/intel/fsp1_1/raminit.c: Report only when NVS HOB is missing Missing hob 7.3 FSP_NON_VOLATILE_STORAGE_HOB is reported always. This hob is only generated by FSP during non-S3 and MRC data is changed. Now display missing FSP_NON_VOLATILE_STORAGE_HOB only when this hob is required. BUG=N/A TEST=Intel CherryHill CRB Change-Id: Iaaced72b9e59c26ac053b8acb01fc02deb94f475 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8f95edcf9b9dcde5d098e2ec41d1f0c9bf924aa8 Original-Change-Id: Ice8220149c2e44bb2da010d5a7d8bc4dbeca11e0 Original-Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Original-Reviewed-on: https://review.coreboot.org/c/29320 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Huang Jin <huang.jin@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1350743 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350743" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/43/1350743/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ifd6befbb4b9d374536a7669fc95e92e2439a9b4f" commit="dd7a9c2287f82dca11653d789eda881e667a72e6" commit_message="UPSTREAM: drivers/spi: store detected flash IDs BUG=none BRANCH=none TEST=none Change-Id: Ifd6befbb4b9d374536a7669fc95e92e2439a9b4f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 630a418feac478410d2f23f06cbf85000decc4d2 Original-Change-Id: I36de9ba6c5967dddd08a71a522cf680d6e146fae Original-Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Original-Reviewed-on: https://review.coreboot.org/c/28347 Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350744 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350744" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/44/1350744/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I5a7d6707187dbc9cdd942f6af272637f4d26b2ab" commit="0c13748cddcee51394eb41cad819158e5ee98279" commit_message="UPSTREAM: sb/intel/spi: read FLCOMP descriptor early and cache it BUG=none BRANCH=none TEST=none Change-Id: I5a7d6707187dbc9cdd942f6af272637f4d26b2ab Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 327205dc2a7ac1dcd0c19080939c8030b0b9b16c Original-Change-Id: I4e5fe3ff083f2d0db1cfde16550b57537d5f7262 Original-Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Original-Reviewed-on: https://review.coreboot.org/c/28349 Original-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1350745 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350745" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/1350745/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ida00c45312395a65caa5a6ad0c2d32f3a2bd7e64" commit="0b0c267e87ab4ac40e3fb7be943bb00d78fe1c4f" commit_message="UPSTREAM: sb/intel/common: Fix style issue in spi.c BUG=none BRANCH=none TEST=none Change-Id: Ida00c45312395a65caa5a6ad0c2d32f3a2bd7e64 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: c88828daebc2b2b7ba825bb92f4182d920336ba5 Original-Change-Id: Ife8f7f164b26bea65a0dcde0cab339a1bb599e38 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://review.coreboot.org/c/29834 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Stefan T <stefan.tauner@gmx.at> Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://chromium-review.googlesource.com/1350746 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1350746" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/46/1350746/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="I54ff83428b963057662bab9cd0e2de8068c643bf" commit="c362e4e01b37f031d48424bce1f589adbe3daa77" commit_message="CHROMIUM: media: ipu3-imgu: Create each pipe followed by its video nodes Create each pipe followed by its video nodes to make device topology easier to read. Suggested by v7 upstream review. BUG=b:72725454 TEST=Sanity checked camera functions. Change-Id: I54ff83428b963057662bab9cd0e2de8068c643bf Signed-off-by: Yong Zhi <yong.zhi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1327574 Reviewed-by: Tomasz Figa <tfiga@chromium.org> " fail_count="0" gerrit_number="1327574" owner_email="yong.zhi@intel.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/74/1327574/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.4" change_id="I9879830689af5acea616ad7a08d63ccbf5387567" commit="f6cf01544b7bdb1cb7bafc6f07c0a317db5e3d1c" commit_message="CHROMIUM: media: ipu3-imgu: Remove __attribute__ specifier in abi Replace all __attribute__((aligned(32))) wth __aligned(32). Replace all __reserved to reserved. Link: https://patchwork.kernel.org/patch/10660317/ BUG=b:72725454 TEST=Sanity checked camera functions. Change-Id: I9879830689af5acea616ad7a08d63ccbf5387567 Signed-off-by: Yong Zhi <yong.zhi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1335841 Reviewed-by: Tomasz Figa <tfiga@chromium.org> " fail_count="0" gerrit_number="1335841" owner_email="yong.zhi@intel.com" pass_count="0" patch_number="3" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/41/1335841/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I18c7fd2877380adc73040a77bff89519271e24b1" commit="bc00df8a98c79f72d6ffe8b130125f202a3c7db0" commit_message="cros-camera-hal-rockchip-isp1: switch to gyp build Re-write the build file for the Rockchip RK-ISP1 HAL in gyp. The gyp build greatly reduces the camera HAL build time, and allows us to enable standard CrOS features such as clang sanitizers. BUG=b:80009555 CQ-DEPEND=CL:1343633 TEST=Make sure camera works on Dru. Change-Id: I18c7fd2877380adc73040a77bff89519271e24b1 Reviewed-on: https://chromium-review.googlesource.com/1343876 Commit-Ready: Ricky Liang <jcliang@chromium.org> Tested-by: Ricky Liang <jcliang@chromium.org> Reviewed-by: Shik Chen <shik@chromium.org> " fail_count="3" gerrit_number="1343876" owner_email="jcliang@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/board-overlays" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/board-overlays" ref="refs/changes/76/1343876/2" remote="cros" total_fail_count="3"/><pending_commit branch="master" change_id="I0c9f38435fbbf7d6e44b22a2707b29e4aef1b895" commit="62cf5468931c95f9c376fc5b2fba64732f37aa81" commit_message="rockchip: switch to gyp build Re-write the build file for the Rockchip RK-ISP1 HAL in gyp. The gyp build greatly reduces the camera HAL build time, and allows us to enable standard CrOS features such as clang sanitizers. BUG=b:80009555 CQ-DEPEND=CL:1343876 TEST=Make sure camera works on Dru. Change-Id: I0c9f38435fbbf7d6e44b22a2707b29e4aef1b895 Reviewed-on: https://chromium-review.googlesource.com/1343633 Commit-Ready: Ricky Liang <jcliang@chromium.org> Tested-by: Ricky Liang <jcliang@chromium.org> Reviewed-by: Shik Chen <shik@chromium.org> " fail_count="2" gerrit_number="1343633" owner_email="jcliang@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/33/1343633/2" remote="cros" total_fail_count="2"/><pending_commit branch="master" change_id="I27e36a0f4c352498dfa4947d11286ce2cdde4e8b" commit="0eb807babbe7d85b639e455f39e92a3ceef3a4d0" commit_message="coreboot: Add wifi_sar cbfs config for meep Enable WIFI_SAR_CBFS and set path for meep. CQ-DEPEND=CL:*719899 BUG=b:118782854 TEST=verified that wifi_sar-meep.hex in BIOS. Change-Id: I27e36a0f4c352498dfa4947d11286ce2cdde4e8b Signed-off-by: wisley.chen@quanta.corp-partner.google.com Reviewed-on: https://chromium-review.googlesource.com/1344715 Commit-Ready: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Tested-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> " fail_count="1" gerrit_number="1344715" owner_email="wisley.chen@quanta.corp-partner.google.com" pass_count="0" patch_number="1" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/15/1344715/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I4b73ae981f9d5e926217a24c56975dbdd6f20403" commit="8f1b3fa7f6207c536f82a300958df0e4f8959e9c" commit_message="hal_adapter: fix a crash caused by libmojo uprev BUG=b:37434548 TEST=Open CCA on Nocturne. Change-Id: I4b73ae981f9d5e926217a24c56975dbdd6f20403 Reviewed-on: https://chromium-review.googlesource.com/1348516 Commit-Ready: Shik Chen <shik@chromium.org> Tested-by: Shik Chen <shik@chromium.org> Reviewed-by: Ricky Liang <jcliang@chromium.org> " fail_count="0" gerrit_number="1348516" owner_email="shik@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/16/1348516/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ia48f2eac8f048cc8bbf09ba517326d3ee9bf4a70" commit="15f67b454b77d07b216297fba143c44525bfd4f2" commit_message="UPSTREAM: wpa_supplicant: Add rssi_threshold as mesh configuration parameter. Adding rssi_threhold as mesh configuration parameter and sending to kernel as an nl80211 attribute. https://w1.fi/cgit/hostap/commit/?id=31a856a127706c5047038ab0c7c5a07054432ebf BUG=b:111676345 TEST=Sanity test done and verified that the rssi_threshold value was sent successfully to the kernel. Change-Id: Ia48f2eac8f048cc8bbf09ba517326d3ee9bf4a70 Reviewed-on: https://chromium-review.googlesource.com/1165492 Commit-Ready: s.sudharshan s.sudharshan <s.sudharshan@globaledgesoftware.corp-partner.google.com> Tested-by: s.sudharshan s.sudharshan <s.sudharshan@globaledgesoftware.corp-partner.google.com> Reviewed-by: Srinivasa duvvuri <sduvvuri@google.com> Reviewed-by: Julan Hsu <julanhsu@chromium.org> " fail_count="0" gerrit_number="1165492" owner_email="s.sudharshan@globaledgesoftware.corp-partner.google.com" pass_count="0" patch_number="3" project="chromiumos/third_party/hostap" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/hostap" ref="refs/changes/92/1165492/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I375ee21a0be9fe9a19f280149eca140f229ce55f" commit="c35cbdfeeee0d02891cb450c8be45cfc2b2e4745" commit_message="autotest-capability: Enable VP8 HW encoding capability for BSW/SKL/APL/KBL The video corruption issue is fixed. This CL enables the VP8 autotest. BUG=b:111781384 TEST=Run `test_that video_VideoEncodeAccelerator.vp8` at Eve and confirm the test is running Change-Id: I375ee21a0be9fe9a19f280149eca140f229ce55f Reviewed-on: https://chromium-review.googlesource.com/1337392 Commit-Ready: Chih-Yu Huang <akahuang@chromium.org> Tested-by: Chih-Yu Huang <akahuang@chromium.org> Reviewed-by: Hirokazu Honda <hiroh@chromium.org> " fail_count="0" gerrit_number="1337392" owner_email="akahuang@chromium.org" pass_count="0" patch_number="2" project="chromiumos/overlays/board-overlays" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/board-overlays" ref="refs/changes/92/1337392/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I880fa2aa641d389d4a4a0e0332584cc706d9cf9c" commit="48dd2943c80f09b0334b252c3f142447e2e05259" commit_message="common: fix Future for move-only types BUG=b:74098612 TEST=FEATURES=test \ CROS_CAMERA_TESTS=future_unittest \ cros_workon_make \ --board=nautilus \ cros-camera-libcamera_common \ --test \ --reconf Change-Id: I880fa2aa641d389d4a4a0e0332584cc706d9cf9c Reviewed-on: https://chromium-review.googlesource.com/1341745 Commit-Ready: Shik Chen <shik@chromium.org> Tested-by: Shik Chen <shik@chromium.org> Reviewed-by: Ricky Liang <jcliang@chromium.org> " fail_count="1" gerrit_number="1341745" owner_email="shik@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/45/1341745/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ie9b58db82fdfe1da8adb6f99336e91d9943c088b" commit="c523a740ceaee51b14c51184719050ebe3507856" commit_message="chromeos-chrome: Always build HW jpeg encode tests. Currently the jpeg_encode_accelerator_unittest binary is only build for VAAPI devices. As JPEG encode capability is currently being added to some V4l2 devices, this change makes sure the HW JPEG encode tests are build for all devices. TEST=EncodeAccelJPEG on eve and kevin BUG=chromium:899605 Change-Id: Ie9b58db82fdfe1da8adb6f99336e91d9943c088b Reviewed-on: https://chromium-review.googlesource.com/1344711 Commit-Ready: David Staessens <dstaessens@chromium.org> Tested-by: David Staessens <dstaessens@chromium.org> Reviewed-by: Hirokazu Honda <hiroh@chromium.org> " fail_count="0" gerrit_number="1344711" owner_email="dstaessens@chromium.org" pass_count="0" patch_number="3" project="chromiumos/overlays/chromiumos-overlay" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/chromiumos-overlay" ref="refs/changes/11/1344711/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="If455020a1df31c65b7c4aea4a28c0bc78c003076" commit="a7bf6cd636931351b890989233d963fe3e1cfeba" commit_message="rlz: disable on rialto, add retries and more logging around failures. BUG=None TEST=ran against a rialto in the lab, and a samus Change-Id: If455020a1df31c65b7c4aea4a28c0bc78c003076 Reviewed-on: https://chromium-review.googlesource.com/1345454 Commit-Ready: David Haddock <dhaddock@chromium.org> Tested-by: David Haddock <dhaddock@chromium.org> Reviewed-by: Stephen Lin <stephenlin@google.com> " fail_count="0" gerrit_number="1345454" owner_email="dhaddock@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/54/1345454/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ibecf7d275816f7c35a684c64539aae7b8ea878e6" commit="294647d203616b5a33f6cee9553605b9d28d1c49" commit_message="tast-tests: Make security.Firewall run on CQ. Remove the "informational" attribute to make this test run on the Chrome OS Commit Queue. BUG=chromium:877733 TEST=test passes consistently on release builders Change-Id: Ibecf7d275816f7c35a684c64539aae7b8ea878e6 Reviewed-on: https://chromium-review.googlesource.com/1348609 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Hidehiko Abe <hidehiko@chromium.org> " fail_count="0" gerrit_number="1348609" owner_email="derat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/tast-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast-tests" ref="refs/changes/09/1348609/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ia8fb20edb22ef5b9c8ee9f0531ec33fcbb7d211c" commit="d7ffecea2844eb70a9a4d258b1ad8bd35723477d" commit_message="tast-tests: Make security.ProtocolFamilies run on CQ. Remove the "informational" attribute to make this test run on the Chrome OS Commit Queue. BUG=chromium:877733 TEST=test passes consistently on release builders Change-Id: Ia8fb20edb22ef5b9c8ee9f0531ec33fcbb7d211c Reviewed-on: https://chromium-review.googlesource.com/1348610 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Hidehiko Abe <hidehiko@chromium.org> " fail_count="0" gerrit_number="1348610" owner_email="derat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/tast-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast-tests" ref="refs/changes/10/1348610/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ie6ab6328a2bbabdc09d158efe9960c262cfc1fda" commit="7a9154ba5bbda19c04f98192021d3d89cf5106fc" commit_message="tast-tests: Make security.Mprotect run on CQ. Remove the "informational" attribute to make this test run on the Chrome OS Commit Queue. BUG=chromium:877733 TEST=test passes consistently on release builders Change-Id: Ie6ab6328a2bbabdc09d158efe9960c262cfc1fda Reviewed-on: https://chromium-review.googlesource.com/1348613 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Hidehiko Abe <hidehiko@chromium.org> " fail_count="0" gerrit_number="1348613" owner_email="derat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/tast-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast-tests" ref="refs/changes/13/1348613/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I25af74ba854ca554bddbc07faf641221d1f881d6" commit="6dc551acdffcc5b96c90c034487bbe865b4a60b0" commit_message="CRAS: cras_test_client: support more short options Enable some short options especially for those common ones. -p: --playback_file -c: --capture_file -r: --rate -n: --num_channels -S: --sample_width BUG=None TEST=None Change-Id: I25af74ba854ca554bddbc07faf641221d1f881d6 Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1349289 Reviewed-by: Cheng-Yi Chiang <cychiang@chromium.org> " fail_count="1" gerrit_number="1349289" owner_email="tzungbi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/adhd" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/adhd" ref="refs/changes/89/1349289/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ie6d38d611b96f10e1ab672f1440b9105528c32c1" commit="1a7693002cdd72ae3417db7b28d43b6dae4d11d5" commit_message="tast-tests: Update filecheck.Check to ignore deleted files. Make the filecheck package (used by security.UserFiles* and security.StatefulFiles) ignore os.ErrNotExist errors. It looks like security.UserFilesLoggedIn encounters these sometimes for /home/user/<hash>/key.pub files, which appear to be temporarily created by session_manager during key generation. BUG=chromium:877733 TEST=ran security.UserFiles* Change-Id: Ie6d38d611b96f10e1ab672f1440b9105528c32c1 Reviewed-on: https://chromium-review.googlesource.com/1349630 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Shuhei Takahashi <nya@chromium.org> " fail_count="0" gerrit_number="1349630" owner_email="derat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/tast-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast-tests" ref="refs/changes/30/1349630/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ia9bbab5570d56153cde820ca50e97a3b8bf8d6d7" commit="fee67dd58e469db7374aab43ff41b2e061e16aa2" commit_message="tast-tests: Fix security.SELinuxFiles for chapsd.sh. Update the security.SELinuxFiles test to expect context "cros_init_chapsd_shell_script" for /usr/share/cros/init/chapsd.sh. BUG=none TEST=ran it on a DUT with a recent image Change-Id: Ia9bbab5570d56153cde820ca50e97a3b8bf8d6d7 Reviewed-on: https://chromium-review.googlesource.com/1350089 Commit-Ready: Dan Erat <derat@chromium.org> Tested-by: Dan Erat <derat@chromium.org> Reviewed-by: Qijiang Fan <fqj@google.com> " fail_count="0" gerrit_number="1350089" owner_email="derat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/tast-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/tast-tests" ref="refs/changes/89/1350089/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I264e1544c72e01706a3c4d9cb5bdd145e3a2176f" commit="538d1b6f5d79d551be22be960f12bac89342f2ca" commit_message="CRAS: Add group ID for system AEC This CL adds the functionality to have an aec group ID, which allow Chromium to take actions that is specific for the echo canceller. BUG=chromium:907917 TEST=Build and test on buddy Change-Id: I264e1544c72e01706a3c4d9cb5bdd145e3a2176f Reviewed-on: https://chromium-review.googlesource.com/1349280 Commit-Ready: Per Åhgren <peah@chromium.org> Tested-by: Per Åhgren <peah@chromium.org> Reviewed-by: Hsinyu Chao <hychao@chromium.org> " fail_count="0" gerrit_number="1349280" owner_email="peah@chromium.org" pass_count="0" patch_number="4" project="chromiumos/third_party/adhd" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/adhd" ref="refs/changes/80/1349280/4" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I73f127e49cc34399aa959f4695549ae048b2d7b6" commit="338ccc8a4e91d3258515714146be6426544a597d" commit_message="runtime_probe: the skeleton Initial commit for runtime probe TEST=Installation: cros_workon-nami start system_api runtime_probe USE="-cros-debug" emerge-nami system_api runtime_probe TEST=cros deploy $ACTIVE_DUT system_api runtime_probe TEST=Normal usage: PROTO_BYTES=$(echo -e 'categories:battery\ncategories:audio_codec' \ | protoc --encode runtime_probe.ProbeRequest \ src/platform2/system_api/dbus/runtime_probe/runtime_probe.proto \ | hexdump -v -e '/1 "%d,"'); \ ssh $ACTIVE_DUT sudo -u chronos \ dbus-send --system --print-reply \ --type=method_call --dest=org.chromium.RuntimeProbe \ /org/chromium/RuntimeProbe org.chromium.RuntimeProbe.ProbeCategories \ array:byte:$PROTO_BYTES TEST=Missing argument: ssh $ACTIVE_DUT sudo -u chronos \ dbus-send --system --print-reply \ --type=method_call --dest=org.chromium.RuntimeProbe \ /org/chromium/RuntimeProbe org.chromium.RuntimeProbe.ProbeCategories BUG=chromium:908006,b:119155505 Change-Id: I73f127e49cc34399aa959f4695549ae048b2d7b6 Reviewed-on: https://chromium-review.googlesource.com/1335709 Commit-Ready: Chun-ta Lin <itspeter@chromium.org> Tested-by: Chun-ta Lin <itspeter@chromium.org> Reviewed-by: Wei-Han Chen <stimim@chromium.org> " fail_count="0" gerrit_number="1335709" owner_email="itspeter@chromium.org" pass_count="0" patch_number="7" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/09/1335709/7" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="I1d93079e5fb706546779dba66402ae0755857d4b" commit="b282ce391040dedd1419764cc175f0b17a5f04bd" commit_message="vsync: Add a new pytest for verifying vsync pin BUG=b:117962233 TEST=manually test on my local device Change-Id: I1d93079e5fb706546779dba66402ae0755857d4b Reviewed-on: https://chromium-review.googlesource.com/1335018 Commit-Ready: Chun-Tsen Kuo <chuntsen@chromium.org> Tested-by: Chun-Tsen Kuo <chuntsen@chromium.org> Reviewed-by: Wei-Han Chen <stimim@chromium.org> " fail_count="0" gerrit_number="1335018" owner_email="chuntsen@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/18/1335018/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I0a0f523f11f094c8684739ab2b2da089eac15d54" commit="402831e94ff71cce3d09ca40d515a4e4741aad34" commit_message="diagnostics: Use "bytes" for binary proto fields This is a pure cleanup which replaces the use of "string" with "bytes" for binary proto fields, as the latter is semantically more suitable and provides better compatibility on some languages. No implications for the existing code are expected, since protobuf C++ bindings just use std::string for both types. BUG=chromium:869377 TEST=the diagnostics package builds Change-Id: I0a0f523f11f094c8684739ab2b2da089eac15d54 Reviewed-on: https://chromium-review.googlesource.com/1348649 Commit-Ready: Maksim Ivanov <emaxx@chromium.org> Tested-by: Maksim Ivanov <emaxx@chromium.org> Reviewed-by: Oleh Lamzin <lamzin@google.com> Reviewed-by: Pavol Marko <pmarko@chromium.org> " fail_count="0" gerrit_number="1348649" owner_email="emaxx@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/49/1348649/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I99ba6882f485726faa85c476d1ff41789823c709" commit="41197cbc02e9b1d2047668476aa7ee854e06c15f" commit_message="diagnostics: Refactor std::function -> base::Callback conv Add a helper that builds base::Callback from the given std::function. Use this helper to replace the code that achieved the same via a combination of base::Bind and a lambda. Historically, the older version of libchrome allowed to simply call base::Bind for that purposes. BUG=chromium:907528 TEST=the diagnostics package builds Change-Id: I99ba6882f485726faa85c476d1ff41789823c709 Reviewed-on: https://chromium-review.googlesource.com/1349569 Commit-Ready: Maksim Ivanov <emaxx@chromium.org> Tested-by: Maksim Ivanov <emaxx@chromium.org> Reviewed-by: Pavol Marko <pmarko@chromium.org> " fail_count="0" gerrit_number="1349569" owner_email="emaxx@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/69/1349569/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Iaeeb18445a0229f3fc21a380af97d012ca580300" commit="407ed20d884652195dad9dd79e242e104a6123ba" commit_message="diagnostics: Logging cleanup Replace VPLOG with VLOG in the place where printing errno doesn't make sense. This is a pure cleanup CL. BUG=chromium:1348649 TEST=existing unit tests Change-Id: Iaeeb18445a0229f3fc21a380af97d012ca580300 Reviewed-on: https://chromium-review.googlesource.com/1348689 Commit-Ready: Maksim Ivanov <emaxx@chromium.org> Tested-by: Maksim Ivanov <emaxx@chromium.org> Reviewed-by: Oleh Lamzin <lamzin@google.com> Reviewed-by: Pavol Marko <pmarko@chromium.org> " fail_count="0" gerrit_number="1348689" owner_email="emaxx@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/89/1348689/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I85148cba11ffef8b5cfd074afa74b9ed279b7966" commit="26cf45dbe71fbd656f14debb1930cb3c749b29a5" commit_message="arc-setup: add pvr_sync device node to ARC++ In order to be able to support version 1.10 of the IMG graphics driver, config.json has to include a new device node, specifically pvr_sync. This is for handling IMG explicit synchronization features provided with 1.10. BUG=b:117489304 TEST=emerge-elm arc-base # then deploy it and boot into ARC++.\ Then, `echo "ls /dev/pvr_sync" | android-sh` should show pvr_sync Change-Id: I85148cba11ffef8b5cfd074afa74b9ed279b7966 Signed-off-by: Luigi Santivetti <luigi.santivetti@imagination.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1344032 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> " fail_count="0" gerrit_number="1344032" owner_email="luigi.santivetti@imagination.corp-partner.google.com" pass_count="0" patch_number="2" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/32/1344032/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I501d6fb0ef361675f3327ef69b8e1eb46e31fe3d" commit="30132ee6d54ac982063be02115494c474efb6a94" commit_message="Protorpc service for bundle creation (originally CL:725065) This CL implements 1) A protorpc service which accepts a request message similiar to manifest.yaml, and push the request to a compute engine worker to process. 2) A worker to process the request. BUG=chromium:662844 TEST=manually Change-Id: I501d6fb0ef361675f3327ef69b8e1eb46e31fe3d Reviewed-on: https://chromium-review.googlesource.com/1116637 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Wei-Han Chen <stimim@chromium.org> " fail_count="0" gerrit_number="1116637" owner_email="phoenixshen@chromium.org" pass_count="0" patch_number="4" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/37/1116637/4" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I54a62fb659137952e6fd480202ecc36bb010eee5" commit="508eee5384853a4c039ea06702d175ba19b93fb0" commit_message="hwid: support special image id for rma mode The image ID 15 (the maximum image ID value) is now preserved for RMA. So we can apply different encoding scheme for RMA. BUG=b:119384415 TEST=make test TEST=hwid generate w/ and w/o --rma-mode is using different image id Change-Id: I54a62fb659137952e6fd480202ecc36bb010eee5 Reviewed-on: https://chromium-review.googlesource.com/1329403 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Yong Hong <yhong@google.com> " fail_count="0" gerrit_number="1329403" owner_email="stimim@chromium.org" pass_count="0" patch_number="5" project="chromiumos/platform/factory" project_url="https://chromium-review.googlesource.com/chromiumos/platform/factory" ref="refs/changes/03/1329403/5" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ic67c29a5c41086e9e33ab0599c1627bcee70c61d" commit="b8fda9a64656669aae8ba7a911b7a3535b6f903f" commit_message="chipset-mt8183: Switch to kernel 4.19 Kernel 4.19 works reasonably well on kukui now, let's switch to that by default. BUG=b:109911488 TEST=boot kukui with 4.19 Change-Id: Ic67c29a5c41086e9e33ab0599c1627bcee70c61d Reviewed-on: https://chromium-review.googlesource.com/1341688 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: SJ Huang <sj.huang@mediatek.corp-partner.google.com> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-by: SJ Huang <sj.huang@mediatek.corp-partner.google.com> " fail_count="0" gerrit_number="1341688" owner_email="drinkcat@chromium.org" pass_count="0" patch_number="1" project="chromiumos/overlays/board-overlays" project_url="https://chromium-review.googlesource.com/chromiumos/overlays/board-overlays" ref="refs/changes/88/1341688/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Iefb031f2c4f64949b07c83fe2d19d556790490cd" commit="7ff9799ec414fb71c7962c20e41f818c57fdcfb0" commit_message="drm-tests: Start using updated minigbm APIs This change makes the drm-tests use updated minigbm APIs after https://crrev.com/c/1162170 and https://crrev.com/c/1170773 Change-Id: Iefb031f2c4f64949b07c83fe2d19d556790490cd Reviewed-on: https://chromium-review.googlesource.com/1283069 Commit-Ready: Maksim Sisov <msisov@igalia.com> Tested-by: Maksim Sisov <msisov@igalia.com> Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org> " fail_count="0" gerrit_number="1283069" owner_email="msisov@igalia.com" pass_count="0" patch_number="2" project="chromiumos/platform/drm-tests" project_url="https://chromium-review.googlesource.com/chromiumos/platform/drm-tests" ref="refs/changes/69/1283069/2" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="If55f6a460f2faaf4abe6fb13cb58b4cda2424952" commit="1ab53b7ab420d825c2d4c7d58a1133392993330a" commit_message="camera3_test: fix the crash at exit after libmojo uprev Make both HAL and AtExitManager leaky to resolve the lifetime conflict. BUG=b:119926433,b:37434548 TEST=Verify cros_camera_test exit normally with both intel and usb camera hal. Change-Id: If55f6a460f2faaf4abe6fb13cb58b4cda2424952 Reviewed-on: https://chromium-review.googlesource.com/1350454 Commit-Ready: Shik Chen <shik@chromium.org> Tested-by: Shik Chen <shik@chromium.org> Reviewed-by: Ricky Liang <jcliang@chromium.org> " fail_count="0" gerrit_number="1350454" owner_email="shik@chromium.org" pass_count="0" patch_number="2" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/54/1350454/2" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I486759293eef5d4b283ddceccb67d89cdbd70bcd" commit="5c43952b4dcc8113c2d968b1f014c94380c5e956" commit_message="hal_adapter: fire callbacks for external camera earlier BUG=b:118418065,b:118415374,b:64996728,b:77833131 TEST=Check the result of getUserMedia() matches the external camera in settings 100 times when Video Capture Service is not running. Change-Id: I486759293eef5d4b283ddceccb67d89cdbd70bcd Reviewed-on: https://chromium-review.googlesource.com/1347554 Commit-Ready: Shik Chen <shik@chromium.org> Tested-by: Shik Chen <shik@chromium.org> Reviewed-by: Ricky Liang <jcliang@chromium.org> " fail_count="0" gerrit_number="1347554" owner_email="shik@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform/arc-camera" project_url="https://chromium-review.googlesource.com/chromiumos/platform/arc-camera" ref="refs/changes/54/1347554/1" remote="cros" total_fail_count="0"/><lkgm version="11297.0.0-rc6"/></manifest> |
