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| <pending_commit branch="chromeos-2016.05" change_id="I777f8c4276cf12777fa1759f496bc6682c02cda9" commit="aea520fff41ccb24f8b8ccddc4aa7a81e6307fe6" commit_message="UPSTREAM: mb/google/glados/variants/caroline/devicetree.cb: Remove unneeded white spaces BUG=none BRANCH=none TEST=none Change-Id: I777f8c4276cf12777fa1759f496bc6682c02cda9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 8e9921178d86077b6edac21676f9da251173416b Original-Change-Id: I7fdf8934187d2786fdac23ed4460147867c25044 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30460 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://chromium-review.googlesource.com/1395084 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395084" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/84/1395084/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2b909ac8f872fc883bcceb066871b21f085d31ef" commit="d815b32a08498296e749fcb5dfdc6877a0ded3d7" commit_message="UPSTREAM: mainboard: Add Supermicro X10SLM+-F This board runs well with coreboot. The documentation part of this commit lists what works and what doesn't. Tested with GRUB 2.02 as a payload, loading SeaBIOS 1.12.0 which then boots FreeBSD 11.2. It has also been tested with GRUB directly booting Debian GNU/Linux 9.6 (kernel 4.9). BUG=none BRANCH=none TEST=none Change-Id: I2b909ac8f872fc883bcceb066871b21f085d31ef Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 44095c1edc4387cd68103dca750cb7a28f5fa745 Original-Change-Id: I291573d4651bdffe24eb841033ea6189fcbf8502 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30357 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1395085 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395085" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/85/1395085/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I67184aa8a062a8a8181dff9f6d35e6a892925397" commit="a9d15d291358357b7e1fe435598b231404801b9f" commit_message="UPSTREAM: bootblock: Move function prototype BUG=none BRANCH=none TEST=none Change-Id: I67184aa8a062a8a8181dff9f6d35e6a892925397 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 05a7ffa25be465aea7a7aa22fdf443322abd95cf Original-Change-Id: I01ecb9a16099ac6189ce3f0bdbd43c23ad7c621d Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30488 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395086 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395086" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/86/1395086/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2da5c7fc5f34162437f96bbb8403f90710d46796" commit="abefbd83beb901637bb4ab7a1a5f9b8cc9c6b1e3" commit_message="UPSTREAM: cpu/intel/car: Drop remains of setup_stack_and_mtrrs() Platforms have moved to POSTCAR_STAGE=y. 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This implicitly enabled romcc to consume MMX registers, if XMM set was consumed first. Explicitly tell romcc not to clobber MMX set. BUG=none BRANCH=none TEST=none Change-Id: Icb1d19cb9f327a33ea18d8bce5d27e412716852b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3ba79b319ef5d47b0d16482a254de7c5c740e415 Original-Change-Id: I37f1d6ea01873036712dfbb32bb1dcd5d769e85d Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30392 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395088 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395088" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/88/1395088/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Idf12e33e4094baa8b2fee59d59ea8dd377e4687f" commit="a90c60c68c828584641435b00c59614c150f4a7f" commit_message="UPSTREAM: arch/x86: Use a common timestamp.inc with romcc bootblocks The same file was replicated three times for certain soc/intel bootblocks, yet there are no indications or need to do chipset-specific initialisation. There is no harm in storing the TSC values in MMX registers even when they would not be used. BUG=none BRANCH=none TEST=none Change-Id: Idf12e33e4094baa8b2fee59d59ea8dd377e4687f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 1c105903078f85dd1be805c737b4e4da6dea0618 Original-Change-Id: Iec6fa0889f5887effca1d99ef830d383fb733648 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30393 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395089 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395089" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/89/1395089/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I68703e47d13328ae9214dfb74d5d1ddb6f7612d4" commit="eb98ca3f0584f93186cdf1649e2708e43deb6ff2" commit_message="UPSTREAM: arch/x86: Add CAR stack location symbols Add symbols for the non C_ENVIRONMENT_BOOTBLOCK builds and use them for stack guards. BUG=none BRANCH=none TEST=none Change-Id: I68703e47d13328ae9214dfb74d5d1ddb6f7612d4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d7892bc3913fab68c880d3b7a1206b4c23d5dbe3 Original-Change-Id: Ib622eacb161d9a110d35a7d6979d1b601503b6f4 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30491 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395090 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395090" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/90/1395090/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ib014f450b5a3e7e2152da658f47ad3119001d251" commit="d7b958f2969fb94a521c1a34a86e9dbf765cad8b" commit_message="UPSTREAM: drivers/uart/oxpcie: Fix early console Fix build for POSTCAR_STAGE=y. Also add driver for bootblock and verstage. BUG=none BRANCH=none TEST=none Change-Id: Ib014f450b5a3e7e2152da658f47ad3119001d251 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: fb25f9fa05751163fef2a4dabea03f07f91fdbb0 Original-Change-Id: If57033353c07854e21b630c58ad69931eb572da9 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30495 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395091 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395091" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/91/1395091/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ibfec3e5b15690e7f7da37a3760b98d5280b861ce" commit="459ca80445fb0927c5c9660f4c21b82cf1856aba" commit_message="UPSTREAM: device/pci_early: Fixes for __SIMPLE_DEVICE__ The feature is used to enable PCI MMIO accesses behind PCIe links (or bridges) before PCI enumeration has been completed. Add the feature for bootblock, verstage and postcar, it is required with add-on PCIe serial cards for early console output. It's up to the board specific code to configure PCIe root port prior to calling console_init() for this to work. Remove feature from ramstage, it bypasses any resource allocations and bus number assignments. For the moment PCI configuration support before ramstage is available only on ARCH_X86. Also switch from device_t to pci_devfn_t. BUG=none BRANCH=none TEST=none Change-Id: Ibfec3e5b15690e7f7da37a3760b98d5280b861ce Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3521e260e3477b3c49835eb2330671e0bc7abe65 Original-Change-Id: I08acec68b6f17f4d73d30039cc41274492ea4f45 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30496 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395092 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395092" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/92/1395092/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I3bf6c5b7d88a2eab099f645ee4e93ebfc1918500" commit="a1ce2b472e686b92c1b70ce6a54a25b1bac01d3c" commit_message="UPSTREAM: soc/intel: Fix ugly preprocessor macro Macro hides that dev_find_slot() takes two arguments. BUG=none BRANCH=none TEST=none Change-Id: I3bf6c5b7d88a2eab099f645ee4e93ebfc1918500 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 581383aaedd254cc6024eef3b3ef976222370583 Original-Change-Id: I639af31b9d4a2d702dfd2baebddbb8352e8bf9b9 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30498 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://chromium-review.googlesource.com/1395093 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395093" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/93/1395093/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If1a2550219da18ebe52e3eed587eca0b5a95c507" commit="4ba894d7718f32561358ccfd2eb456d85fd0e9aa" commit_message="UPSTREAM: mb/google/hatch: Enable SATA for Hatch This patch enables the SATA for hatch, * Enable the SATA port 1. * Configure the GPIO for SATA. BUG=b:120914069 BRANCH=none TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot. Change-Id: If1a2550219da18ebe52e3eed587eca0b5a95c507 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 5c1f17807571f5a00be94c0eb69b59ea4fea15b3 Original-Change-Id: Iaf800d1531688c3d3b82600038ea1d7160ae4b0b Original-Signed-off-by: V Sowmya <v.sowmya@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30435 Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395094 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395094" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/94/1395094/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I01c1bf5fc5788ebe16a96302f2000bc09bd61cce" commit="bb287becef29d8b91616d0cdf6a7a488d65fc554" commit_message="UPSTREAM: mb/google/hatch: Add the USB port configuration This patch adds the configurations for, * USB 2.0 ports. * USB 3.0 ports. * Enables USB xHCI controller. * GPIO config for USB2_OC2 and USB2_OC3. * Add the ACPI objects to configure USB ports. BUG=b:120914069 BRANCH=none TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot. Change-Id: I01c1bf5fc5788ebe16a96302f2000bc09bd61cce Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 3f3d6b3e270ad457526ae56babb01e2101d407a5 Original-Change-Id: Ia7b25c25b8208c678aeae3a32033611b69b54062 Original-Signed-off-by: V Sowmya <v.sowmya@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30457 Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395095 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395095" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/95/1395095/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2182ff6c5ea101a5ad0b063ed7de54460fc4e7c8" commit="3e4ee10f4914d2b9093fd8e8cc622bcddeb1813d" commit_message="UPSTREAM: mb/google/hatch: Enable NVME support for Hatch This patch enables the x4 NVME device for hatch, * Enable the Root port 9. * Assign the usage type for clock source. * Configure the GPIO for CLK SRC 1. BUG=b:120914069 BRANCH=none TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot. Change-Id: I2182ff6c5ea101a5ad0b063ed7de54460fc4e7c8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2d324cafd84c18256221894fd14954a80e52f43a Original-Change-Id: I69be6b21a5ae5962877a5c38180b5ffac532fed4 Original-Signed-off-by: V Sowmya <v.sowmya@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30431 Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395096 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395096" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/96/1395096/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I428eeb7304210b07c0afce0c4c47f190d33d2b2d" commit="37ad0cefa9952daf328b42c92af7caa4a7193dc1" commit_message="UPSTREAM: src/cpu/microcode: Add code to update microcode in assembly Add code to update microcode from cbfsfiles using assembly. BUG=none BRANCH=none TEST=none Change-Id: I428eeb7304210b07c0afce0c4c47f190d33d2b2d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2e658f8edf2f6b08f160297c0300103f5367ac3e Original-Change-Id: I8bd192f3f345651db0010239f99293ae63b00652 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/c/27091 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Original-Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1395097 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395097" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/97/1395097/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0ba456f2561abbba8fcdb5796e5d49c88d91b518" commit="a22116057736206e388729912c20576b54816088" commit_message="UPSTREAM: mb/google/hatch: Add NC gpios for display and correct the order Correcting order of display related GPIOs and also adding not connected pin definitions for display GPIOs BUG=b:120914069 BRANCH=none TEST=check if code compiles with changes. Change-Id: I0ba456f2561abbba8fcdb5796e5d49c88d91b518 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a9fadb007ddafd7196f9916439674b63d06e7573 Original-Change-Id: I9498284d263516f65513d6395883b6b09dd70fd5 Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30544 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1395098 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395098" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/98/1395098/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic31f6c319c3abb29a7cfd2668f9f751d79e7a805" commit="bcac772f1129972a3769d84d2eb452e14dcab776" commit_message="UPSTREAM: mb/google/hatch: Enable CNVi Wifi for hatch This patch enables CNVi wifi for hatch 1. Enable CNVi device in device tree 2. Configure GPIO pad config for CNVi BUG=b:120914069 BRANCH=none TEST=check if code compiles correctly and verify GPIO configuration with schematics Change-Id: Ic31f6c319c3abb29a7cfd2668f9f751d79e7a805 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 126c27da064ec5e8d141a9b637ba8ed9c59a5b29 Original-Change-Id: I0c5542737d3a629b6a40116b4aa8ab6cbdd6a4dc Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30436 Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395099 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395099" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/99/1395099/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iddfc6d8d9d50c12c5fbec33761bca9a3ed70dfea" commit="b5a2e8c5d930a981413fdd31134fd2cfb176cbc6" commit_message="UPSTREAM: soc/intel/cannonlake: Enable CNVi based on devicetree Set PchCnvimode to Auto if CNVi is enabled in device tree. This will allow FSP to configure CNVi. BUG=none BRANCH=none TEST=none Change-Id: Iddfc6d8d9d50c12c5fbec33761bca9a3ed70dfea Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 09f7382935e03bc83c66878fc6d41bd2b556ccd3 Original-Change-Id: I4f77fe5e9f561d3b498403e42dfc7afdcfaedf6f Original-Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30516 Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395100 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395100" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/00/1395100/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I28daf835383fe068ed9f78f3c6f0fa2e2b124530" commit="ed0057a35ab9e11eee42c3511a3789e5b4b2fa11" commit_message="UPSTREAM: soc/intel/skylake/graphics: Ensure intel_gma_restore_opregion() is called BUG=none BRANCH=none TEST=none Change-Id: I28daf835383fe068ed9f78f3c6f0fa2e2b124530 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9d75e87428c24cbc753a3bc4090dabfe893414b6 Original-Change-Id: If981fa3db12b3a4fe1411f4cce9bac8564697769 Original-Signed-off-by: Nico Huber <nico.h@gmx.de> Original-Reviewed-on: https://review.coreboot.org/c/25466 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1395101 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395101" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/01/1395101/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I8a232b7c79298e106e3c531c3f4d4e307e6f7721" commit="29b118e9aaf6dd65f919fa8174961f0033e3fb89" commit_message="UPSTREAM: mb/google/dragonegg: Make WP_RO range align with winbond specification This patch ensures to make memory protected range between 01C00000h - 01FFFFFFh as per winbond spi datasheet https://www.winbond.com/resource-files/w25q256jv%20spi%20revb%2009202016.pdf section 7.1.15 BUG=none BRANCH=none TEST=build and boot dragonegg. Change-Id: I8a232b7c79298e106e3c531c3f4d4e307e6f7721 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 12992f62c0391b2711f9f125e5f1123e08807836 Original-Change-Id: Ife451233f60ef680088babbc824bfc5a17078cb9 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30551 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395102 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395102" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/02/1395102/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I405d755c5496d7f42ee56424ee0c1f83bbee9aba" commit="dfde9748639a0d857d0092796063f767aef40b4b" commit_message="UPSTREAM: mb/google/hatch: Make WP_RO range align with winbond specification This patch ensures to make memory protected range between 01C00000h - 01FFFFFFh as per winbond spi datasheet https://www.winbond.com/resource-files/w25q256jv%20spi%20revb%2009202016.pdf section 7.1.15 BUG=none BRANCH=none TEST=build for hatch. Change-Id: I405d755c5496d7f42ee56424ee0c1f83bbee9aba Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e2c653e049d0c4db6c2712658eaa5838dac73ee9 Original-Change-Id: I52d8dbba14bd060b48a7fe8ee009219413ef89ca Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://review.coreboot.org/c/30552 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395103 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395103" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/03/1395103/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Icdcd11b98225e5178af0061ec99f1df537fbabc3" commit="b5e2519b96ed887bf698dfc4046a8fdc741ff797" commit_message="UPSTREAM: soc/intel: Fix bad uses of __SIMPLE_DEVICE__ Cases of *dev = PCI_DEV(b,d,f) are invalid. Not caught because files only build with __SIMPLE_DEVICE__ defined. Remove cases of testing __SIMPLE_DEVICE__ in files that are not build for ramstage. BUG=none BRANCH=none TEST=none Change-Id: Icdcd11b98225e5178af0061ec99f1df537fbabc3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: e16c9df4542a40c176225e9db034e750eb957d5d Original-Change-Id: If10a0efa187c9b1d9a5577008aa46f050f0aa309 Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Original-Reviewed-on: https://review.coreboot.org/c/30497 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395104 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395104" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/04/1395104/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I59046019d3f4f8b14d4c1be4ee588303977ba8fd" commit="de7d429bb9548f076aa0f9407a1e219ffc9bbd44" commit_message="UPSTREAM: mb: Remove duplicated ENABLE_VMX ENABLE_VMX is CPU specific and it is already enabled here: src/cpu/intel/common/Kconfig BUG=none BRANCH=none TEST=none Change-Id: I59046019d3f4f8b14d4c1be4ee588303977ba8fd Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: bde39e3738844d1f3af3089c10d69a4adb62913f Original-Change-Id: I130738aa3758a9212bab10f90edb7b2ab6830597 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30605 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://chromium-review.googlesource.com/1395105 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395105" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/05/1395105/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I52a53db304fd2f83d4130605252e11a2b0211e97" commit="418023a9da8642c6bc0910043c339f9dc92db7fe" commit_message="UPSTREAM: Doc/nb/intel/haswell: Mention util/chromeos as a way to get mrc.bin BUG=none BRANCH=none TEST=none Change-Id: I52a53db304fd2f83d4130605252e11a2b0211e97 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 1ccf83c971c1992730b00ab86af87a2a0bbcc17c Original-Change-Id: Ic099d0f052db5ef6a699d54b26028bae2fae4770 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30546 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://chromium-review.googlesource.com/1395106 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395106" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/06/1395106/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic171fcf0fc69db02c9249ec6c59b77843204789c" commit="cfdf6b837c30a2db2bd5f6ca8eef45de92c2a034" commit_message="UPSTREAM: util/chromeos/crosfirmware.sh: Add /sbin to PATH On some systems, such as Debian 9.6, `parted` and `debugfs` are located in /sbin. Adding /sbin to PATH means that this script can work when run as a regular user. BUG=none BRANCH=none TEST=none Change-Id: Ic171fcf0fc69db02c9249ec6c59b77843204789c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: df90c626e055f63a7ef38f679b009e402566c47f Original-Change-Id: I151dba467e2b196f13093334273dae8a05865491 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30547 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1395107 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395107" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/07/1395107/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Iaf7a1f1e44b0ce4cec7863050a2543060ca8ef55" commit="e2c3aa0e2d7a39d28ea59c420d2c985c1cd0ccad" commit_message="UPSTREAM: util/chromeos/crosfirmware.sh: Print download status It's quite useful to know the download progress, as it can take a while even with a fast connection. For example, the peppy recovery image is ~600 MiB. It also lets the user know that disk space is being filled. BUG=none BRANCH=none TEST=none Change-Id: Iaf7a1f1e44b0ce4cec7863050a2543060ca8ef55 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 30348c2058e926b3991888a7bc3d84445c0fe7cc Original-Change-Id: I8c175f9095478ffe33c95b7ef9907c25b5f10f8c Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30548 Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395108 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395108" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/08/1395108/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6972165bc3c961d86e08313bace3c7423a168abe" commit="351cf67759f960483d23be4ab9152389494314e5" commit_message="UPSTREAM: util/chromeos/crosfirmware.sh: Check for dependencies crosfirmware.sh has dependencies that might not be installed on some systems. If a dependency is missing, provide a clear message about the issue and how to resolve it. BUG=none BRANCH=none TEST=none Change-Id: I6972165bc3c961d86e08313bace3c7423a168abe Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: d80607da4d540a27b9f30e665de696a903a9375e Original-Change-Id: I265bd03666f1273d3c22b60aae860c48c758005b Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30549 Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395109 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395109" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/09/1395109/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I41b0cf05a29353a62c7c5b85bd6ec06e82a5d5f2" commit="21d846a720a71906dd7f289e4e541e190cd5d502" commit_message="UPSTREAM: util/chromeos/crosfirmware.sh: Print more messages The existing code has several messages that are only printed when the DEBUG variable is set. These messages are not verbose, and are quite useful to see how the script is progressing. So, print them unconditionally. BUG=none BRANCH=none TEST=none Change-Id: I41b0cf05a29353a62c7c5b85bd6ec06e82a5d5f2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f50bd6d82da0e83b9c4339a5537327d7bf41fff1 Original-Change-Id: I8f78e4563f0b4a42f831194a6e526284c2fbcd92 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30550 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1395110 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395110" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/10/1395110/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I03d918d0818632c69bab38869ff98eb8741f180a" commit="39ef771b67bf006a7cda285b4ce009cb89e703c4" commit_message="UPSTREAM: mb/intel/dg43gt: Program the subsystemid BUG=none BRANCH=none TEST=none Change-Id: I03d918d0818632c69bab38869ff98eb8741f180a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 055d4f25d17b02a8c876094a716411e4f44f3c1a Original-Change-Id: I9f979e63378b1e0090a57849038eaafeb20d7a40 Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/c/30471 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://chromium-review.googlesource.com/1395111 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395111" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/11/1395111/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0d7cc073096d5652255698781ba0d655a7c33dd7" commit="d417f742b156bd495df6a7c76d3771e10a9108b8" commit_message="UPSTREAM: mb/foxconn/d41s: Program the subsystemid BUG=none BRANCH=none TEST=none Change-Id: I0d7cc073096d5652255698781ba0d655a7c33dd7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 5aee981ece2df091eb2866d45560af6475a089e1 Original-Change-Id: I4f9d0cfc9a5bfa259d734f194b015e7be1694ceb Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/c/30472 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://chromium-review.googlesource.com/1395112 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395112" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/12/1395112/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If33d06c40831877fc959490775c4df3a61cc12be" commit="1f9571921127a084f1ab4a82f8f48a53f47317b4" commit_message="UPSTREAM: mb/google/{glados & variants}: Remove duplicated HAVE_SMI_HANDLER HAVE_SMI_HANDLER is already selected in soc/intel/skylake/Kconfig Use "smm-$(CONFIG_HAVE_SMI_HANDLER)" in Makefile.inc files. BUG=none BRANCH=none TEST=none Change-Id: If33d06c40831877fc959490775c4df3a61cc12be Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 245afa8955f0b3f381b1cb1f9139a5cfe99e11bc Original-Change-Id: Ia60e34ee03958b05f2ac0c326632b6dd9f02a2e0 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30476 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395113 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395113" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/13/1395113/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I8d1c86c99335de65ada0b1d706d9b01b6c947e65" commit="8920a269f5cfdf9fb76ab79f5adaf110f43707cb" commit_message="UPSTREAM: mb/gigabyte/ga-b75m-d3{h,v}: Remove duplicated HAVE_SMI_HANDLER HAVE_SMI_HANDLER is already selected here: bd82x6x/Kconfig BUG=none BRANCH=none TEST=none Change-Id: I8d1c86c99335de65ada0b1d706d9b01b6c947e65 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 632bc24a038b8f49386ade698840e76497e77c3e Original-Change-Id: I920800bb7c67cb5efd5dac0a9338a76214de2cab Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30477 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395114 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395114" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/14/1395114/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ic461b56b83bd5ce867ef47e2fa59ff1da9ac3b7d" commit="eb99b91fad70335f75a61b409e6331253fbb7dd2" commit_message="UPSTREAM: mb/google/{auron,jecht}: Remove duplicated HAVE_SMI_HANDLER HAVE_SMI_HANDLER is selected here: broadwell/Kconfig BUG=none BRANCH=none TEST=none Change-Id: Ic461b56b83bd5ce867ef47e2fa59ff1da9ac3b7d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 9dd0f6f9f209306bced8c2046cf2fcffab8c05f6 Original-Change-Id: I50c664198a954f661416c8cb1ced05f8775d8e07 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30478 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395115 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395115" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/15/1395115/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7b38641e68fa316c14f02bfce4deb86c7edaf11e" commit="4591d31060f97562bbd18c9f00d63b1361e8488c" commit_message="UPSTREAM: mb/intel/{kblrvp,kunimitsu,saddlebrook}: Remove duplicated HAVE_SMI_HANDLER HAVE_SMI_HANDLER already selected in skylake/Kconfig file. BUG=none BRANCH=none TEST=none Change-Id: I7b38641e68fa316c14f02bfce4deb86c7edaf11e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b42899c1f72b39134d1d84ba5c6875590c5d6d59 Original-Change-Id: I754cf41a4f97d1e692ad4209e4a59987dce2624b Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30483 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395116 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395116" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/16/1395116/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If7dce68c92759c0d5b9dbb950866721e18778c3b" commit="b5f2c1e89596c946565afc38f71b368064dbfd49" commit_message="UPSTREAM: mb/intel/wtm2: Remove duplicated HAVE_SMI_HANDLER HAVE_SMI_HANDLER already selected in broadwell/Kconfig file. BUG=none BRANCH=none TEST=none Change-Id: If7dce68c92759c0d5b9dbb950866721e18778c3b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 029f8eae7ecefab3178304651446755e00894c64 Original-Change-Id: Ic40b5296eae78cd83c59212042d94424251524b1 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30484 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395117 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395117" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/17/1395117/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I2bc447e1951de730df4dbd8735d7901cfe7983bb" commit="60a28b94e9b2c99ee34b4d3a2d67f9186183e035" commit_message="UPSTREAM: src/mainboard: Use smm-$(CONFIG_HAVE_SMI_HANDLER) Use smm-$(CONFIG_HAVE_SMI_HANDLER) instead of smm-y BUG=none BRANCH=none TEST=none Change-Id: I2bc447e1951de730df4dbd8735d7901cfe7983bb Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4f73d930fe79547c8948ac6c52f86cf890c2e77f Original-Change-Id: I0f91bc3e6c8ab31d837ab89af62d700b35c1e01b Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30485 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395118 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395118" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/18/1395118/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I0e8842de015a99bf5667f4d5a89cb46190966af7" commit="cf0e8b32e371dc26ddd1772578083bd958904b38" commit_message="UPSTREAM: mb/lenovo/x200: Remove RCBA replay This either sets unwanted or unnecessary settings. Tested. Everything still works fine. BUG=none BRANCH=none TEST=none Change-Id: I0e8842de015a99bf5667f4d5a89cb46190966af7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 7bcd062c01d55c6d2dc6ba03a6173463fb5a604e Original-Change-Id: I0f552dea1b37cdc17c9dd26a0294b59063cdc2be Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Original-Reviewed-on: https://review.coreboot.org/c/30402 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://chromium-review.googlesource.com/1395119 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395119" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/19/1395119/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I49e1bee210fbddf9f8892f8c5654a6f16b9dcab2" commit="6b90a6372fec9d42c6108447a89bb278e1e15ac1" commit_message="UPSTREAM: sb/intel/lynxpoint: Remove incomplete SATA ACPI code The existing SATA ACPI code for Lynx Point implements some methods and devices, but not completely. These methods are optional and only used in IDE mode. The code was likely copied from bd82x6x, where it has since been removed. As a result, many remarks produced by iasl about unreferenced objects are eliminated. Tested on an ASRock H81M-HDS and an Acer C720. No issues with SATA were observed. BUG=none BRANCH=none TEST=none Change-Id: I49e1bee210fbddf9f8892f8c5654a6f16b9dcab2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: fff243461cf2a7676243ae4f51494736cdadfdf3 Original-Change-Id: I808a9dff7b9ba34239ffd95fa4cb9b39b10c4b62 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30149 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395120 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395120" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/20/1395120/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I4b905c5128cf299dc2558d23d2c10fcd640061c1" commit="f21e231b2e5b838f60022d2c8506e98047318ee5" commit_message="UPSTREAM: mb/asrock/h81m-hds: Move GPIO header to a linked C file Using a linked C file is the standard approach for GPIO settings. BUG=none BRANCH=none TEST=none Change-Id: I4b905c5128cf299dc2558d23d2c10fcd640061c1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 09a5323480fae9ad20075751cad9d1f25d61a3ab Original-Change-Id: I6a5ca65bc1553bd382589d67379eafd03dc0b0a3 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30503 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395121 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395121" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/21/1395121/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ia8c9f13e971aa4521d011fa0e153dda1dac548f6" commit="38372cdb8762f163d62a5b8178882334092abd63" commit_message="UPSTREAM: sb/intel/lynxpoint/pcie.c: Add more checks for NULL pointers If PCIe root port `n` is disabled, then `rpc.ports[n - 1]` remains NULL. The existing Lynx Point systems probably don't end up dereferencing NULL pointers this way. However, it might occur on a system using Flexible I/O to remap PCIe root ports to other functions. Tested on an ASRock H81M-HDS and an Acer C720 (Google Peppy). No issues presented themselves. BUG=none BRANCH=none TEST=none Change-Id: Ia8c9f13e971aa4521d011fa0e153dda1dac548f6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 05b75241565ae91d0b8ee8b45eb2d8ac55291297 Original-Change-Id: I2c22fa36217766c2c4d6e8046f99989063066b16 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30079 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395122 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395122" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/22/1395122/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I98644a793170798fa7666fd6abf6cfb5e998aeca" commit="c1be072be3f6285ca0994b4c5405b3da0466e995" commit_message="UPSTREAM: nb/intel/haswell: Add support for PEG This means that any PCIe device placed in a PEG slot should now work. During S3 resume, link training sometimes does not complete before device enumeration. However, no tangible issues have been observed. Fixing it would introduce a rather large delay in S3 resume. There are a few minor shortcomings: - Using PEG for display output is not yet supported. - Only PEG2 is supported. An extra (unknown) training sequence is said to be needed for PEG3. - The ACPI _PRT method is not yet generated, so legacy interrupt routing doesn't work for devices with multiple functions. Tested on an ASRock H81M-HDS. Using a Radeon HD 6450 graphics card works under GNU/Linux, with PRIME [1]. An x1 PCIe card was also tested in the PEG slot, and it appears functional. [1]: https://wiki.archlinux.org/index.php/PRIME BUG=none BRANCH=none TEST=none Change-Id: I98644a793170798fa7666fd6abf6cfb5e998aeca Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 334be3289d6ca16e806bd1e2aef87637cebb3122 Original-Change-Id: I786ecb6eccad8de89778af7e736ed664323e220e Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30272 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395123 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395123" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/23/1395123/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ie8628cb2d4d0270fd6ffda55bc62a4134eae0c57" commit="78a37f9e94dc4da4f46afda361296599c06f8e1d" commit_message="UPSTREAM: soc/intel/cannonlake: Add cannonlake ACPI GPIO op Follow instrcution from https://doc.coreboot.org/acpi/gpio.html to implement GPIO toggling method, covered for both CNP_LP and CNP_H pch. BUG=N/A TEST=Build and boot up fine on sarien platform, add an dummy STSX in DSDT table, read back from iotools to confirm the GPIO tx state get updated. Change-Id: Ie8628cb2d4d0270fd6ffda55bc62a4134eae0c57 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 5ff742c740c3d39df85596a99046ef88aef5351f Original-Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Original-Change-Id: I006a6a8fc580c73ac0938968397a628a4ffe504f Original-Reviewed-on: https://review.coreboot.org/c/30461 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395124 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395124" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/24/1395124/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I78a9e1ab928cf6646f91dd4b64a9382688410dd2" commit="0957c3758b639338779cadc1003a19888e08f2bd" commit_message="UPSTREAM: drivers/aspeed: Fix AST2400 POST failure without BMC FW or VBIOS This patch is from Linux, commit 3856081eede2. The commit message there is: > commit 3856081eede297b617560b85e948cfb00bb395ec > Author: Y.C. Chen <yc_chen@aspeedtech.com> > Date: Thu Feb 23 15:52:33 2017 +0800 > > drm/ast: Fix AST2400 POST failure without BMC FW or VBIOS > > The current POST code for the AST2300/2400 family doesn't work properly > if the chip hasn't been initialized previously by either the BMC own FW > or the VBIOS. This fixes it. > > Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> > Tested-by: Y.C. Chen <yc_chen@aspeedtech.com> > Acked-by: Joel Stanley <joel@jms.id.au> > Cc: <stable@vger.kernel.org> > Signed-off-by: Dave Airlie <airlied@redhat.com> Tested on a Supermicro X10SLM+-F with an AST 2400 where the BMC flash chip has been completely erased. Before the patch, the display resembled a rainbow. After the patch, the display works well. Original-Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com> Original-Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Original-Tested-by: Y.C. Chen <yc_chen@aspeedtech.com> Original-Signed-off-by: Dave Airlie <airlied@redhat.com> BUG=none BRANCH=none TEST=none Change-Id: I78a9e1ab928cf6646f91dd4b64a9382688410dd2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 68dc36c9b30f2ca48a199861bf450af3a6a0fd52 Original-Change-Id: I72efcf907fbd1263fe21d4f36fe900b305419c44 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30507 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395125 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395125" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/25/1395125/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ied5e9a2487f7b69fd08f7a89a07049fc0711b5d2" commit="020f84ae3c3d492f9d23243d9b4b5d71177d0fd7" commit_message="UPSTREAM: Doc/nb/intel/haswell: Add a list of known issues BUG=none BRANCH=none TEST=none Change-Id: Ied5e9a2487f7b69fd08f7a89a07049fc0711b5d2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: a6fe456cb52c5133eb5e09d11dc83c0419b5692a Original-Change-Id: If0339831550f6c70e8056f78633e9a402f35a793 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30455 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395126 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395126" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/26/1395126/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I7687af088489a974ebb729b7eea4db0bc512a97d" commit="294bbc89ed317b0190616263b0c1baac3e177e08" commit_message="UPSTREAM: Doc/mb/asrock/h81m-hds: Remove PCIe issue that has been fixed PCIe graphics for display output still doesn't work, but that is now listed in the Haswell-specific documentation. BUG=none BRANCH=none TEST=none Change-Id: I7687af088489a974ebb729b7eea4db0bc512a97d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: b03e994233ac906c88f2897c3cdcbd327ad2d7aa Original-Change-Id: I28c50db353b2b965eb847b379d9e1944cb720c77 Original-Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Original-Reviewed-on: https://review.coreboot.org/c/30273 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://chromium-review.googlesource.com/1395127 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395127" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/27/1395127/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I1fd678887ad2461375bf496ff532c18d62dc8aea" commit="1ab89a514c34ece239b0fa0cb12a58d4e2e8d664" commit_message="UPSTREAM: nb/intel/pineview/raminit.c: Remove unused variable BUG=none BRANCH=none TEST=none Change-Id: I1fd678887ad2461375bf496ff532c18d62dc8aea Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 66b462dd4fac6967354109398f025c46303488e2 Original-Change-Id: I1e0009677fda44faab2021e1c44827fdba803061 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/30612 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1395128 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395128" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/28/1395128/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="If19cb084c6ef132d3f9722011e53ba804d4b0fb5" commit="8576cd29f87c7ad3bae4719f96f47cb11512e58a" commit_message="UPSTREAM: nb/amd/pi/00{630F01,730F01}: Use ARRAY_SIZE Use already defined ARRAY_SIZE macro. BUG=none BRANCH=none TEST=none Change-Id: If19cb084c6ef132d3f9722011e53ba804d4b0fb5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 0afc41e865fb4a3147c45e14483b4676f9019808 Original-Change-Id: Ie22e3557e958b562816921a985411dd55c712142 Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Original-Reviewed-on: https://review.coreboot.org/c/29860 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/1395129 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395129" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/29/1395129/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ideea0507585d362718604082600d4a74507c4910" commit="e1aadec37ef684b87eb845f20fa340d27aeb002d" commit_message="UPSTREAM: mediatek/mt8183: Add DDR driver of rx datlat calibration part BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui, and inits DRAM successfully with related patches. Change-Id: Ideea0507585d362718604082600d4a74507c4910 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 6202d1b51a45e9ed00f742318363920776e32d52 Original-Change-Id: Ia20de54633bf1077bd469df75ccb4390308e0b97 Original-Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Original-Reviewed-on: https://review.coreboot.org/c/28843 Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-by: You-Cheng Syu <youcheng@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395130 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395130" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/30/1395130/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I53387c05a567ba09a4208f51ca870ea8837c8dca" commit="b04e4af932f3ab49afe065e89f3552a048ef8113" commit_message="UPSTREAM: mediatek/mt8183: Add DDR driver of runtime config part BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui, and inits DRAM successfully with related patches. Change-Id: I53387c05a567ba09a4208f51ca870ea8837c8dca Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 7b78a805da0207449c5ea1baf56030ab9f54e2d6 Original-Change-Id: Id1e8862ff6feb9628d37fe5300780ff56865a563 Original-Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Original-Reviewed-on: https://review.coreboot.org/c/28844 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1395131 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395131" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/31/1395131/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="Ib0f79d6c4c19b116cd2223891434df388b1ce127" commit="231b8197e0f42c299b6eaf9267668f36a6901585" commit_message="UPSTREAM: mediatek/mt8183: Add DDR driver of memory test part Write a range of memory with special pattern, and read it back to check whether the read value same as write. The test pattern include 8bit offset read write, 16 bit offset read write, 32bit offset read write, and cross testing. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui, and inits DRAM successfully with related patches. Change-Id: Ib0f79d6c4c19b116cd2223891434df388b1ce127 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 4d15d2fc122a3548099504fc1f49d70087ac45ad Original-Change-Id: I30d5fbd3db2acf36e3058ba4f34558b981fba78c Original-Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Original-Reviewed-on: https://review.coreboot.org/c/28845 Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-by: You-Cheng Syu <youcheng@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1395132 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395132" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/32/1395132/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I48a440a33d0c06c07e8d61f28cddf35010ebb308" commit="a8fe2a9fbbb99419f2adcf32e622aeaea9203970" commit_message="UPSTREAM: google/kukui: Initialize DRAM from romstage Add DRAM support for google kukui. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: I48a440a33d0c06c07e8d61f28cddf35010ebb308 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 66ee65f0368e095fb305e0e84bf69e4c9aede358 Original-Change-Id: I1ed01404343745c883b22a648966327bdcabc5c2 Original-Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Original-Reviewed-on: https://review.coreboot.org/c/28438 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1395133 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> " fail_count="0" gerrit_number="1395133" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/33/1395133/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I431b7601bb3513a2ec2a1d3b807a84c9eada7fd6" commit="09fb4073904f93aef5f70785b60b6dfa361460f9" commit_message="UPSTREAM: ALSA: pcm: Unify delay calculation in snd_pcm_status() and snd_pcm_delay() Yet another slight code cleanup: there are two places where calculating the PCM delay, and they can be unified in a single helper. It reduces the multiple open codes. Reviewed-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de> (cherry picked from commit c99c5a3bb575f67700f9d1b216652750ea4a31a5) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I431b7601bb3513a2ec2a1d3b807a84c9eada7fd6 Reviewed-on: https://chromium-review.googlesource.com/1353511 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353511" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/11/1353511/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="If258baa3e420f206cb18f103f50e450acbd6fd9a" commit="bd7929e9355a48085c60c79e62adf0d6f8e04753" commit_message="UPSTREAM: ASoC: nau8824: user configuration of key detection The SAR ADC of key press detection varies depending on headset. We can't make a set of common threshold values for every case. Therefore, the driver provides configuration for user and they can set up values by UCM configuration. Signed-off-by: John Hsu <KCHSU0@nuvoton.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit 7b0037fa2d6048284e90de4131fc53c0ac1d4430) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: If258baa3e420f206cb18f103f50e450acbd6fd9a Reviewed-on: https://chromium-review.googlesource.com/1353512 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353512" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/12/1353512/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I2b9f45a5dd3db8dffbcee8657ccd3b6779e38e6c" commit="4a1c8c1eb144ff6a72b7aa9e67b3816270bd0c53" commit_message="UPSTREAM: ASoC: Intel: byt-max98090: Replace GFP_ATOMIC with GFP_KERNEL In byt_max98090_probe which is not atomic context, we use GFP_ATOMIC flag with memory allocation, fix that by using GFP_KERNEL. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit ffa481cf5d0e338e9221000805127c8cb3e2b150) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I2b9f45a5dd3db8dffbcee8657ccd3b6779e38e6c Reviewed-on: https://chromium-review.googlesource.com/1353513 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353513" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/13/1353513/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I52bae7cac2991da819e8117ab674a9f371213f0b" commit="4970ffef0648b9f3376bdd8dd0f86c69f2d9be22" commit_message="UPSTREAM: ASoC: Intel: bytcht_es8316: Replace GFP_ATOMIC with GFP_KERNEL In snd_byt_cht_es8316_mc_probe which is not atomic context, we use GFP_ATOMIC flag with memory allocation, fix that by using GFP_KERNEL. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit d441b8588c3661afdcf61855aad38addb6833581) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I52bae7cac2991da819e8117ab674a9f371213f0b Reviewed-on: https://chromium-review.googlesource.com/1353514 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353514" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/14/1353514/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I68a7c756e9496b83a4f3c29a5e9ca8c9c9a208eb" commit="544e182b1b0a5445af5e95bb61d34226e62dd625" commit_message="UPSTREAM: ASoC: Intel: bytcr_rt5651: Replace GFP_ATOMIC with GFP_KERNEL In snd_byt_rt5651_mc_probe which is not atomic context, we use GFP_ATOMIC flag with memory allocation, fix that by using GFP_KERNEL. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit aa5398e1e90bd08078797570e2bcda1b15934979) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I68a7c756e9496b83a4f3c29a5e9ca8c9c9a208eb Reviewed-on: https://chromium-review.googlesource.com/1353515 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353515" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/15/1353515/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I09de29b77f07f01e0addece1726cce7446ae79ba" commit="ddde05f3ce4f1f60684ed298bb7e0238689aa288" commit_message="UPSTREAM: ASoC: Intel: cht_bsw_nau8824: Replace GFP_ATOMIC with GFP_KERNEL In snd_cht_mc_probe which is not atomic context, we use GFP_ATOMIC flag with memory allocation, fix that by using GFP_KERNEL. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit b113855a5a28c1574ad744dd9a34748442d6e006) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I09de29b77f07f01e0addece1726cce7446ae79ba Reviewed-on: https://chromium-review.googlesource.com/1353516 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353516" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/16/1353516/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="Id0b8bccc216f3a5e717c79b9600f169b1b6c03f6" commit="8ba6a9cf98d39bf2ea130588c28e780c63eb16a2" commit_message="UPSTREAM: ASoC: Intel: kbl_rt5663_max98927: Replace GFP_ATOMIC with GFP_KERNEL In kabylake_audio_probe which is not atomic context, we use GFP_ATOMIC flag with memory allocation, fix that by using GFP_KERNEL. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit 5272681608e9f0f5746e8a97fdb5c3d4c29ab76e) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: Id0b8bccc216f3a5e717c79b9600f169b1b6c03f6 Reviewed-on: https://chromium-review.googlesource.com/1353518 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353518" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/18/1353518/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I82204e6d9ac28e2c84b92029e31c1ea7f281f32b" commit="406d052b053bd81e4e308d26b15079e68a02ac94" commit_message="UPSTREAM: ASoC: Intel: kbl_rt5663_rt5514_max98927: Replace GFP_ATOMIC with GFP_KERNEL In kabylake_audio_probe which is not atomic context, we use GFP_ATOMIC flag with memory allocation, fix that by using GFP_KERNEL. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit 46c33133ab70873ec32b2e9d970961f832058f60) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I82204e6d9ac28e2c84b92029e31c1ea7f281f32b Reviewed-on: https://chromium-review.googlesource.com/1353519 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353519" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/19/1353519/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="Id78ad3e4baaadeba775d256894b29cd190515527" commit="0a75924dbb7bc48b51e25f3d16a32200b0ae0541" commit_message="UPSTREAM: ALSA: cmi8328: array_find() can be static Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> (cherry picked from commit c4e4a8fb236a6893e2cf0b16d3c1c6c07ee017c8) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: Id78ad3e4baaadeba775d256894b29cd190515527 Reviewed-on: https://chromium-review.googlesource.com/1353520 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353520" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/20/1353520/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I46a02e5f2b505cac46b873efcbaa1bc44ff4699a" commit="a6b3d02b2179cb3c61d9dca76600eec44c76753c" commit_message="UPSTREAM: ALSA: control: Fix missing __user annotation There is one place missing __user annotation to the pointer used by the recent code refactoring. Reported by sparse. Fixes: 450296f305f1 ("ALSA: control: code refactoring TLV ioctl handler") Reviewed-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de> (cherry picked from commit 1ba7862f1f5a7a3b268cf79ac236611546888a90) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I46a02e5f2b505cac46b873efcbaa1bc44ff4699a Reviewed-on: https://chromium-review.googlesource.com/1353521 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353521" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/21/1353521/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="If45a38f5e040905c870655784cebf6bab463d2b7" commit="18bee61d36fa9bfe04967f07d05e8482be1b65c4" commit_message="UPSTREAM: ALSA: hda - Use a macro for snd_array iteration loops Introduce a new helper macro, snd_array_for_each(), to iterate for each snd_array element. It slightly improves the readability than lengthy open codes at each place. Along with it, add const prefix to some obvious places. There should be no functional changes by this. Signed-off-by: Takashi Iwai <tiwai@suse.de> (cherry picked from commit a9c2dfc8527318a27db045cd7ea51e8ecab8c884) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: If45a38f5e040905c870655784cebf6bab463d2b7 Reviewed-on: https://chromium-review.googlesource.com/1353522 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353522" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/22/1353522/4" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-4.14" change_id="I377af89e6feec3897fa9908b1d7f2e7601617ca4" commit="2984ff0aeb3a2097725f3886cf10922034cbd062" commit_message="UPSTREAM: ASoC: compress: Only call free for components which have been opened The core should only call free on a component if said component has already had open called on it. This is not presently the case and most compressed drivers in the kernel assume it will be. This causes null pointer dereferences in the drivers as they attempt clean up for stuff that was never put in place. This is fixed by aborting calling open callbacks once a failure is encountered and then during clean up only iterating through the component list to that point. This is a fairly quick fix to the issue, to allow backporting. There is more refactoring to follow to tidy the code up a little. Fixes: 9e7e3738ab0e ("ASoC: snd_soc_component_driver has snd_compr_ops") Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit 572e6c8dd174bc6fc7ba5d9b6935e9ec8d2660f5) Signed-off-by: Samaga Prasanna Krishna <samaga.krishna@intel.corp-partner.google.com> BUG=b:110025789 TEST=Test Audio use cases with full SOF 0.6 rebase release series applied. Change-Id: I377af89e6feec3897fa9908b1d7f2e7601617ca4 Reviewed-on: https://chromium-review.googlesource.com/1353523 Commit-Ready: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Reviewed-by: Kamal Ap <kamal.ap@intel.com> Reviewed-by: Curtis Malainey <cujomalainey@chromium.org> " fail_count="0" gerrit_number="1353523" owner_email="samaga.krishna@intel.corp-partner.google.com" pass_count="0" patch_number="4" project="chromiumos/third_party/kernel" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/kernel" ref="refs/changes/23/1353523/4" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I87925c776c9dcbeb66b6a8e1ba2d3f6688851e03" commit="bdeebc48341e7aa579721fae7ed90f2531d73a80" commit_message="cros_extract_deps: clean up cli parser a bit This standardizes the parser usage a bit: - Move all text to module docstring and set that as the description. - Use nargs=* instead of parse_known_args to get optional list of pkgs. - Freeze the parser once we're done with it. - Rename known_args to opts. BUG=None TEST=`cros_extract_deps sys-libs/zlib` still works Change-Id: I87925c776c9dcbeb66b6a8e1ba2d3f6688851e03 Reviewed-on: https://chromium-review.googlesource.com/1393870 Commit-Ready: Mike Frysinger <vapier@chromium.org> Tested-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: LaMont Jones <lamontjones@chromium.org> " fail_count="0" gerrit_number="1393870" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/70/1393870/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I184a1c0ac12a174bea547c00babc9af78b649303" commit="5dc0ef684c22c6c9002a139846021fbe86c3121c" commit_message="cros_extract_deps: sort output The current output is pretty non-deterministic. Since we've already computed the full list by the time this report func runs, sorting it shouldn't add that much overhead. BUG=None TEST=`cros_extract_deps --board betty --format cpe virtual/target-os` is sorted Change-Id: I184a1c0ac12a174bea547c00babc9af78b649303 Reviewed-on: https://chromium-review.googlesource.com/1393871 Commit-Ready: Mike Frysinger <vapier@chromium.org> Tested-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: LaMont Jones <lamontjones@chromium.org> " fail_count="0" gerrit_number="1393871" owner_email="vapier@chromium.org" pass_count="0" patch_number="1" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/71/1393871/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I60422da5649962193154cd163431d8d22ef4a19f" commit="58c7f4820dc3a6cd2e927d68aa6483521e45aa4e" commit_message="vm_tools: Added exec to app data This changes garcon and cicerone to send the exec names of desktop files are appropriately communicated via protos. Note that the exec name is parsed so that it is the exec name and not just the raw exec field. TEST=updated desktop_file_test to test for exec, mannually tested overall system BUG=chromium:849936 CQ-DEPEND=CL:1381311 Change-Id: I60422da5649962193154cd163431d8d22ef4a19f Reviewed-on: https://chromium-review.googlesource.com/1381320 Commit-Ready: Daniel Ng <danielng@google.com> Tested-by: Daniel Ng <danielng@google.com> Reviewed-by: Jeffrey Kardatzke <jkardatzke@google.com> " fail_count="1" gerrit_number="1381320" owner_email="danielng@google.com" pass_count="0" patch_number="6" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/20/1381320/6" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Ifdb472a585027b19dd7fcdf7d00b36a47b9bf872" commit="998cef9579b98c04b3a8fc07a108369abc3082ee" commit_message="lib/buildstore.py: Initial BuildStore The CL to implement the framework for BuildStore interface which will recieve all the DB calls within Chromite eventually. This CL moves InsertBuild and InsertBuildStage. BUG=chromium:912340 TEST=tryjob Change-Id: Ifdb472a585027b19dd7fcdf7d00b36a47b9bf872 Reviewed-on: https://chromium-review.googlesource.com/1366409 Commit-Ready: Dhanya Ganesh <dhanyaganesh@chromium.org> Tested-by: Dhanya Ganesh <dhanyaganesh@chromium.org> Reviewed-by: Jason Clinton <jclinton@chromium.org> " fail_count="1" gerrit_number="1366409" owner_email="dhanyaganesh@chromium.org" pass_count="0" patch_number="40" project="chromiumos/chromite" project_url="https://chromium-review.googlesource.com/chromiumos/chromite" ref="refs/changes/09/1366409/40" remote="cros" total_fail_count="11"/><pending_commit branch="master" change_id="I1816ea036963e014857f999adcc5531db1ce632d" commit="1f92e9a1af979fee40337e11d401bbc142ccd0b2" commit_message="vm_tools: cicerone: support async StartLxdContainer BUG=chromium:911333 TEST=vm.Crostini* Change-Id: I1816ea036963e014857f999adcc5531db1ce632d Reviewed-on: https://chromium-review.googlesource.com/1375093 Commit-Ready: Stephen Barber <smbarber@chromium.org> Tested-by: Stephen Barber <smbarber@chromium.org> Reviewed-by: Chirantan Ekbote <chirantan@chromium.org> " fail_count="0" gerrit_number="1375093" owner_email="smbarber@chromium.org" pass_count="0" patch_number="3" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/93/1375093/3" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I1c70b0169d12ba38fd9fd22f92a9819fec9c4e8e" commit="a8d56b3520ff5054fbe09c1eaab29aa222ad2e94" commit_message="attestation: refactor main.cc 1. remove redundant static qualifiers in unnamed namespace. BUG=None TEST=unit test and deployment passed on nautilus device Change-Id: I1c70b0169d12ba38fd9fd22f92a9819fec9c4e8e Reviewed-on: https://chromium-review.googlesource.com/1390738 Commit-Ready: Leo Lai <cylai@google.com> Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Meng-Huan Yu <menghuan@chromium.org> Reviewed-by: Wei-Cheng Xiao <garryxiao@chromium.org> Reviewed-by: Leo Lai <cylai@google.com> Reviewed-by: Andrey Pronin <apronin@chromium.org> " fail_count="0" gerrit_number="1390738" owner_email="cylai@google.com" pass_count="0" patch_number="6" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/38/1390738/6" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I81815b9eccc7bdb64c6530afd2aa919676fbf333" commit="66833461adcf7420d86eafbc7af1abcafebd54c1" commit_message="Adding telemetry_Benchmarks.media.desktop BUG=chromium:709161 TEST=run this telemetry benchmark Change-Id: I81815b9eccc7bdb64c6530afd2aa919676fbf333 Reviewed-on: https://chromium-review.googlesource.com/1394603 Commit-Ready: Vovo Yang <vovoy@chromium.org> Tested-by: Vovo Yang <vovoy@chromium.org> Reviewed-by: Chung-yih Wang <cywang@chromium.org> " fail_count="0" gerrit_number="1394603" owner_email="vovoy@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/03/1394603/1" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="If5f4c3524aa6f741d39c1e3c95d61f54b0a17294" commit="ee6773df3cd3852471e100918d91b8452e8c8326" commit_message="[Autotest] policy_DefaultJavaScriptSetting If the policy is set to Allow then all sites will be able to run JavaScript. If the policy is set to Do Not Allow then no sites will be able to run JavaScript. BUG=chromium:917863 TEST=this Change-Id: If5f4c3524aa6f741d39c1e3c95d61f54b0a17294 Reviewed-on: https://chromium-review.googlesource.com/1390281 Commit-Ready: Ruben Zakarian <rzakarian@chromium.org> Tested-by: Ruben Zakarian <rzakarian@chromium.org> Reviewed-by: Ruben Zakarian <rzakarian@chromium.org> " fail_count="0" gerrit_number="1390281" owner_email="rzakarian@chromium.org" pass_count="0" patch_number="11" project="chromiumos/third_party/autotest" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/autotest" ref="refs/changes/81/1390281/11" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="I4b547e4745d61e8cd5125af501019782717ca981" commit="a6ab01e251dbe14605a3e5461917da15cd3b356c" commit_message="shill: cellular: scale signal strength values Scales cellular signal strength values reported by modem manager. This allows us to have a non-linear mapping between signal strength and number of bars shown on cellular network icons. By applying this change, mapping of signal quality to number of bars shown on network icons is: [1-12] 1 bar, [13-24] 2 bars, [25-37] 3 bars, [38-100] 4 bars. BUG=chromium:904285 TEST=Ran unit tests and tested manually Change-Id: I4b547e4745d61e8cd5125af501019782717ca981 Reviewed-on: https://chromium-review.googlesource.com/1354184 Commit-Ready: Tony De Luna <tonydeluna@chromium.org> Tested-by: Tony De Luna <tonydeluna@chromium.org> Reviewed-by: Tony De Luna <tonydeluna@chromium.org> Reviewed-by: Ben Chan <benchan@chromium.org> " fail_count="0" gerrit_number="1354184" owner_email="tonydeluna@chromium.org" pass_count="0" patch_number="6" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/84/1354184/6" remote="cros" total_fail_count="0"/><pending_commit branch="master" change_id="Ie16c1a4d1c07545d15acfe7375e6e7c2b9c2ea43" commit="884bac1f870ea53109208e7ebb89de1cda873908" commit_message="cryptohome: remove UnmountForUser There's a comment on this method questioning whether it should even exist, and it has no external users. It's not even exposed to Chrome via system_api. Thus, it's dead, and we should remove it. If we want this functionality later, we should reimplement it in a new-style Ex method. BUG=chromium:811551 TEST=unit tests, pre-cq Change-Id: Ie16c1a4d1c07545d15acfe7375e6e7c2b9c2ea43 Reviewed-on: https://chromium-review.googlesource.com/1395045 Commit-Ready: Eric Caruso <ejcaruso@chromium.org> Tested-by: Eric Caruso <ejcaruso@chromium.org> Reviewed-by: Greg Kerr <kerrnel@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> " fail_count="0" gerrit_number="1395045" owner_email="ejcaruso@chromium.org" pass_count="0" patch_number="1" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/45/1395045/1" remote="cros" total_fail_count="0"/><pending_commit branch="chromeos-2016.05" change_id="I6687c9fda560ef209c473bce43e1aa4d1c1c700e" commit="82e26d0d28ec6fb86ae8ec5e997e4643af893bb5" commit_message="UPSTREAM: mb/google/poppy/variant/nami: add the vbt setting for bard sku Modify the vbios's eDP signal setting from level0(0dB) to level1 (3.5dB) for bard Add VBT blobs and include it in cbfs BUG=b:119448457 TEST=Test & measure eDP signal Change-Id: I6687c9fda560ef209c473bce43e1aa4d1c1c700e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 337afb05676e4079263d289b21ff822570e90d3d Original-Change-Id: I0b854a6adad43844282aed61d26e798727b5cb62 Original-Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/30375 Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/1392645 Commit-Ready: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> " fail_count="1" gerrit_number="1392645" owner_email="pgeorgi@chromium.org" pass_count="0" patch_number="1" project="chromiumos/third_party/coreboot" project_url="https://chromium-review.googlesource.com/chromiumos/third_party/coreboot" ref="refs/changes/45/1392645/1" remote="cros" total_fail_count="1"/><pending_commit branch="master" change_id="Iebdd3a0e362712fa6d8e720dd96788e577548be8" commit="5dd02c3db6480dabe6649619ed05c8dc2de10904" commit_message="policy_utils: Add new policy cmd-line tool New policy tool to override device policies on device. It uses a syntax such as "policy set DeviceAllowBluetooth true" to set, edit or clear local policy settings JSON files that Chrome automatically consume and apply. BUG=None TEST=Ran related unit tests Change-Id: Iebdd3a0e362712fa6d8e720dd96788e577548be8 Reviewed-on: https://chromium-review.googlesource.com/1392060 Commit-Ready: Georges Winkenbach <gwink@chromium.org> Tested-by: Georges Winkenbach <gwink@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Paul Moy <pmoy@chromium.org> " fail_count="0" gerrit_number="1392060" owner_email="gwink@chromium.org" pass_count="0" patch_number="4" project="chromiumos/platform2" project_url="https://chromium-review.googlesource.com/chromiumos/platform2" ref="refs/changes/60/1392060/4" remote="cros" total_fail_count="0"/><lkgm version="11521.0.0-rc1"/></manifest> |
