skylake boards: unconditionally re-enable 8254 PIT for legacy
Legacy payloads may rely on the 8254 programmable interrupt timer.
Therefore, always re-enable the 8254 timer by masking off the
static clock gating enable bit.
All existing skylake boards were adjusted to select DRIVERS_SOC_SKYLAKE
and the PCR access was moved into drivers/soc/skylake. The soc driver
subsystem infrastructure was added to more accurately reflect broader
SoC support instead of jamming that information into an unrelated
subsystem.
BUG=chrome-os-partner:50214
BRANCH=glados
TEST=Confirmed 8254 static clock gate bit cleared in legacy path.
Change-Id: I161f331121f236cfdea3542f2d0649e2a81beda9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329158
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
11 files changed
