| /* lteenb configuration file version 2022-03-19 |
| * Copyright (C) 2019-2022 Amarisoft |
| * LTE cell + NR cell */ |
| |
| #define TDD 0 // Values: 0 (LTE FDD), 1(LTE TDD) |
| #define NR_TDD 1 // Values: 0 (NR FDD), 1(NR TDD) |
| #define FR2 0 // Values: 0 (FR1), 1 (FR2) |
| #define NR_TDD_CONFIG 2 // Values: FR1: 1, 2, 3, 4 (compatible with LTE TDD config 2) FR2: 10 |
| #define N_RB_DL 100 // Values: 6 (1.4MHz), 25 (5MHz), 50 (10MHz), 75 (15MHz), 100 (20MHz) |
| #define N_ANTENNA_DL 2 // Values: 1 (SISO), 2 (MIMO 2x2), 4 (MIMO 4x4) |
| #define TRX_MAX_BANDWIDTH 100 // Values: 50 (50MHz), 100 (100MHz). Maximum bandwidth supported by one single SDR board. |
| // Set it to 50 in case of PCIe SDR 50Mhz board. |
| // Set it to 100 in case of PCIe SDR 100Mhz board. |
| #define NR_BANDWIDTH 20 // NR cell bandwidth. With the PCIe SDR50 board, up to 50 MHz is supported. |
| // With the PCIe SDR100 board, up to 100 MHz is supported. |
| // For a bandwidth higher than the maximum bandwidth of a single board (TRX_MAX_BANDWIDTH), two SDR boards are used in parallel (experimental). |
| #define NR_LONG_PUCCH_FORMAT 2 // Values: 2, 3, 4 |
| |
| #define ALLOW_SA 0 // 1 to allow SA NR in addition to NSA NR |
| |
| #define USE_SRS 0 // define to 1 to enable periodic SRS |
| |
| { |
| //log_options: "all.level=debug,all.max_size=1", |
| log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,s1ap.level=debug,s1ap.max_size=1,x2ap.level=debug,x2ap.max_size=1,rrc.level=debug,rrc.max_size=1", |
| |
| log_filename: "/tmp/gnb0.log", |
| |
| /* Enable remote API and Web interface */ |
| com_addr: "0.0.0.0:9001", |
| |
| rf_driver: { |
| name: "sdr", |
| |
| /* list of devices. 'dev0' is always the master. */ |
| #if NR_BANDWIDTH > TRX_MAX_BANDWIDTH |
| #if N_ANTENNA_DL <= 2 |
| args: "dev0=/dev/sdr0,dev1=/dev/sdr1,dev2=/dev/sdr2", |
| #else |
| args: "dev0=/dev/sdr0,dev1=/dev/sdr1,dev2=/dev/sdr2,dev3=/dev/sdr3,dev4=/dev/sdr4,dev5=/dev/sdr5", |
| #endif |
| #else |
| #if N_ANTENNA_DL <= 2 |
| args: "dev0=/dev/sdr0,dev1=/dev/sdr1", |
| #else |
| args: "dev0=/dev/sdr0,dev1=/dev/sdr1,dev2=/dev/sdr2,dev3=/dev/sdr3", |
| #endif |
| #endif |
| /* TDD: force the RX antenna on the RX connector */ |
| rx_antenna: "rx", |
| |
| /* synchronisation source: none, internal, gps, external (default = none) */ |
| // sync: "gps", |
| }, |
| tx_gain: 90.0, /* TX gain (in dB) */ |
| rx_gain: 60.0, /* RX gain (in dB) */ |
| |
| rf_ports: [ |
| { |
| /* RF port for the LTE cell */ |
| }, |
| { |
| /* RF port for the NR cell */ |
| #if NR_BANDWIDTH > TRX_MAX_BANDWIDTH |
| n_subband: 2, |
| guard_band: 6.1, /* MHz */ |
| #if TRX_MAX_BANDWIDTH == 50 |
| sample_rate: 61.44, /* MHz */ |
| #else |
| sample_rate: 122.88, /* MHz */ |
| #endif |
| #endif |
| #if FR2 |
| /* an external frequency translator must be used */ |
| rf_dl_freq: 3000.08, /* MHz */ |
| rf_ul_freq: 3000.08, /* MHz */ |
| #endif |
| }, |
| ], |
| |
| mme_list: [ |
| { |
| /* address of MME for S1AP connection. Must be modified if the MME runs on a different host. */ |
| mme_addr: "127.0.1.100", |
| }, |
| ], |
| /* GTP bind address (=address of the ethernet interface connected to |
| the MME). Must be modified if the MME runs on a different host. */ |
| gtp_addr: "127.0.1.1", |
| |
| /* high 24 bits of SIB1.cellIdentifier */ |
| enb_id: 0x1A2D0, |
| |
| #if ALLOW_SA |
| gnb_id_bits: 28, |
| gnb_id: 0x12345, |
| |
| amf_list: [ |
| { |
| /* address of AMF for NGAP connection. Must be modified if the AMF runs on a different host. */ |
| amf_addr: "127.0.1.100", |
| }, |
| ], |
| #endif |
| |
| en_dc_support: true, |
| |
| /* list of cells */ |
| cell_list: [ |
| { |
| rf_port: 0, |
| /* Broadcasted PLMN identities */ |
| plmn_list: [ |
| "00101", |
| ], |
| #if TDD == 1 |
| dl_earfcn: 40620, /* 2593 MHz (band 41) */ |
| #else |
| dl_earfcn: 2150, /* DL center frequency: 2130 MHz (Band 4) */ |
| // dl_earfcn: 300, /* DL center frequency: 2140 MHz (Band 1) */ |
| #endif |
| n_id_cell: 1, |
| cell_id: 0x01, |
| tac: 0x0001, |
| root_sequence_index: 120, /* PRACH root sequence index */ |
| en_dc_scg_cell_list: [ |
| { cell_id: 0x02 } |
| ], |
| }, |
| ], /* cell_list */ |
| |
| nr_cell_list: [ |
| { |
| rf_port: 1, |
| #if ALLOW_SA |
| plmn_list: [ { |
| tac: 100, |
| plmn: "00101", |
| reserved: false, |
| }, |
| ], |
| #endif |
| cell_id: 0x02, |
| #if NR_TDD == 1 |
| #if FR2 |
| band: 257, |
| dl_nr_arfcn: 2079167, /* 28000.08 MHz */ |
| subcarrier_spacing: 120, /* kHz */ |
| ssb_pos_bitmap: "0100000000000000000000000000000000000000000000000000000000000000", |
| |
| /* uncomment to have a higher per-UE bitrate at the expense of |
| higher gNB real time constraints. */ |
| // rx_to_tx_latency: 10, /* slots */ |
| #else |
| band: 78, |
| dl_nr_arfcn: 632628, /* 3489.42 MHz */ |
| subcarrier_spacing: 30, /* kHz */ |
| ssb_pos_bitmap: "10000000", |
| #endif |
| #else |
| band: 5, |
| dl_nr_arfcn: 176300, /* 881.5 MHz */ |
| subcarrier_spacing: 15, /* kHz */ |
| ssb_pos_bitmap: "1000", |
| #endif |
| }, |
| ], /* nr_cell_list */ |
| |
| /* default cell parameters */ |
| cell_default: { |
| n_antenna_dl: N_ANTENNA_DL, /* number of DL antennas */ |
| n_antenna_ul: 1, /* number of UL antennas */ |
| |
| #if TDD == 1 |
| uldl_config: 2, /* TDD only */ |
| sp_config: 7, /* TDD only */ |
| #endif |
| |
| n_rb_dl: N_RB_DL, /* Bandwidth: 25: 5 MHz, 50: 10 MHz, 75: 15 MHz, 100: 20 MHz */ |
| cyclic_prefix: "normal", |
| |
| phich_duration: "normal", |
| phich_resource: "1", /* ratio of NG */ |
| |
| /* SIB1 */ |
| si_value_tag: 0, /* increment modulo 32 if SI is modified */ |
| cell_barred: false, /* SIB1.cellBarred-r13 */ |
| intra_freq_reselection: true, /* SIB1.intraFreqReselection */ |
| q_rx_lev_min: -70, /* SIB1.q-RxLevMin */ |
| p_max: 10, /* maximum power allowed for the UE (dBm) */ |
| si_window_length: 40, /* ms */ |
| sib_sched_list: [ |
| { |
| filename: "sib2_3.asn", |
| si_periodicity: 16, /* frames */ |
| }, |
| ], |
| |
| #if N_RB_DL == 6 |
| si_coderate: 0.30, /* maximum code rate for SI/RA/P-RNTI messages */ |
| #else |
| si_coderate: 0.20, /* maximum code rate for SI/RA/P-RNTI messages */ |
| #endif |
| si_pdcch_format: 2, /* 2 or 3. Log2 of the number of CCEs for PDCCH |
| for SI/RA/P-RNTI */ |
| |
| n_symb_cch: 0, /* number of symbols for CCH (0 = auto) */ |
| |
| /* PDSCH dedicated config (currently same for all UEs) */ |
| pdsch_dedicated: { |
| #if N_ANTENNA_DL >= 4 |
| p_a: -6, |
| #elif N_ANTENNA_DL == 2 |
| p_a: -3, |
| #else |
| p_a: 0, |
| #endif |
| p_b: -1, /* -1 means automatic */ |
| }, |
| |
| /* If defined, force for number of CCEs for UE specific PDCCH to |
| 2^pdcch_format. Otherwise it is computed from the reported |
| CQI. Range: 0 to 3. */ |
| /* pdcch_format: 2, */ |
| |
| /* if defined, force the PDSCH MCS for all UEs. Otherwise it is |
| computed from the reported CQI */ |
| /* pdsch_mcs: 12, */ |
| |
| #if N_RB_DL == 6 |
| prach_config_index: 15, /* subframe 9 every 20 ms */ |
| #else |
| prach_config_index: 4, /* subframe 4 every 10 ms */ |
| #endif |
| prach_freq_offset: -1, /* -1 means automatic */ |
| |
| /* PUCCH dedicated config (currently same for all UEs) */ |
| pucch_dedicated: { |
| n1_pucch_sr_count: 11, /* increase if more UEs are needed */ |
| cqi_pucch_n_rb: 1, /* increase if more UEs are needed */ |
| #if TDD == 1 |
| //tdd_ack_nack_feedback_mode: "bundling", /* TDD only */ |
| tdd_ack_nack_feedback_mode: "multiplexing", /* TDD only */ |
| #endif |
| }, |
| |
| /* PUSCH dedicated config (currently same for all UEs) */ |
| pusch_dedicated: { |
| beta_offset_ack_index: 9, |
| beta_offset_ri_index: 6, |
| beta_offset_cqi_index: 6, |
| }, |
| |
| pusch_hopping_offset: -1, /* -1 means automatic */ |
| |
| /* MCS for Msg3 (=CCCH RRC Connection Request) */ |
| pusch_msg3_mcs: 0, |
| |
| /* this CQI value is assumed when none is received from the UE */ |
| #if N_RB_DL == 6 |
| initial_cqi: 5, |
| #else |
| initial_cqi: 3, |
| #endif |
| |
| /* if defined, force the PUSCH MCS for all UEs. Otherwise it is |
| computed from the last received SRS/PUSCH. */ |
| // pusch_mcs: 18, |
| |
| dl_256qam: true, |
| ul_64qam: true, |
| |
| /* Scheduling request period (ms). Must be >= 40 for HD-FDD */ |
| sr_period: 20, |
| |
| /* CQI report config */ |
| cqi_period: 40, /* period (ms). Must be >= 32 for HD-FDD */ |
| |
| #if N_ANTENNA_DL >= 2 |
| /* RI reporting is done with a period of m_ri * cqi_period. |
| m_ri = 0 (default) disables RI reporting. */ |
| m_ri: 8, |
| /* transmission mode */ |
| transmission_mode: 3, |
| #endif |
| |
| /* SRS dedicated config. All UEs share these |
| parameters. srs_config_index and freq_domain_position are |
| allocated for each UE) */ |
| srs_dedicated: { |
| #if N_RB_DL == 6 |
| srs_bandwidth_config: 7, |
| srs_bandwidth: 1, |
| #elif N_RB_DL == 15 |
| srs_bandwidth_config: 6, |
| srs_bandwidth: 1, |
| #elif N_RB_DL == 25 |
| srs_bandwidth_config: 3, |
| srs_bandwidth: 1, |
| #elif N_RB_DL == 50 |
| srs_bandwidth_config: 2, |
| srs_bandwidth: 2, |
| #elif N_RB_DL == 75 |
| srs_bandwidth_config: 2, |
| srs_bandwidth: 2, |
| #else |
| srs_bandwidth_config: 2, |
| srs_bandwidth: 3, |
| #endif |
| srs_subframe_config: 3, /* 0 - 15 */ |
| srs_period: 40, /* period (ms). Must be >= 40 for HD-FDD */ |
| srs_hopping_bandwidth: 0, |
| }, |
| |
| /* MAC configuration (same for all UEs) */ |
| mac_config: { |
| ul_max_harq_tx: 5, /* max number of HARQ transmissions for uplink */ |
| dl_max_harq_tx: 5, /* max number of HARQ transmissions for downlink */ |
| }, |
| |
| /* CPU load limitation */ |
| pusch_max_its: 6, /* max number of turbo decoder iterations */ |
| |
| /* dynamic power control */ |
| dpc: true, |
| dpc_pusch_snr_target: 25, |
| dpc_pucch_snr_target: 20, |
| |
| /* RRC/UP ciphering algorithm preference. EEA0 is always the last. */ |
| cipher_algo_pref: [], |
| /* RRC integrity algorithm preference. EIA0 is always the last. */ |
| integ_algo_pref: [1, 2], |
| |
| /* (in ms) send RRC connection release after this time of network |
| inactivity */ |
| inactivity_timer: 10000, |
| |
| /* SRB configuration */ |
| srb_config: [ |
| { |
| id: 1, |
| maxRetxThreshold: 32, |
| t_Reordering: 45, |
| t_PollRetransmit: 60, |
| }, |
| { |
| id: 2 , |
| maxRetxThreshold: 32, |
| t_Reordering: 45, |
| t_PollRetransmit: 60, |
| } |
| ], |
| |
| /* measurement configuration */ |
| meas_config_desc: { |
| a1_report_type: "rsrp", |
| a1_rsrp: -70, |
| a1_hysteresis: 10, |
| a1_time_to_trigger: 320, |
| a2_report_type: "rsrp", |
| a2_rsrp: -110, |
| a2_hysteresis: 0, |
| a2_time_to_trigger: 640, |
| a3_report_type: "rsrp", |
| a3_offset: 6, |
| a3_hysteresis: 0, |
| a3_time_to_trigger: 256, |
| rsrp_filter_coeff: 3, |
| nr_b1_report_type: "rsrp", |
| nr_b1_rsrp: -100, |
| nr_b1_hysteresis: 0, |
| nr_b1_time_to_trigger: 100, |
| nr_rsrp_filter_coeff: 3 |
| }, |
| meas_gap_config: "gp0", |
| |
| /* DRB configuration */ |
| drb_config: "drb.cfg", |
| }, |
| |
| nr_cell_default: { |
| bandwidth: NR_BANDWIDTH, /* MHz */ |
| n_antenna_dl: N_ANTENNA_DL, |
| n_antenna_ul: 1, |
| |
| /* force the timing TA offset (optional) */ |
| // n_timing_advance_offset: 39936, |
| /* subframe offset to align with the LTE TDD pattern (optional) */ |
| // subframe_offset: 2, |
| |
| #if NR_TDD == 1 |
| tdd_ul_dl_config: { |
| #if NR_TDD_CONFIG == 1 |
| pattern1: { |
| period: 5, /* in ms */ |
| dl_slots: 7, |
| dl_symbols: /* 6 */ 2, |
| ul_slots: 2, |
| ul_symbols: 2, |
| }, |
| #elif NR_TDD_CONFIG == 2 |
| pattern1: { |
| period: 5, /* in ms */ |
| dl_slots: 7, |
| dl_symbols: 6, |
| ul_slots: 2, |
| ul_symbols: 4, |
| }, |
| #elif NR_TDD_CONFIG == 3 |
| pattern1: { |
| period: 5, /* in ms */ |
| dl_slots: 6, |
| dl_symbols: 2, |
| ul_slots: 3, |
| ul_symbols: 2, |
| }, |
| #elif NR_TDD_CONFIG == 4 |
| pattern1: { |
| period: 3, /* in ms */ |
| dl_slots: 3, |
| dl_symbols: 6, |
| ul_symbols: 4, |
| ul_slots: 2, |
| }, |
| pattern2: { |
| period: 2, /* in ms */ |
| dl_slots: 4, |
| dl_symbols: 0, |
| ul_symbols: 0, |
| ul_slots: 0, |
| }, |
| #elif NR_TDD_CONFIG == 10 |
| /* only for FR2 */ |
| pattern1: { |
| period: 0.625, /* in ms */ |
| dl_slots: 3, |
| dl_symbols: 10, |
| ul_slots: 1, |
| ul_symbols: 2, |
| }, |
| #endif |
| }, |
| #endif |
| ssb_period: 20, /* in ms */ |
| n_id_cell: 500, |
| |
| #if ALLOW_SA |
| cell_barred: false, |
| intra_freq_reselection: true, |
| q_rx_lev_min: -70, |
| q_qual_min: -20, |
| inactivity_timer: 10000, |
| si_window_length: 40, |
| #endif |
| // p_max: 10, /* maximum UE power in dBm */ |
| |
| root_sequence_index: 1, /* PRACH root sequence index */ |
| |
| /* Scheduling request period (slots). */ |
| sr_period: 40, |
| |
| dmrs_type_a_pos: 2, |
| |
| /* to limit the number of HARQ feedback in UL, use pdsch_harq_ack_max; |
| allows to workaround issues with SM-G977N for example */ |
| //pdsch_harq_ack_max: 2, |
| |
| prach: { |
| #if NR_TDD == 1 |
| #if FR2 |
| prach_config_index: 149, /* format C0, every 4 frames */ |
| msg1_subcarrier_spacing: 120, /* kHz */ |
| #else |
| #if NR_TDD_CONFIG == 4 |
| prach_config_index: 156, /* format B4, subframe 2 */ |
| #else |
| prach_config_index: 160, /* format B4, subframe 9 */ |
| #endif |
| msg1_subcarrier_spacing: 30, /* kHz */ |
| #endif |
| #else |
| prach_config_index: 16, /* subframe 1 every frame */ |
| #endif |
| msg1_fdm: 1, |
| msg1_frequency_start: -1, |
| zero_correlation_zone_config: 15, |
| preamble_received_target_power: -110, /* in dBm */ |
| preamble_trans_max: 7, |
| power_ramping_step: 4, /* in dB */ |
| #if FR2 == 1 |
| ra_response_window: 40, /* in slots */ |
| #elif NR_TDD == 1 |
| ra_response_window: 20, /* in slots */ |
| #else |
| ra_response_window: 10, /* in slots */ |
| #endif |
| restricted_set_config: "unrestricted_set", |
| ra_contention_resolution_timer: 64, /* in ms */ |
| ssb_per_prach_occasion: 1, |
| cb_preambles_per_ssb: 8, |
| }, |
| |
| pdcch: { |
| #if ALLOW_SA |
| search_space0_index: 0, |
| si_al_index: 2, |
| dedicated_coreset: { |
| rb_start: -1, /* -1 to have the maximum bandwidth */ |
| l_crb: -1, /* -1 means all the bandwidth */ |
| duration: 0, /* 0 means to automatically set it from the coreset bandwidth */ |
| precoder_granularity: "sameAsREG_bundle", |
| }, |
| #else |
| common_coreset: { |
| rb_start: -1, /* -1 to have the maximum bandwidth */ |
| l_crb: -1, /* -1 means all the bandwidth */ |
| duration: 0, /* 0 means to automatically set it from the coreset bandwidth */ |
| precoder_granularity: "sameAsREG_bundle", |
| }, |
| #endif |
| css: { |
| n_candidates: [ 0, 0, 4, 0, 0 ], |
| }, |
| rar_al_index: 2, |
| |
| uss: { |
| n_candidates: [ 0, 2, 1, 0, 0 ], |
| dci_0_1_and_1_1: true, |
| }, |
| al_index: 1, |
| }, |
| |
| pdsch: { |
| mapping_type: "typeA", |
| dmrs_add_pos: 1, |
| dmrs_type: 1, |
| dmrs_max_len: 1, |
| /* k0 delay in slots from DCI to PDSCH: automatic setting */ |
| /* k1 delay in slots from PDSCH to PUCCH/PUSCH ACK/NACK: automatic setting */ |
| mcs_table: "qam256", |
| |
| rar_mcs: 2, |
| #if ALLOW_SA |
| si_mcs: 6, |
| #endif |
| /* If defined, force the PDSCH MCS for all UEs. Otherwise it is computed |
| * based on DL channel quality estimation */ |
| /* mcs: 24, */ |
| }, |
| |
| csi_rs: { |
| nzp_csi_rs_resource: [ |
| { |
| csi_rs_id: 0, |
| #if N_ANTENNA_DL == 1 |
| n_ports: 1, |
| frequency_domain_allocation: "row2", |
| bitmap: "100000000000", |
| cdm_type: "no_cdm", |
| #elif N_ANTENNA_DL == 2 |
| n_ports: 2, |
| frequency_domain_allocation: "other", |
| bitmap: "100000", |
| cdm_type: "fd_cdm2", |
| #elif N_ANTENNA_DL == 4 |
| n_ports: 4, |
| frequency_domain_allocation: "row4", |
| bitmap: "100", |
| cdm_type: "fd_cdm2", |
| #elif N_ANTENNA_DL == 8 |
| n_ports: 8, |
| frequency_domain_allocation: "other", |
| bitmap: "110011", |
| cdm_type: "fd_cdm2", |
| #else |
| #error unsupported number of DL antennas |
| #endif |
| density: 1, |
| first_symb: 4, |
| rb_start: 0, |
| l_crb: -1, /* -1 means from rb_start to the end of the bandwidth */ |
| power_control_offset: 0, /* dB */ |
| power_control_offset_ss: 0, /* dB */ |
| period: 80, |
| offset: 1, /* != 0 to avoid collision with SSB */ |
| qcl_info_periodic_csi_rs: 0, |
| }, |
| #if FR2 == 0 |
| #define USE_TRS |
| #endif |
| #ifdef USE_TRS |
| /* TRS : period of 40 ms, slots 1 & 2, symbols 4 and 8 */ |
| { |
| csi_rs_id: 1, |
| n_ports: 1, |
| frequency_domain_allocation: "row1", |
| bitmap: "0001", |
| cdm_type: "no_cdm", |
| density: 3, |
| first_symb: 4, |
| rb_start: 0, |
| l_crb: -1, /* -1 means from rb_start to the end of the bandwidth */ |
| power_control_offset: 0, /* dB */ |
| power_control_offset_ss: 0, /* dB */ |
| period: 40, |
| offset: 11, |
| qcl_info_periodic_csi_rs: 0, |
| }, |
| { |
| csi_rs_id: 2, |
| n_ports: 1, |
| frequency_domain_allocation: "row1", |
| bitmap: "0001", |
| cdm_type: "no_cdm", |
| density: 3, |
| first_symb: 8, |
| rb_start: 0, |
| l_crb: -1, /* -1 means from rb_start to the end of the bandwidth */ |
| power_control_offset: 0, /* dB */ |
| power_control_offset_ss: 0, /* dB */ |
| period: 40, |
| offset: 11, |
| qcl_info_periodic_csi_rs: 0, |
| }, |
| { |
| csi_rs_id: 3, |
| n_ports: 1, |
| frequency_domain_allocation: "row1", |
| bitmap: "0001", |
| cdm_type: "no_cdm", |
| density: 3, |
| first_symb: 4, |
| rb_start: 0, |
| l_crb: -1, /* -1 means from rb_start to the end of the bandwidth */ |
| power_control_offset: 0, /* dB */ |
| power_control_offset_ss: 0, /* dB */ |
| period: 40, |
| offset: 12, |
| qcl_info_periodic_csi_rs: 0, |
| }, |
| { |
| csi_rs_id: 4, |
| n_ports: 1, |
| frequency_domain_allocation: "row1", |
| bitmap: "0001", |
| cdm_type: "no_cdm", |
| density: 3, |
| first_symb: 8, |
| rb_start: 0, |
| l_crb: -1, /* -1 means from rb_start to the end of the bandwidth */ |
| power_control_offset: 0, /* dB */ |
| power_control_offset_ss: 0, /* dB */ |
| period: 40, |
| offset: 12, |
| qcl_info_periodic_csi_rs: 0, |
| }, |
| #endif |
| ], |
| nzp_csi_rs_resource_set: [ |
| { |
| csi_rs_set_id: 0, |
| nzp_csi_rs_resources: [ 0 ], |
| repetition: false, |
| }, |
| #ifdef USE_TRS |
| { |
| csi_rs_set_id: 1, |
| nzp_csi_rs_resources: [ 1, 2, 3, 4 ], |
| repetition: false, |
| trs_info: true, |
| }, |
| #endif |
| ], |
| |
| csi_im_resource: [ |
| { |
| csi_im_id: 0, |
| pattern: 1, |
| subcarrier_location: 8, |
| symbol_location: 8, |
| rb_start: 0, |
| l_crb: -1, /* -1 means from rb_start to the end of the bandwidth */ |
| period: 80, |
| offset: 1, /* != 0 to avoid collision with SSB */ |
| }, |
| ], |
| csi_im_resource_set: [ |
| { |
| csi_im_set_id: 0, |
| csi_im_resources: [ 0 ], |
| } |
| ], |
| /* ZP CSI-RS to set the CSI-IM REs to zero */ |
| zp_csi_rs_resource: [ |
| { |
| csi_rs_id: 0, |
| frequency_domain_allocation: "row4", |
| bitmap: "100", |
| n_ports: 4, |
| cdm_type: "fd_cdm2", |
| first_symb: 8, |
| density: 1, |
| rb_start: 0, |
| l_crb: -1, /* -1 means from rb_start to the end of the bandwidth */ |
| period: 80, |
| offset: 1, |
| }, |
| ], |
| p_zp_csi_rs_resource_set: [ |
| { |
| zp_csi_rs_resources: [ 0 ], |
| }, |
| ], |
| |
| csi_resource_config: [ |
| { |
| csi_rsc_config_id: 0, |
| nzp_csi_rs_resource_set_list: [ 0 ], |
| resource_type: "periodic", |
| }, |
| { |
| csi_rsc_config_id: 1, |
| csi_im_resource_set_list: [ 0 ], |
| resource_type: "periodic", |
| }, |
| #ifdef USE_TRS |
| { |
| csi_rsc_config_id: 2, |
| nzp_csi_rs_resource_set_list: [ 1 ], |
| resource_type: "periodic", |
| }, |
| #endif |
| ], |
| csi_report_config: [ |
| { |
| resources_for_channel_measurement: 0, |
| csi_im_resources_for_interference: 1, |
| report_config_type: "periodic", |
| period: 80, |
| report_quantity: "CRI_RI_PMI_CQI", |
| #if N_ANTENNA_DL > 1 |
| codebook_config: { |
| codebook_type: "type1", |
| sub_type: "typeI_SinglePanel", |
| #if N_ANTENNA_DL == 2 |
| #elif N_ANTENNA_DL == 4 |
| n1: 2, |
| n2: 1, |
| codebook_mode: 1, |
| #elif N_ANTENNA_DL == 8 |
| n1: 4, |
| n2: 1, |
| codebook_mode: 1, |
| #endif |
| }, |
| #endif |
| cqi_table: 2, |
| subband_size: "value1", |
| }, |
| ], |
| }, |
| |
| pucch: { |
| pucch_group_hopping: "neither", |
| hopping_id: -1, /* -1 = n_cell_id */ |
| p0_nominal: -90, |
| #if 0 |
| pucch0: { |
| initial_cyclic_shift: 1, |
| n_symb: 1, |
| }, |
| #else |
| pucch1: { |
| n_cs: 3, |
| n_occ: 3, |
| freq_hopping: true, |
| #if USE_SRS && NR_TDD == 0 |
| n_symb: 13, |
| #endif |
| }, |
| #endif |
| #if NR_LONG_PUCCH_FORMAT == 2 |
| pucch2: { |
| n_symb: 2, |
| n_prb: 1, |
| freq_hopping: true, |
| simultaneous_harq_ack_csi: false, |
| max_code_rate: 0.25, |
| }, |
| #elif NR_LONG_PUCCH_FORMAT == 3 |
| pucch3: { |
| bpsk: false, |
| additional_dmrs: false, |
| freq_hopping: true, |
| n_prb: 1, |
| simultaneous_harq_ack_csi: true, |
| max_code_rate: 0.25, |
| }, |
| #elif NR_LONG_PUCCH_FORMAT == 4 |
| pucch4: { |
| occ_len: 4, |
| bpsk: false, |
| additional_dmrs: false, |
| freq_hopping: true, |
| simultaneous_harq_ack_csi: true, |
| max_code_rate: 0.25, |
| }, |
| #endif |
| }, |
| |
| #if USE_SRS |
| srs: { |
| #if NR_TDD |
| #if NR_TDD_CONFIG == 1 || NR_TDD_CONFIG == 2 |
| srs_symbols: [ 0, 0, 0, 0, 0, 0, 0, 2, 0, 0 ], |
| #elif NR_TDD_CONFIG == 3 |
| srs_symbols: [ 0, 0, 0, 0, 0, 0, 2, 0, 0, 0 ], |
| #elif NR_TDD_CONFIG == 4 |
| srs_symbols: [ 0, 0, 0, 4, 0, 0, 0, 0, 0, 0 ], |
| #elif NR_TDD_CONFIG == 10 |
| srs_symbols: [ 0, 0, 0, 2, 0 ], |
| #endif |
| #else |
| srs_symbols: [ 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 ], |
| #endif |
| srs_resource: [ |
| { |
| srs_resource_id: 0, |
| n_ports: 1, |
| resource_type: "periodic", |
| period: 80, /* in slots */ |
| } |
| ], |
| srs_resource_set: [ |
| { |
| srs_resource_id_list: [ 0 ], |
| }, |
| ], |
| }, |
| #endif |
| |
| pusch: { |
| mapping_type: "typeA", |
| n_symb: 14, |
| dmrs_add_pos: 1, |
| dmrs_type: 1, |
| dmrs_max_len: 1, |
| tf_precoding: false, |
| mcs_table: "qam256", /* without transform precoding */ |
| mcs_table_tp: "qam256", /* with transform precoding */ |
| ldpc_max_its: 5, |
| /* k2, msg3_k2 delay in slots from DCI to PUSCH: automatic setting */ |
| p0_nominal_with_grant: -84, |
| msg3_mcs: 4, |
| msg3_delta_power: 0, /* in dB */ |
| beta_offset_ack_index: 9, |
| |
| /* if defined, force the PUSCH MCS for all UEs. Otherwise it is |
| computed from the last received PUSCH. */ |
| /* mcs: 16, */ |
| }, |
| |
| /* MAC configuration */ |
| mac_config: { |
| msg3_max_harq_tx: 5, |
| ul_max_harq_tx: 5, /* max number of HARQ transmissions for uplink */ |
| dl_max_harq_tx: 5, /* max number of HARQ transmissions for downlink */ |
| ul_max_consecutive_retx: 30, /* disconnect UE if reached */ |
| dl_max_consecutive_retx: 30, /* disconnect UE if reached */ |
| periodic_bsr_timer: 20, |
| retx_bsr_timer: 320, |
| periodic_phr_timer: 500, |
| prohibit_phr_timer: 200, |
| phr_tx_power_factor_change: "dB3", |
| sr_prohibit_timer: 0, /* in ms, 0 to disable the timer */ |
| sr_trans_max: 64, |
| }, |
| |
| cipher_algo_pref: [], |
| integ_algo_pref: [2, 1], |
| |
| srb3_support: false, |
| |
| drb_config: "drb_nr.cfg", |
| }, |
| } |
