zephyr/boards/google/realtek/realtek_rts5912.dts

/* Copyright 2025 The ChromiumOS Authors
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 */

/dts-v1/;

#include <realtek/ec/rts5912.dtsi>
#include "realtek.dtsi"

#include <cros/cbi_flash.dtsi>

&binman {
	pad-byte = <0xff>;
	pad-after = <0x30000>;

	wp-ro {
		/*
		 * wp-ro must match a block protect region supported by
		 * by the internal flash device. In practice, that's
		 * 512 KiB starting at address 0.
		 */
		offset = <0x0>;
		/*
		 * TODO: b/416020794, make the EC image size as big as the available code RAM.
		 * The total flash size is 1 MiB.
		 * Set the write protected region to the lower half of flash.
		 */
		size = <0x80000>;
		ec-ro {
			fmap {
				offset = <(0x50000 - 0x400)>;
				/*
				 * don't specify 'size = <0x400>' here so
				 * it is auto-assigned to the fmap size.
				 */
			};
		};
		cbi_flash: cbi {
			offset = <0x50000>;
			size = <0x1000>;
		};
	};
	ec-rw {
		offset = <0x80000>;
		/*
		 * TODO: b/416020794, make the EC image size as big as the available code RAM.
		 */
		size = <0x50000>;
		rw-fw {
			rw-fwid {
				/* Fix the lcoation of the FWID to the
				 * last 32 bytes of the flash. This
				 * ensures the RW entries in the FMAP
				 * stored in the RO section of flash
				 * are always correct.
				 */
				offset = <(0x50000 - 32)>;
			};
		};
	};
};

&i2c_0 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};

&i2c_1 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};

&i2c_2 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};

&i2c_3 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};

&i2c_4 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};

&i2c_5 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};

&i2c_6 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};

&i2c_7 {
	sda-timeout-value = <100>;
	scl-timeout-value = <100>;
};