Interface for sending keyboard events to the AP and for receiving commands from the AP. Only supported by x86 based APs.
A sensor that measures acceleration, typically over 3-axis. Nominally provides information about the orientation of a device. On Chromebook 2-in-1 devices, there is an accelerometer in the base and one in the lid. Combining the measurements from both accelerometers allows for a precise calculation of the lid angle, used to switch between tablet and laptop mode.
ACCELGYRO - Accelerometer/Gyroscope
A combination accelerometer and gyroscope sensor that provides more precise orientation information by measuring both linear and rotational motion.
ADC - Analog to Digital Converter
A sensor that converts an analog voltage to a digital reading.
A sensor that measures the ambient light present. Used to automatically control the screen and keyboard backlight level.
The processor on the board that boots and runs ChromeOS.
A sensor that measures atmospheric pressure.
A device that implements the USB Battery Charging specification, version 1.2. The complete BC 1.2 Specification is available from the USB Implementers Forum.
A collection of properties describing the board. This includes board version, SKU, model name, and other fields. More details are found in the CrOS Board Info documentation.
CEC - Consumer Electronics Control
A one-wire bidirectional bus. More details are on the CEC Wikipedia page.
DPTF - Dynamic Power and Thermal Framework (Intel)
Intel's platform based power and thermal management. See the DPTF Readme for details on the implementation used in ChromeOS.
The MCU used to control the keyboard, battery charging, USB port switching, sensor management, and other functions, offloading these tasks from the AP.
The ectool is the AP console's CLI for sending commands to the EC.
A replacement of the current UART-based console which moves much of the code off the EC into a host tool, reducing the amount of flash space required.
E-Mark - Electronically Marked Cable
See the USB-C documentation for more details.
eSPI - Enhanced Serial Peripheral Interface (Intel)
Intel's synchronous communication interface between the AP and the EC. Supports quad I/O mode and clock speeds up to 66 Mhz, providing bandwidth up to 264 Mbps. The full eSPI Specification is available from Intel.
FAFT - Fully Automated Firmware Tests
A collection of tests and related infrastructure that exercise and verify capabilities of Chrome OS. See the FAFT design doc and chromium.org documentation for more details. Replaced SAFT.
GMR - Giant Magnetoresistance Sensor
A sensor device that detects a magnetic field. These sensors differ from MAG sensors, in that they only detect magnetic fields in close proximity to the sensor. On Chromebooks, GMR sensors are used to detect when the lid is opened. On convertible Chromebooks, the GMR sensor also detects tablet mode when lid the is opened a full 360 degrees.
GPIO - General Purpose Input/Output
An individual signal that can independently controlled and read. GPIOs are used to enable/disable power rails, drive reset signals, and receive interrupts from devices connected to the EC. GPIOs may also be connected to I/O expanders.
A sensor that measures angular momentum, providing information about rotational motion of the device.
An I2C peripheral device that provides additional GPIO signals (anywhere from 8 - 32 signals). GPIOs behind an I/O expander are written and read using I2C register accesses from the I2C controller in the EC.
I2C - Inter-Integrated Circuit
A 2-wire synchronous communication bus, consisting of a clock signal and a bidirectional data signal. An I2C bus typically contains one controller device and one or more peripheral devices. The I2C standard defines supported clock speeds of 100 KHz and 400 KHz. The full I2C Specification is available from NXP (formerly Phillips).
A Light Emitting Diode is a semiconductor that emits light when current flows through it.
LPC - Low Pin Count bus
Legacy communication bus between the AP and EC. Runs at 33 MHz, providing a 133 Mbps bandwidth connection. Replaced by the eSPI interface.
A digital compass sensor, providing orientation for navigation.
A small integrated chip containing a CPU core, on-chip ROM, on-chip RAM. Also contains multiple peripheral interfaces, including GPIO, I2C buses, SPI buses, ADC, PWM, etc.
MKBP - Matrix Keyboard Protocol
Message based protocol for communicating asynchronous events from the EC to the AP. Events are not limited to keyboard events with the sensor subsystem as one of the main users. An EC board implementation can be configured to send keyboard events through MKBP or using the 8042 interface. This is the EC MKBP driver implementation.
Part of the Display Port 1.2 standard, used to drive multiple independent video streams from a single display port. The EC code is typically responsible for enabling and disabling the MST hub chipset.
A command in the EC-3PO protocol that allows commands to be entered to alter the behaviour of the console and interpreter during runtime.
See the USB-C documentation for more details.
An integrated circuit used to turn power rails on and off.
PPC - USB Power Path Controller
See the USB-C documentation for more details.
Method of varying the duty cycle of a signal to control another device. A typical application is to control fan speeds or the brightness of a backlight.
A device that can extract the embedded clock signal from a high-speed protocol, fully recover the data, and retransmit a fresh copy of the data using a clean clock.
SAFT - Semi-Automated Firmware Tests
A suite of tests for firmware, succeeded by FAFT. See the chromium.org documentation for more details.
SPI host interface used for communication between the AP and the EC. In this configuration, the AP provides the SPI controller and the EC provides the SPI peripheral. This interface is only used for non-x86 base APs.
SPI - Serial Peripheral Interconnect
A 4-wire synchronous communication bus consisting of the signals CLK (clock), SDO (Serial Data Out), SDI (Serial Data In), and CS (chip-select, one per SPI peripheral). The SDO and SDI pins are defined from the perspective of the device: the SPI controller‘s SDO pin connects to the SPI peripheral’s SDI pin and vice-versa. Clock speeds over 100 MHz are supported. SPI communication involves the following sequence:
The specific contents of a SPI frame varies based on the SPI peripheral type.
SSMUX - Super Speed Multiplexer
See the USB-C documentation for more details.
SVDM - Structured Vendor Defined Messages
See the USB-C documentation for more details.
TCPC - USB Type-C Port Controller
See the USB-C documentation for more details.
UART - Universal Asynchronous Receiver Transceiver
Also known as a serial port. An asynchronous communication channel between two devices with a dedicated receive pin, transmit pin, and ground. Optional hardware flow control signals require additional connections between the devices. Standard transmission rates are slow (up to 115200 bits per second). Typical use is to provide a debug console to the EC. RS-232 is the protocol standard used by UARTs.
Traditional USB Host port.
See the USB-C documentation for more details.
