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  1. /* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
  2. * Use of this source code is governed by a BSD-style license that can be
  3. * found in the LICENSE file.
  4. */
  5. /*
  6. * config.h - Top-level configuration Chrome EC
  7. *
  8. * All configuration settings (CONFIG_*) are defined in this file or in a
  9. * sub-configuration file (config_chip.h, board.h, etc.) included by this file.
  10. *
  11. * Note that this file is included by assembly (.S) files. Any C-isms such as
  12. * struct definitions or enums in a sub-configuration file MUST be guarded with
  13. * #ifndef __ASSEMBLER__ to prevent those C-isms from being evaluated by the
  14. * assembler.
  15. */
  16. #ifndef __CROS_EC_CONFIG_H
  17. #define __CROS_EC_CONFIG_H
  18. /*
  19. * All config options are listed alphabetically and described here.
  20. *
  21. * If you add a new config option somewhere in the code, you must add a
  22. * default value here and describe what it does.
  23. *
  24. * To get a list current list, run this command:
  25. * git grep " CONFIG_" | grep -o "CONFIG_[A-Za-z0-9_]\+" | sort | uniq
  26. *
  27. * Some options are #defined here to enable them by default. Chips or boards
  28. * may override this by #undef'ing them in config_chip.h or board.h,
  29. * respectively.
  30. *
  31. * TODO(crosbug.com/p/23758): Describe all of these. Also describe the
  32. * HAS_TASK_* macro and how/when it should be used vs. a config define. And
  33. * BOARD_*, CHIP_*, and CHIP_FAMILY_*.
  34. */
  35. /* Enable accelerometer interrupts. */
  36. #undef CONFIG_ACCEL_INTERRUPTS
  37. /* Specify type of accelerometers attached. */
  38. #undef CONFIG_ACCEL_KXCJ9
  39. #undef CONFIG_ACCELGYRO_LSM6DS0
  40. #undef CONFIG_ACCELGYRO_BMI160
  41. /* Compile chip support for analog-to-digital convertor */
  42. #undef CONFIG_ADC
  43. /* ADC sample time selection. The value is chip-dependent. */
  44. #undef CONFIG_ADC_SAMPLE_TIME
  45. /* Include the ADC analog watchdog feature in the ADC code */
  46. #define CONFIG_ADC_WATCHDOG
  47. /*
  48. * Some ALS modules may be connected to the EC. We need the command, and
  49. * specific drivers for each module.
  50. */
  51. #undef CONFIG_ALS
  52. #undef CONFIG_ALS_ISL29035
  53. /* Support AP hang detection host command and state machine */
  54. #undef CONFIG_AP_HANG_DETECT
  55. /*
  56. * Support controlling the display backlight based on the state of the lid
  57. * switch. The EC will disable the backlight when the lid is closed.
  58. */
  59. #undef CONFIG_BACKLIGHT_LID
  60. /*
  61. * If defined, EC will enable the backlight signal only if this GPIO is
  62. * asserted AND the lid is open. This supports passing the backlight-enable
  63. * signal from the AP through EC.
  64. */
  65. #undef CONFIG_BACKLIGHT_REQ_GPIO
  66. /*****************************************************************************/
  67. /* Battery config */
  68. /*
  69. * Compile battery-specific code.
  70. *
  71. * Note that some boards have their own unique battery constants / functions.
  72. * In this case, those are provided in board/(boardname)/battery.c, and none of
  73. * these are defined.
  74. */
  75. #undef CONFIG_BATTERY_BQ20Z453
  76. #undef CONFIG_BATTERY_BQ27541
  77. #undef CONFIG_BATTERY_BQ27621
  78. #undef CONFIG_BATTERY_LINK
  79. #undef CONFIG_BATTERY_RYU
  80. #undef CONFIG_BATTERY_SAMUS
  81. /* Compile mock battery support; used by tests. */
  82. #undef CONFIG_BATTERY_MOCK
  83. /*
  84. * Charger should call battery_override_params() to limit/correct the voltage
  85. * and current requested by the battery pack before acting on the request.
  86. *
  87. * This is valid with CONFIG_CHARGER_V1 only.
  88. */
  89. #undef CONFIG_BATTERY_OVERRIDE_PARAMS
  90. /*
  91. * If defined, the charger will check for battery presence before attempting
  92. * to communicate with it. This avoids the 30 second delay when booting
  93. * without a battery present. Do not use with CONFIG_BATTERY_PRESENT_GPIO.
  94. *
  95. * Replace the default battery_is_present() function with a board-specific
  96. * implementation in board.c
  97. */
  98. #undef CONFIG_BATTERY_PRESENT_CUSTOM
  99. /*
  100. * If defined, GPIO which is driven low when battery is present.
  101. * Charger will check for battery presence before attempting to communicate
  102. * with it. This avoids the 30 second delay when booting without a battery
  103. * present. Do not use with CONFIG_BATTERY_PRESENT_CUSTOM.
  104. */
  105. #undef CONFIG_BATTERY_PRESENT_GPIO
  106. /*
  107. * Compile smart battery support
  108. *
  109. * For batteries which support this specification:
  110. * http://sbs-forum.org/specs/sbdat110.pdf)
  111. */
  112. #undef CONFIG_BATTERY_SMART
  113. /*
  114. * Critical battery shutdown timeout (seconds)
  115. *
  116. * If the battery is at extremely low charge (and discharging) or extremely
  117. * high temperature, the EC will shut itself down. This defines the timeout
  118. * period in seconds between the critical condition being detected and the
  119. * EC shutting itself down. Note that if the critical condition is corrected
  120. * before the timeout expiration, the EC will not shut itself down.
  121. *
  122. */
  123. #define CONFIG_BATTERY_CRITICAL_SHUTDOWN_TIMEOUT 30
  124. /*
  125. * Support battery cut-off as host command and console command.
  126. *
  127. * Once defined, you have to implement a board_cut_off_battery() function
  128. * in board/???/battery.c file.
  129. */
  130. #undef CONFIG_BATTERY_CUT_OFF
  131. /*
  132. * The default delay is 1 second. Define this if a board prefers
  133. * different delay.
  134. */
  135. #undef CONFIG_BATTERY_CUTOFF_DELAY_US
  136. /*
  137. * The board-specific battery.c implements get and set functions to read and
  138. * write arbirary vendor-specific parameters stored in the battery.
  139. * See include/battery.h for prototypes.
  140. */
  141. #undef CONFIG_BATTERY_VENDOR_PARAM
  142. /*
  143. * TODO(crosbug.com/p/29467): allows charging of a dead battery that
  144. * requests nil for current and voltage. Remove this workaround when
  145. * possible.
  146. */
  147. #undef CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD
  148. /*
  149. * Check for battery in disconnect state (similar to cut-off state). If this
  150. * battery is found to be in disconnect state, take it out of this state by
  151. * force-applying a charge current.
  152. */
  153. #undef CONFIG_BATTERY_REVIVE_DISCONNECT
  154. /*****************************************************************************/
  155. /*
  156. * Call board_config_post_gpio_init() after GPIOs are initialized. See
  157. * include/board_config.h for more information.
  158. */
  159. #undef CONFIG_BOARD_POST_GPIO_INIT
  160. /*
  161. * Call board_config_pre_init() before any inits are called. See
  162. * include/board_config.h for more information.
  163. */
  164. #undef CONFIG_BOARD_PRE_INIT
  165. /* EC has GPIOs attached to board version stuffing resistors */
  166. #undef CONFIG_BOARD_VERSION
  167. /* Permanent LM4 boot configuration */
  168. #undef CONFIG_BOOTCFG_VALUE
  169. /*****************************************************************************/
  170. /* Modify the default behavior to make system bringup easier. */
  171. #undef CONFIG_BRINGUP
  172. /*****************************************************************************/
  173. /*
  174. * Number of extra buttons not on the keyboard scan matrix. Doesn't include
  175. * the power button, which has its own handler.
  176. */
  177. #undef CONFIG_BUTTON_COUNT
  178. /*
  179. * Enable case close debug (CCD) mode.
  180. */
  181. #undef CONFIG_CASE_CLOSED_DEBUG
  182. /*
  183. * Capsense chip has buttons, too.
  184. */
  185. #undef CONFIG_CAPSENSE
  186. /*****************************************************************************/
  187. /* Compile charge manager */
  188. #undef CONFIG_CHARGE_MANAGER
  189. /* Compile input current ramping support */
  190. #undef CONFIG_CHARGE_RAMP
  191. /*****************************************************************************/
  192. /* Charger config */
  193. /* Compile common charge state code. You must pick an implementation. */
  194. #undef CONFIG_CHARGER
  195. #undef CONFIG_CHARGER_V1
  196. #undef CONFIG_CHARGER_V2
  197. /* Compile charger-specific code for these chargers (pick at most one) */
  198. #undef CONFIG_CHARGER_BQ24707A
  199. #undef CONFIG_CHARGER_BQ24715
  200. #undef CONFIG_CHARGER_BQ24725
  201. #undef CONFIG_CHARGER_BQ24738
  202. #undef CONFIG_CHARGER_BQ24770
  203. #undef CONFIG_CHARGER_BQ24773
  204. #undef CONFIG_CHARGER_BQ25890
  205. #undef CONFIG_CHARGER_BQ25892
  206. #undef CONFIG_CHARGER_BQ25895
  207. #undef CONFIG_CHARGER_TPS65090 /* Note: does not use CONFIG_CHARGER */
  208. /*
  209. * BQ2589x 5V boost current limit and voltage.
  210. * Should be the combination of BQ2589X_BOOSTV_MV(voltage) and
  211. * BQ2589X_BOOST_LIM_xxxMA.
  212. */
  213. #undef CONFIG_CHARGER_BQ2589X_BOOST
  214. /*
  215. * Board specific charging current limit, in mA. If defined, the charge state
  216. * machine will not allow the battery to request more current than this.
  217. */
  218. #undef CONFIG_CHARGER_CURRENT_LIMIT
  219. /*
  220. * Board supports discharge mode. In this mode, the battery will discharge
  221. * even if AC is present. Used for testing.
  222. */
  223. #undef CONFIG_CHARGER_DISCHARGE_ON_AC
  224. /*
  225. * Board specific flag used to disable external ILIM pin used to determine input
  226. * current limit. When defined, the input current limit is decided only by
  227. * the software register value.
  228. */
  229. #undef CONFIG_CHARGER_ILIM_PIN_DISABLED
  230. /*
  231. * Maximum amount of input current the charger can receive, in mA.
  232. *
  233. * This value should depend on external power adapter, designed charging
  234. * voltage, and the maximum power of the running system.
  235. */
  236. #undef CONFIG_CHARGER_INPUT_CURRENT
  237. /*
  238. * Equivalent of CONFIG_BATTERY_OVERRIDE_PARAMS for use with
  239. * CONFIG_CHARGER_V2
  240. */
  241. #undef CONFIG_CHARGER_PROFILE_OVERRIDE
  242. /* Value of the charge sense resistor, in mOhms */
  243. #undef CONFIG_CHARGER_SENSE_RESISTOR
  244. /* Value of the input current sense resistor, in mOhms */
  245. #undef CONFIG_CHARGER_SENSE_RESISTOR_AC
  246. /*
  247. * Maximum time to charge the battery, in hours.
  248. *
  249. * If this timeout is reached, the charger will enter force-idle state.
  250. * If not defined, charger will provide current until the battery asks it to
  251. * stop.
  252. */
  253. #undef CONFIG_CHARGER_TIMEOUT_HOURS
  254. /*
  255. * Board has an GPIO pin to enable or disable charging.
  256. *
  257. * This GPIO should be named GPIO_CHARGER_EN, if active high. Or
  258. * GPIO_CHARGER_EN_L if active low.
  259. */
  260. #undef CONFIG_CHARGER_EN_GPIO
  261. /* Charger enable GPIO is active low */
  262. #undef CONFIG_CHARGER_EN_ACTIVE_LOW
  263. /*****************************************************************************/
  264. /* Chipset config */
  265. /* AP chipset support; pick at most one */
  266. #undef CONFIG_CHIPSET_BAYTRAIL /* Intel Bay Trail (x86) */
  267. #undef CONFIG_CHIPSET_BRASWELL /* Intel Braswell (x86) */
  268. #undef CONFIG_CHIPSET_GAIA /* Gaia and Ares (ARM) */
  269. #undef CONFIG_CHIPSET_HASWELL /* Intel Haswell (x86) */
  270. #undef CONFIG_CHIPSET_IVYBRIDGE /* Intel Ivy Bridge (x86) */
  271. #undef CONFIG_CHIPSET_ROCKCHIP /* Rockchip rk32xx */
  272. #undef CONFIG_CHIPSET_SKYLAKE /* Intel Skylake (x86) */
  273. #undef CONFIG_CHIPSET_TEGRA /* nVidia Tegra 5 */
  274. /* Support chipset throttling */
  275. #undef CONFIG_CHIPSET_CAN_THROTTLE
  276. /* Enable additional chipset debugging */
  277. #undef CONFIG_CHIPSET_DEBUG
  278. /* Support power rail control */
  279. #define CONFIG_CHIPSET_HAS_PP1350
  280. #define CONFIG_CHIPSET_HAS_PP5000
  281. /*****************************************************************************/
  282. /*
  283. * Chip config for clock circuitry
  284. * define = crystal / undef = oscillator
  285. */
  286. #undef CONFIG_CLOCK_CRYSTAL
  287. /*****************************************************************************/
  288. /* PMIC config */
  289. /* Support firmware long press power-off timer */
  290. #undef CONFIG_PMIC_FW_LONG_PRESS_TIMER
  291. /*****************************************************************************/
  292. /*
  293. * Optional console commands
  294. *
  295. * Defining these options will enable the corresponding command on the EC
  296. * console.
  297. */
  298. #undef CONFIG_CMD_ACCELS
  299. #undef CONFIG_CMD_ACCEL_INFO
  300. #undef CONFIG_CMD_BATDEBUG
  301. #undef CONFIG_CMD_CHGRAMP
  302. #undef CONFIG_CMD_CLOCKGATES
  303. #undef CONFIG_CMD_COMXTEST
  304. #undef CONFIG_CMD_ECTEMP
  305. #undef CONFIG_CMD_FLASH
  306. #undef CONFIG_CMD_FORCETIME
  307. #undef CONFIG_CMD_GSV
  308. #define CONFIG_CMD_HASH
  309. #undef CONFIG_CMD_HOSTCMD
  310. #define CONFIG_CMD_I2C_SCAN
  311. #define CONFIG_CMD_I2C_XFER
  312. #define CONFIG_CMD_IDLE_STATS
  313. #undef CONFIG_CMD_ILIM
  314. #undef CONFIG_CMD_JUMPTAGS
  315. #undef CONFIG_CMD_MCDP
  316. #define CONFIG_CMD_PD
  317. #undef CONFIG_CMD_PD_DEV_DUMP_INFO
  318. #undef CONFIG_CMD_PD_FLASH
  319. #undef CONFIG_CMD_PLL
  320. #undef CONFIG_CMD_PMU
  321. #define CONFIG_CMD_POWER_AP
  322. #define CONFIG_CMD_POWERINDEBUG
  323. #undef CONFIG_CMD_POWERLED
  324. #undef CONFIG_CMD_RTC_ALARM
  325. #undef CONFIG_CMD_SCRATCHPAD
  326. #define CONFIG_CMD_SHMEM
  327. #undef CONFIG_CMD_SLEEP
  328. #undef CONFIG_CMD_SPI_FLASH
  329. #undef CONFIG_CMD_STACKOVERFLOW
  330. #undef CONFIG_CMD_TASKREADY
  331. #define CONFIG_CMD_TIMERINFO
  332. #define CONFIG_CMD_TYPEC
  333. #undef CONFIG_CMD_USB_PD_PE
  334. /*****************************************************************************/
  335. /* Provide common core code to output panic information without interrupts. */
  336. #define CONFIG_COMMON_PANIC_OUTPUT
  337. /*
  338. * Store a panic log and halt the system for a software-related reasons, such as
  339. * stack overflow or assertion failure.
  340. */
  341. #undef CONFIG_SOFTWARE_PANIC
  342. /*
  343. * Provide the default GPIO abstraction layer.
  344. * You want this unless you are doing a really tiny firmware.
  345. */
  346. #define CONFIG_COMMON_GPIO
  347. /*
  348. * Provides smaller GPIO names to reduce flash size. Instead of the 'name'
  349. * field in GPIO macro it will concat 'port' and 'pin' to reduce flash size.
  350. */
  351. #undef CONFIG_COMMON_GPIO_SHORTNAMES
  352. /*
  353. * Provide common runtime layer code (tasks, hooks ...)
  354. * You want this unless you are doing a really tiny firmware.
  355. */
  356. #define CONFIG_COMMON_RUNTIME
  357. /* Provide common core code to handle the operating system timers. */
  358. #define CONFIG_COMMON_TIMER
  359. /*****************************************************************************/
  360. /*
  361. * Provide additional help on console commands, such as the supported
  362. * options/usage.
  363. *
  364. * Boards may #undef this to reduce image size.
  365. */
  366. #define CONFIG_CONSOLE_CMDHELP
  367. /*
  368. * Number of entries in console history buffer.
  369. *
  370. * Boards may #undef this to reduce memory usage.
  371. */
  372. #define CONFIG_CONSOLE_HISTORY 8
  373. /* Max length of a single line of input */
  374. #define CONFIG_CONSOLE_INPUT_LINE_SIZE 80
  375. /*
  376. * Disable EC console input if the system is locked. This is needed for
  377. * security on platforms where the EC console is accessible from outside the
  378. * case - for example, via a special USB dongle.
  379. */
  380. #undef CONFIG_CONSOLE_RESTRICTED_INPUT
  381. /* Include CRC-8 utility function */
  382. #undef CONFIG_CRC8
  383. /*****************************************************************************/
  384. /*
  385. * Debugging config
  386. *
  387. * Note that these options are enabled by default, because they're really
  388. * handy for debugging systems during bringup and even at factory time.
  389. *
  390. * A board may undefine any or all of these to reduce image size and RAM usage,
  391. * at the cost of debuggability.
  392. */
  393. /*
  394. * ASSERT() macros are checked at runtime. See CONFIG_DEBUG_ASSERT_REBOOTS
  395. * to see what happens if one fails.
  396. *
  397. * Boards may #undef this to reduce image size.
  398. */
  399. #define CONFIG_DEBUG_ASSERT
  400. /*
  401. * Prints a message and reboots if an ASSERT() macro fails at runtime. When
  402. * enabled, an ASSERT() which fails will produce a message of the form:
  403. *
  404. * ASSERTION FAILURE '<expr>' in function() at file:line
  405. *
  406. * If this is not defined, failing ASSERT() will trigger a BKPT instruction
  407. * instead.
  408. *
  409. * Ignored if CONFIG_DEBUG_ASSERT is not defined.
  410. *
  411. * Boards may #undef this to reduce image size.
  412. */
  413. #define CONFIG_DEBUG_ASSERT_REBOOTS
  414. /*
  415. * On assertion failure, prints only the file name and the line number.
  416. *
  417. * Ignored if CONFIG_DEBUG_ASSERT_REBOOTS is not defined.
  418. *
  419. * Boards may define this to reduce image size.
  420. */
  421. #undef CONFIG_DEBUG_ASSERT_BRIEF
  422. /*
  423. * Disable the write buffer used for default memory map accesses.
  424. * This turns "Imprecise data bus errors" into "Precise" errors
  425. * in exception traces at the cost of some performance.
  426. * This may help identify the offending instruction causing an
  427. * exception. Supported on cortex-m.
  428. */
  429. #undef CONFIG_DEBUG_DISABLE_WRITE_BUFFER
  430. /*
  431. * Print additional information when exceptions are triggered, such as the
  432. * fault address, here shown as bfar. This shows the reason for the fault
  433. * and may help to determine the cause.
  434. *
  435. * === EXCEPTION: 03 ====== xPSR: 01000000 ===========
  436. * r0 :0000000b r1 :00000047 r2 :60000000 r3 :200013dd
  437. * r4 :00000000 r5 :080053f4 r6 :200013d0 r7 :00000002
  438. * r8 :00000000 r9 :200013de r10:00000000 r11:00000000
  439. * r12:00000000 sp :200009a0 lr :08002b85 pc :08003a8a
  440. * Precise data bus error, Forced hard fault, Vector catch, bfar = 60000000
  441. * mmfs = 00008200, shcsr = 00000000, hfsr = 40000000, dfsr = 00000008
  442. *
  443. * If this is not defined, only a register dump will be printed.
  444. *
  445. * Boards may #undef this to reduce image size.
  446. */
  447. #define CONFIG_DEBUG_EXCEPTIONS
  448. /* Check for stack overflows on every context switch */
  449. #define CONFIG_DEBUG_STACK_OVERFLOW
  450. /*****************************************************************************/
  451. /* Support DMA transfers inside the EC */
  452. #undef CONFIG_DMA
  453. /* Use the common interrupt handlers for DMA IRQs */
  454. #define CONFIG_DMA_DEFAULT_HANDLERS
  455. /* Compile extra debugging and tests for the DMA module */
  456. #undef CONFIG_DMA_HELP
  457. /* Support EC chip internal data EEPROM */
  458. #undef CONFIG_EEPROM
  459. /*
  460. * Compile the eoption module, which provides a higher-level interface to
  461. * options stored in internal data EEPROM.
  462. */
  463. #undef CONFIG_EOPTION
  464. /* Include code for handling external power */
  465. #define CONFIG_EXTPOWER
  466. /* Support turbo-mode chargers */
  467. #undef CONFIG_EXTPOWER_FALCO
  468. /* Support detecting external power presence via a GPIO */
  469. #undef CONFIG_EXTPOWER_GPIO
  470. /*
  471. * Support detecting external power presence via a pair of GPIOs, as used
  472. * on Snow.
  473. */
  474. #undef CONFIG_EXTPOWER_SNOW
  475. /* Support providing power to the device via USB on Spring. */
  476. #undef CONFIG_EXTPOWER_SPRING
  477. /*****************************************************************************/
  478. /* Number of cooling fans. Undef if none. */
  479. #undef CONFIG_FANS
  480. /*
  481. * Replace the default fan_percent_to_rpm() function with a board-specific
  482. * implementation in board.c
  483. */
  484. #undef CONFIG_FAN_RPM_CUSTOM
  485. /*
  486. * We normally check and update the fans once per second (HOOK_SECOND). If this
  487. * is #defined to a postive integer N, we will only update the fans every N
  488. * seconds instead.
  489. */
  490. #undef CONFIG_FAN_UPDATE_PERIOD
  491. /*****************************************************************************/
  492. /* Flash configuration */
  493. /* Support programming on-chip flash */
  494. #define CONFIG_FLASH
  495. #undef CONFIG_FLASH_BANK_SIZE
  496. #undef CONFIG_FLASH_BASE
  497. #undef CONFIG_FLASH_ERASED_VALUE32
  498. #undef CONFIG_FLASH_ERASE_SIZE
  499. /*
  500. * Flash is directly mapped into the EC's address space. If this is not
  501. * defined, the flash driver must implement flash_physical_read().
  502. */
  503. #define CONFIG_FLASH_MAPPED
  504. #undef CONFIG_FLASH_PHYSICAL_SIZE
  505. #undef CONFIG_FLASH_PROTECT_NEXT_BOOT
  506. /*
  507. * Store persistent write protect for the flash inside the flash data itself.
  508. * This allows ECs with internal flash to emulate something closer to a SPI
  509. * flash write protect register. If this is not defined, write protect state
  510. * is maintained solely by the physical flash driver.
  511. */
  512. #define CONFIG_FLASH_PSTATE
  513. /*
  514. * Store the pstate data in its own dedicated bank of flash. This allows
  515. * disabling the protect-RO-at-boot flag without rewriting the RO firmware,
  516. * but costs a bank of flash.
  517. *
  518. * If this is not defined, the pstate data is stored inside the RO firmware
  519. * image itself. This is more space-efficient, but the only way to clear the
  520. * flag once it's set is to rewrite the RO firmware (after removing the WP
  521. * screw, of course).
  522. */
  523. #define CONFIG_FLASH_PSTATE_BANK
  524. #undef CONFIG_FLASH_SIZE
  525. #undef CONFIG_FLASH_WRITE_IDEAL_SIZE
  526. #undef CONFIG_FLASH_WRITE_SIZE
  527. /*****************************************************************************/
  528. /* Include a flashmap in the compiled firmware image */
  529. #define CONFIG_FMAP
  530. /* Allow EC serial console input to wake up the EC from STOP mode */
  531. #undef CONFIG_FORCE_CONSOLE_RESUME
  532. /* Enable support for floating point unit */
  533. #undef CONFIG_FPU
  534. /*****************************************************************************/
  535. /* Firmware region configuration */
  536. #undef CONFIG_FW_IMAGE_SIZE
  537. #undef CONFIG_FW_PSTATE_OFF
  538. #undef CONFIG_FW_PSTATE_SIZE
  539. /*
  540. * Read-only / read-write image configuration.
  541. * Images may reside on storage (ex. external or internal SPI) at a different
  542. * offset than when copied to program memory. Hence, two sets of offsets,
  543. * for STORAGE and for MEMORY.
  544. */
  545. #undef CONFIG_RO_MEM_OFF
  546. #undef CONFIG_RO_STORAGE_OFF
  547. #undef CONFIG_RO_SIZE
  548. #undef CONFIG_RW_MEM_OFF
  549. #undef CONFIG_RW_STORAGE_OFF
  550. #undef CONFIG_RW_SIZE
  551. /*
  552. * Write protect region offset / size. This region normally encompasses the
  553. * RO image, but may also contain additional images or data.
  554. */
  555. #undef CONFIG_WP_OFF
  556. #undef CONFIG_WP_SIZE
  557. /*
  558. * Board Image ec.bin contains a RO firmware. If not defined, the image will
  559. * only contain the RW firmware. The RO firmware comes from another board.
  560. */
  561. #define CONFIG_FW_INCLUDE_RO
  562. /* If defined, another image (RW) exists with more features */
  563. #undef CONFIG_FW_LIMITED_IMAGE
  564. /*****************************************************************************/
  565. /* Motion sensor based gesture recognition information */
  566. /* These all require HAS_TASK_MOTIONSENSE to work */
  567. /* Do we want to detect gestures? */
  568. #undef CONFIG_GESTURE_DETECTION
  569. /* Which sensor to look for gesture recognition */
  570. #undef CONFIG_GESTURE_SENSOR_BATTERY_TAP
  571. /* Sensor sampling interval for gesture recognition */
  572. #undef CONFIG_GESTURE_SAMPLING_INTERVAL_MS
  573. /*
  574. * Double tap detection parameters
  575. * Double tap works by looking for two isolated Z-axis accelerometer impulses
  576. * preceded and followed by relatively calm periods of accelerometer motion.
  577. *
  578. * Define an outer and inner window. The inner window specifies how
  579. * long the tap impulse is expected to last. The outer window specifies the
  580. * period before the initial tap impluse and after the final tap impulse for
  581. * which to check for relatively calm periods. In between the two impulses
  582. * there is a minimum and maximum interstice time allowed.
  583. */
  584. #undef CONFIG_GESTURE_TAP_OUTER_WINDOW_T
  585. #undef CONFIG_GESTURE_TAP_INNER_WINDOW_T
  586. #undef CONFIG_GESTURE_TAP_MIN_INTERSTICE_T
  587. #undef CONFIG_GESTURE_TAP_MAX_INTERSTICE_T
  588. /* Do we want to detect the lid angle? */
  589. #undef CONFIG_LID_ANGLE
  590. /* Which sensor is located on the base? */
  591. #undef CONFIG_LID_ANGLE_SENSOR_BASE
  592. /* Which sensor is located on the lid? */
  593. #undef CONFIG_LID_ANGLE_SENSOR_LID
  594. /*
  595. * Allows using the lid angle measurement to determine if key scanning should
  596. * be enabled or disabled when chipset is suspended.
  597. */
  598. #undef CONFIG_LID_ANGLE_KEY_SCAN
  599. /*****************************************************************************/
  600. /*
  601. * Support the host asking the EC about the status of the most recent host
  602. * command.
  603. *
  604. * When the AP is attached to the EC via a serialized bus such as I2C or SPI,
  605. * it needs a way to minimize the length of time an EC command will tie up the
  606. * bus (and the kernel driver on the AP). If this config is defined, the EC
  607. * may return an in-progress result code for slow commands such as flash
  608. * erase/write instead of stalling until the command finishes processing, and
  609. * the AP may then inquire the status of the current command and/or the result
  610. * of the previous command.
  611. */
  612. #undef CONFIG_HOST_COMMAND_STATUS
  613. /* If we have host command task, assume we also are using host events. */
  614. #ifdef HAS_TASK_HOSTCMD
  615. #define CONFIG_HOSTCMD_EVENTS
  616. #else
  617. #undef CONFIG_HOSTCMD_EVENTS
  618. #endif
  619. /*
  620. * For ECs where the host command interface is I2C, slave
  621. * address which the EC will respond to.
  622. */
  623. #undef CONFIG_HOSTCMD_I2C_SLAVE_ADDR
  624. /*
  625. * Host command rate limiting assures EC will have time to process lower
  626. * priority tasks even if the AP is hammering the EC with host commands.
  627. * If there is less than CONFIG_HOSTCMD_RATE_LIMITING_MIN_REST between
  628. * host commands for CONFIG_HOSTCMD_RATE_LIMITING_PERIOD, then a
  629. * recess period of CONFIG_HOSTCMD_RATE_LIMITING_RECESS will be
  630. * enforced.
  631. */
  632. #define CONFIG_HOSTCMD_RATE_LIMITING_PERIOD (500 * MSEC)
  633. #define CONFIG_HOSTCMD_RATE_LIMITING_MIN_REST (3 * MSEC)
  634. #define CONFIG_HOSTCMD_RATE_LIMITING_RECESS (20 * MSEC)
  635. /* Panic when status of PD MCU reflects that it has crashed */
  636. #undef CONFIG_HOSTCMD_PD_PANIC
  637. /*****************************************************************************/
  638. /* Enable debugging and profiling statistics for hook functions */
  639. #undef CONFIG_HOOK_DEBUG
  640. /*****************************************************************************/
  641. /* CRC configuration */
  642. /* Enable the hardware accelerator for CRC computation */
  643. #undef CONFIG_HW_CRC
  644. /* Enable the software routine for CRC computation */
  645. #undef CONFIG_SW_CRC
  646. /*****************************************************************************/
  647. /* Enable system hibernate */
  648. #define CONFIG_HIBERNATE
  649. /* Default delay after shutting down before hibernating */
  650. #define CONFIG_HIBERNATE_DELAY_SEC 3600
  651. /*
  652. * Use to define going in to hibernate early if low on battery.
  653. * CONFIG_HIBERNATE_BATT_PCT specifies the low battery threshold
  654. * for going into hibernate early, and CONFIG_HIBERNATE_BATT_SEC defines
  655. * the minimum amount of time to stay in G3 before checking for low
  656. * battery hibernate.
  657. */
  658. #undef CONFIG_HIBERNATE_BATT_PCT
  659. #undef CONFIG_HIBERNATE_BATT_SEC
  660. /* For ECs with multiple wakeup pins, define enabled wakeup pins */
  661. #undef CONFIG_HIBERNATE_WAKEUP_PINS
  662. /*****************************************************************************/
  663. /* I2C configuration */
  664. #undef CONFIG_I2C
  665. #undef CONFIG_I2C_ARBITRATION
  666. #undef CONFIG_I2C_DEBUG
  667. #undef CONFIG_I2C_DEBUG_PASSTHRU
  668. #undef CONFIG_I2C_PASSTHROUGH
  669. #undef CONFIG_I2C_PASSTHRU_RESTRICTED
  670. /*
  671. * I2C SCL gating.
  672. *
  673. * If CONFIG_I2C_SCL_GATE_ADDR/PORT is defined, whenever the defined address
  674. * is addressed, CONFIG_I2C_SCL_GATE_GPIO is set to high. When the I2C
  675. * transaction is done, the pin is set back to low.
  676. */
  677. #undef CONFIG_I2C_SCL_GATE_PORT
  678. #undef CONFIG_I2C_SCL_GATE_ADDR
  679. #undef CONFIG_I2C_SCL_GATE_GPIO
  680. /*
  681. * I2C multi-port controller.
  682. *
  683. * If CONFIG_I2C_MULTI_PORT_CONTROLLER is defined, a single on-chip I2C
  684. * controller may have multiple I2C ports attached. Therefore, I2c operations
  685. * must lock the controller (not just the port) to prevent hardware access
  686. * conflicts.
  687. */
  688. #undef CONFIG_I2C_MULTI_PORT_CONTROLLER
  689. /*****************************************************************************/
  690. /* Current/Power monitor */
  691. /*
  692. * Compile driver for INA219 or INA231. These two flags may not be both
  693. * defined.
  694. */
  695. #undef CONFIG_INA219
  696. #undef CONFIG_INA231
  697. /*****************************************************************************/
  698. /* Inductive charging */
  699. /* Enable inductive charging support */
  700. #undef CONFIG_INDUCTIVE_CHARGING
  701. /*****************************************************************************/
  702. /* Number of IRQs supported on the EC chip */
  703. #undef CONFIG_IRQ_COUNT
  704. /*****************************************************************************/
  705. /* Keyboard config */
  706. /*
  707. * The Silego reset chip sits in between the EC and the physical keyboard on
  708. * column 2. To save power in low-power modes, some Silego variants require
  709. * the signal to be inverted so that the open-drain output from the EC isn't
  710. * costing power due to the pull-up resistor in the Silego.
  711. */
  712. #undef CONFIG_KEYBOARD_COL2_INVERTED
  713. /*
  714. * Config KSO to start from a different KSO pin. This is to allow some chips
  715. * to use alternate functions on KSO pins.
  716. */
  717. #define CONFIG_KEYBOARD_KSO_BASE 0
  718. /* Enable extra debugging output from keyboard modules */
  719. #undef CONFIG_KEYBOARD_DEBUG
  720. /* The board uses a negative edge-triggered GPIO for keyboard interrupts. */
  721. #undef CONFIG_KEYBOARD_IRQ_GPIO
  722. /* Compile code for 8042 keyboard protocol */
  723. #undef CONFIG_KEYBOARD_PROTOCOL_8042
  724. /* Compile code for MKBP keyboard protocol */
  725. #undef CONFIG_KEYBOARD_PROTOCOL_MKBP
  726. /*
  727. * Keyboard config (struct keyboard_scan_config) is in board.c. If this is
  728. * not defined, default values from common/keyboard_scan.c will be used.
  729. */
  730. #undef CONFIG_KEYBOARD_BOARD_CONFIG
  731. /*
  732. * Minimum CPU clocks between scans. This ensures that keyboard scanning
  733. * doesn't starve the other EC tasks of CPU when running at a decreased system
  734. * clock.
  735. */
  736. #undef CONFIG_KEYBOARD_POST_SCAN_CLOCKS
  737. /*
  738. * Call board-supplied keyboard_suppress_noise() function when the debounced
  739. * keyboard state changes. Some boards use this to send a signal to the audio
  740. * codec to suppress typing noise picked up by the microphone.
  741. */
  742. #undef CONFIG_KEYBOARD_SUPPRESS_NOISE
  743. /*
  744. * Enable keyboard testing functionality. This enables a message which receives
  745. * a list of keyscan events from the AP and processes them. This will cause
  746. * keypresses to appear on the AP through the same mechanism as a normal
  747. * keyboard press.
  748. *
  749. * This can be used to spoof keyboard events, so is not normally defined,
  750. * except during internal testing.
  751. */
  752. #undef CONFIG_KEYBOARD_TEST
  753. /*****************************************************************************/
  754. /* Support common LED interface */
  755. #undef CONFIG_LED_COMMON
  756. /* Standard LED behavior according to spec given that we have a red-green
  757. * bicolor led for charging and one power led
  758. */
  759. #undef CONFIG_LED_POLICY_STD
  760. /*
  761. * LEDs for LED_POLICY STD may be inverted. In this case they are active low
  762. * and the GPIO names will be GPIO_LED..._L.
  763. */
  764. #undef CONFIG_LED_BAT_ACTIVE_LOW
  765. #undef CONFIG_LED_POWER_ACTIVE_LOW
  766. /* Support for LED driver chip(s) */
  767. #undef CONFIG_LED_DRIVER_DS2413 /* Maxim DS2413, on one-wire interface */
  768. #undef CONFIG_LED_DRIVER_LP5562 /* LP5562, on I2C interface */
  769. /*
  770. * Compile lid switch support.
  771. *
  772. * This is enabled by default because all boards other than reference boards
  773. * are for laptops with lid switchs. Reference boards #undef it.
  774. */
  775. #define CONFIG_LID_SWITCH
  776. /*
  777. * Support for turning the lightbar power rails on briefly when the AP is off.
  778. * Enabling this requires implementing the board-specific lb_power() function
  779. * to do it (see lb_common.h).
  780. */
  781. #undef CONFIG_LIGHTBAR_POWER_RAILS
  782. /*
  783. * For tap sequence, show the last segment in dim to give a better idea of
  784. * battery percentage.
  785. */
  786. #undef CONFIG_LIGHTBAR_TAP_DIM_LAST_SEGMENT
  787. /*
  788. * Low power idle options. These are disabled by default and all boards that
  789. * want to use low power idle must define it. When using the LFIOSC, the low
  790. * frequency clock will be used to conserve even more power when possible.
  791. *
  792. * GPIOs which need to trigger interrupts in low power idle must specify the
  793. * GPIO_INT_DSLEEP flag in gpio_list[].
  794. *
  795. * Note that for some processors (e.g. LM4), an active JTAG connection will
  796. * prevent the EC from using low-power idle.
  797. */
  798. #undef CONFIG_LOW_POWER_IDLE
  799. #undef CONFIG_LOW_POWER_USE_LFIOSC
  800. /*
  801. * Enable deep sleep during S0 (ignores SLEEP_MASK_AP_RUN).
  802. */
  803. #undef CONFIG_LOW_POWER_S0
  804. /* Support LPC interface */
  805. #undef CONFIG_LPC
  806. /* Use Link-Time Optimizations to try to reduce the firmware code size */
  807. #undef CONFIG_LTO
  808. /* Presence of a Bosh Sensortec BMM150 magnetometer behind a BMI160. */
  809. #undef CONFIG_MAG_BMI160_BMM150
  810. /* Support MKBP event */
  811. #undef CONFIG_MKBP_EVENT
  812. /* Support memory protection unit (MPU) */
  813. #undef CONFIG_MPU
  814. /* Support one-wire interface */
  815. #undef CONFIG_ONEWIRE
  816. /* Support PECI interface to x86 processor */
  817. #undef CONFIG_PECI
  818. /*
  819. * Maximum operating temperature in degrees Celcius used on some x86
  820. * processors. CPU chip temperature is reported relative to this value and
  821. * is never reported greater than this value. Processor asserts PROCHOT#
  822. * and starts throttling frequency and voltage at this temp. Operation may
  823. * become unreliable if temperature exceeds this limit.
  824. */
  825. #undef CONFIG_PECI_TJMAX
  826. /*****************************************************************************/
  827. /* PMU config */
  828. /*
  829. * Force switching on and off the FETs on the PMU controlling various power
  830. * rails during AP startup and shutdown sequences. This is mainly useful for
  831. * bringup when we don't have the corresponding sequences in the AP code.
  832. *
  833. * Currently supported only on spring platform.
  834. */
  835. #undef CONFIG_PMU_FORCE_FET
  836. /*
  837. * Enable hard-resetting the PMU from the EC. The implementation is rather
  838. * hacky; it simply shorts out the 3.3V rail to force the PMIC to panic. We
  839. * need this unfortunate hack because it's the only way to reset the I2C engine
  840. * inside the PMU.
  841. */
  842. #undef CONFIG_PMU_HARD_RESET
  843. /* Support TPS65090 PMU */
  844. #undef CONFIG_PMU_TPS65090
  845. /*
  846. * Support PMU powerinfo host and console commands. Note that the
  847. * implementation is currently specific to the Pit board, so don't blindly
  848. * enable this for another board without fixing that first.
  849. */
  850. #undef CONFIG_PMU_POWERINFO
  851. /*****************************************************************************/
  852. /*
  853. * Enable polling at boot by port 80 task.
  854. * Ignored if port 80 is handled by interrupt
  855. */
  856. #undef CONFIG_PORT80_TASK_EN
  857. /*****************************************************************************/
  858. /* Compile common code to support power button debouncing */
  859. #undef CONFIG_POWER_BUTTON
  860. /* Force the active state of the power button : 0(default if unset) or 1 */
  861. #undef CONFIG_POWER_BUTTON_ACTIVE_STATE
  862. /* Allow the power button to send events while the lid is closed */
  863. #undef CONFIG_POWER_BUTTON_IGNORE_LID
  864. /* Support sending the power button signal to x86 chipsets */
  865. #undef CONFIG_POWER_BUTTON_X86
  866. /* Compile common code for AP power state machine */
  867. #undef CONFIG_POWER_COMMON
  868. /* Support stopping in S5 on shutdown */
  869. #undef CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
  870. /* Use part of the EC's data EEPROM to hold persistent storage for the AP. */
  871. #undef CONFIG_PSTORE
  872. /*****************************************************************************/
  873. /* Support PWM control */
  874. #undef CONFIG_PWM
  875. /* Support PWM control while in low-power idle */
  876. #undef CONFIG_PWM_DSLEEP
  877. /*****************************************************************************/
  878. /* Support PWM output to keyboard backlight */
  879. #undef CONFIG_PWM_KBLIGHT
  880. /* Base address of RAM for the chip */
  881. #undef CONFIG_RAM_BASE
  882. /* Size of RAM available on the chip, in bytes */
  883. #undef CONFIG_RAM_SIZE
  884. /* Support IR357x Link voltage regulator debugging / reprogramming */
  885. #undef CONFIG_REGULATOR_IR357X
  886. /* Support verifying 2048-bit RSA signature */
  887. #undef CONFIG_RSA
  888. /*
  889. * Verify the RW firmware using the RSA signature.
  890. * (for accessories without software sync)
  891. */
  892. #undef CONFIG_RWSIG
  893. /*
  894. * If defined, the hash module will save its last computed hash when jumping
  895. * between EC images.
  896. */
  897. #undef CONFIG_SAVE_VBOOT_HASH
  898. /* Enable smart battery firmware update driver */
  899. #undef CONFIG_SB_FIRMWARE_UPDATE
  900. /* Allow the board to use a GPIO for the SCI# signal. */
  901. #undef CONFIG_SCI_GPIO
  902. /* Support computing SHA-1 hash */
  903. #undef CONFIG_SHA1
  904. /* Support computing SHA-256 hash (without the VBOOT code) */
  905. #undef CONFIG_SHA256
  906. /* Emulate the CLZ (Count Leading Zeros) in software for CPU lacking support */
  907. #undef CONFIG_SOFTWARE_CLZ
  908. /* Support smbus interface */
  909. #undef CONFIG_SMBUS
  910. /* Support SPI interfaces */
  911. #undef CONFIG_SPI
  912. /* Support SPI flash */
  913. #undef CONFIG_SPI_FLASH
  914. /* Support W25Q64 SPI flash */
  915. #undef CONFIG_SPI_FLASH_W25Q64
  916. /* Support W25X40 SPI flash */
  917. #undef CONFIG_SPI_FLASH_W25X40
  918. /* SPI flash part supports SR2 register */
  919. #undef CONFIG_SPI_FLASH_HAS_SR2
  920. /* Size (bytes) of SPI flash memory */
  921. #undef CONFIG_SPI_FLASH_SIZE
  922. /* SPI module port used for master interface */
  923. #undef CONFIG_SPI_MASTER_PORT
  924. /* Default stack size to use for tasks, in bytes */
  925. #undef CONFIG_STACK_SIZE
  926. /* Fake hibernate mode */
  927. #undef CONFIG_STM32L_FAKE_HIBERNATE
  928. /*
  929. * Compile common code to handle simple switch inputs such as the recovery
  930. * button input from the servo debug interface.
  931. */
  932. #undef CONFIG_SWITCH
  933. /* Support dedicated recovery signal from servo board */
  934. #undef CONFIG_SWITCH_DEDICATED_RECOVERY
  935. /*
  936. * System should remain unlocked even if write protect is enabled.
  937. *
  938. * NOTE: This should ONLY be defined during bringup, and should never be
  939. * defined on a shipping / released platform.
  940. */
  941. #undef CONFIG_SYSTEM_UNLOCKED
  942. /*****************************************************************************/
  943. /* Task config */
  944. /*
  945. * List of enabled tasks in ascending priority order. This is normally
  946. * defined in each board's ec.tasklist file.
  947. *
  948. * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
  949. * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
  950. * where :
  951. * 'n' is the name of the task
  952. * 'r' is the main routine of the task
  953. * 'd' is an opaque parameter passed to the routine at startup
  954. * 's' is the stack size in bytes; must be a multiple of 8
  955. */
  956. #undef CONFIG_TASK_LIST
  957. /*
  958. * List of test tasks. Same format as CONFIG_TASK_LIST, but used to define
  959. * additional tasks for a unit test. Normally defined in
  960. * test/{testname}.tasklist.
  961. */
  962. #undef CONFIG_TEST_TASK_LIST
  963. /*
  964. * Enable task profiling.
  965. *
  966. * Boards may #undef this to reduce image size and RAM usage.
  967. */
  968. #define CONFIG_TASK_PROFILING
  969. /*****************************************************************************/
  970. /* Temperature sensor config */
  971. /* Compile common code for temperature sensor support */
  972. #undef CONFIG_TEMP_SENSOR
  973. /* Support particular temperature sensor chips */
  974. #undef CONFIG_TEMP_SENSOR_G781 /* G781 sensor, on I2C bus */
  975. #undef CONFIG_TEMP_SENSOR_TMP006 /* TI TMP006 sensor, on I2C bus */
  976. #undef CONFIG_TEMP_SENSOR_TMP432 /* TI TMP432 sensor, on I2C bus */
  977. /*
  978. * If defined, active-high GPIO which indicates temperature sensor chips are
  979. * powered. If not defined, temperature sensors are assumed to be always
  980. * powered.
  981. */
  982. #undef CONFIG_TEMP_SENSOR_POWER_GPIO
  983. /*****************************************************************************/
  984. /* Stream config
  985. *
  986. * Streams are an abstraction for managing character based IO streams. Streams
  987. * can virtualize USARTs (interrupt, polled, or DMA driven), USB bulk
  988. * endpoints, I2C transfers, and more.
  989. */
  990. #undef CONFIG_STREAM
  991. /*****************************************************************************/
  992. /* USART stream config */
  993. #undef CONFIG_STREAM_USART
  994. /*
  995. * Each USART stream can be individually enabled and accessible using the
  996. * stream interface provided in the usart_config struct.
  997. */
  998. #undef CONFIG_STREAM_USART1
  999. #undef CONFIG_STREAM_USART2
  1000. #undef CONFIG_STREAM_USART3
  1001. #undef CONFIG_STREAM_USART4
  1002. /*****************************************************************************/
  1003. /* USB stream config */
  1004. #undef CONFIG_STREAM_USB
  1005. /*****************************************************************************/
  1006. /* UART config */
  1007. /* Baud rate for UARTs */
  1008. #define CONFIG_UART_BAUD_RATE 115200
  1009. /* UART index (number) for EC console */
  1010. #undef CONFIG_UART_CONSOLE
  1011. /* UART index (number) for host UART, if present */
  1012. #undef CONFIG_UART_HOST
  1013. /* Use uart_input_filter() to filter UART input. See prototype in uart.h */
  1014. #undef CONFIG_UART_INPUT_FILTER
  1015. /*
  1016. * UART receive buffer size in bytes. Must be a power of 2 for macros in
  1017. * common/uart_buffering.c to work properly. Must be larger than
  1018. * CONFIG_CONSOLE_INPUT_LINE_SIZE to copy and paste scripts.
  1019. */
  1020. #define CONFIG_UART_RX_BUF_SIZE 128
  1021. /* Use DMA for UART input */
  1022. #undef CONFIG_UART_RX_DMA
  1023. /*
  1024. * On some platforms, UART receive DMA can't trigger an interrupt when a single
  1025. * character is received. Those platforms poll for characters every HOOK_TICK.
  1026. * When a character is received, make this many additional checks between then
  1027. * and the next HOOK_TICK, to increase responsiveness of the console to input.
  1028. */
  1029. #define CONFIG_UART_RX_DMA_RECHECKS 5
  1030. /*
  1031. * UART transmit buffer size in bytes. Must be a power of 2 for macros in
  1032. * common/uart_buffering.c to work properly.
  1033. */
  1034. #define CONFIG_UART_TX_BUF_SIZE 512
  1035. /* Use DMA for UART output */
  1036. #undef CONFIG_UART_TX_DMA
  1037. /* The DMA channel for UART. If not defined, default to UART1. */
  1038. #undef CONFIG_UART_TX_DMA_CH
  1039. #undef CONFIG_UART_RX_DMA_CH
  1040. /*****************************************************************************/
  1041. /* USB PD config */
  1042. /* Include all USB Power Delivery modules */
  1043. #undef CONFIG_USB_POWER_DELIVERY
  1044. /* Support for USB PD alternate mode */
  1045. #undef CONFIG_USB_PD_ALT_MODE
  1046. /* Support for USB PD alternate mode of Downward Facing Port */
  1047. #undef CONFIG_USB_PD_ALT_MODE_DFP
  1048. /* Check if max voltage request is allowed before each request */
  1049. #undef CONFIG_USB_PD_CHECK_MAX_REQUEST_ALLOWED
  1050. /* Default state of PD communication enabled flag */
  1051. #define CONFIG_USB_PD_COMM_ENABLED 1
  1052. /* Respond to custom vendor-defined messages over PD */
  1053. #undef CONFIG_USB_PD_CUSTOM_VDM
  1054. /* Define if this board can act as a dual-role PD port (source and sink) */
  1055. #undef CONFIG_USB_PD_DUAL_ROLE
  1056. /* Dynamic USB PD source capability */
  1057. #undef CONFIG_USB_PD_DYNAMIC_SRC_CAP
  1058. /* Check whether PD is the sole power source before flash erase operation */
  1059. #undef CONFIG_USB_PD_FLASH_ERASE_CHECK
  1060. /* Send host event when power changes */
  1061. #undef CONFIG_USB_PD_HOST_EVENT_ON_POWER_CHANGE
  1062. /* HW & SW version for alternate mode discover identity response (4bits each) */
  1063. #undef CONFIG_USB_PD_IDENTITY_HW_VERS
  1064. #undef CONFIG_USB_PD_IDENTITY_SW_VERS
  1065. /* USB PD MCU slave address for host commands */
  1066. #define CONFIG_USB_PD_I2C_SLAVE_ADDR 0x3c
  1067. /* Define if using internal comparator for PD receive */
  1068. #undef CONFIG_USB_PD_INTERNAL_COMP
  1069. /* Record main PD events in a circular buffer */
  1070. #undef CONFIG_USB_PD_LOGGING
  1071. /* The size in bytes of the FIFO used for PD events logging */
  1072. #undef CONFIG_USB_PD_LOG_SIZE
  1073. /* Define if USB-PD device has no way of detecting USB VBUS */
  1074. #undef CONFIG_USB_PD_NO_VBUS_DETECT
  1075. /* Number of USB PD ports */
  1076. #undef CONFIG_USB_PD_PORT_COUNT
  1077. /* Simple DFP, such as power adapter, will not send discovery VDM on connect */
  1078. #undef CONFIG_USB_PD_SIMPLE_DFP
  1079. /* Use comparator module for PD RX interrupt */
  1080. #define CONFIG_USB_PD_RX_COMP_IRQ
  1081. /* Use TCPC module (type-C port controller) */
  1082. #undef CONFIG_USB_PD_TCPC
  1083. /*
  1084. * Choose one of the following TCPMs (type-C port manager) to manage TCPC. The
  1085. * TCPM stub is used to make direct function calls to TCPC when TCPC is on
  1086. * the same MCU. The TCPCI TCPM uses the standard TCPCI i2c interface to TCPC.
  1087. */
  1088. #undef CONFIG_USB_PD_TCPM_STUB
  1089. #undef CONFIG_USB_PD_TCPM_TCPCI
  1090. /* Alternative configuration keeping only the TX part of PHY */
  1091. #undef CONFIG_USB_PD_TX_PHY_ONLY
  1092. /* Support for USB type-c superspeed mux */
  1093. #undef CONFIG_USBC_SS_MUX
  1094. /*
  1095. * Only configure USB type-c superspeed mux when DFP (for chipsets that
  1096. * don't support being a UFP)
  1097. */
  1098. #undef CONFIG_USBC_SS_MUX_DFP_ONLY
  1099. /* Support v1.1 type-C connection state machine */
  1100. #undef CONFIG_USBC_BACKWARDS_COMPATIBLE_DFP
  1101. /* Support for USB type-c vconn. Not needed for captive cables. */
  1102. #undef CONFIG_USBC_VCONN
  1103. /* Support VCONN swap */
  1104. #undef CONFIG_USBC_VCONN_SWAP
  1105. /* USB Binary device Object Store support */
  1106. #undef CONFIG_USB_BOS
  1107. /* USB Device version of product */
  1108. #undef CONFIG_USB_BCD_DEV
  1109. /*****************************************************************************/
  1110. /* Compile chip support for the USB device controller */
  1111. #undef CONFIG_USB
  1112. /* USB device buffers and descriptors in dedicated RAM */
  1113. #undef CONFIG_USB_RAM_ACCESS_SIZE
  1114. #undef CONFIG_USB_RAM_ACCESS_TYPE
  1115. #undef CONFIG_USB_RAM_BASE
  1116. #undef CONFIG_USB_RAM_SIZE
  1117. /* Disable automatic connection of USB peripheral */
  1118. #undef CONFIG_USB_INHIBIT_CONNECT
  1119. /* Disable automatic initialization of USB peripheral */
  1120. #undef CONFIG_USB_INHIBIT_INIT
  1121. /* Support simple control of power to the device's USB ports */
  1122. #undef CONFIG_USB_PORT_POWER_DUMB
  1123. /*
  1124. * Support supplying USB power in S3, if the host leaves the port enabled when
  1125. * entering S3.
  1126. */
  1127. #undef CONFIG_USB_PORT_POWER_IN_S3
  1128. /*
  1129. * Support smart power control to the device's USB ports, using
  1130. * dedicated power control chips. This potentially enables automatic
  1131. * negotiation of supplying more power to peripherals.
  1132. */
  1133. #undef CONFIG_USB_PORT_POWER_SMART
  1134. /*
  1135. * Override the default charging mode for USB smart power control.
  1136. * Value is selected from usb_charge_mode in include/usb_charge.h
  1137. */
  1138. #undef CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE
  1139. /*
  1140. * Smart USB power control can use a full set of control signals to the USB
  1141. * port power chip, or a reduced set. If this is defined, use the reduced set.
  1142. */
  1143. #undef CONFIG_USB_PORT_POWER_SMART_SIMPLE
  1144. /*
  1145. * Smart USB power control current limit pins may be inverted. In this case
  1146. * they are active low and the GPIO names will be GPIO_USBn_ILIM_SEL_L.
  1147. */
  1148. #undef CONFIG_USB_PORT_POWER_SMART_INVERTED
  1149. /* Support the TSU6721 I2C smart switch */
  1150. #undef CONFIG_USB_SWITCH_TSU6721
  1151. /* Support the Pericom PI3USB9281 I2C USB switch */
  1152. #undef CONFIG_USB_SWITCH_PI3USB9281
  1153. /* Select GPIO MUX for Pericom PI3USB9281 I2C USB switch */
  1154. #undef CONFIG_USB_SWITCH_PI3USB9281_MUX_GPIO
  1155. /*****************************************************************************/
  1156. /* USB GPIO config */
  1157. #undef CONFIG_USB_GPIO
  1158. /*****************************************************************************/
  1159. /* USB SPI config */
  1160. #undef CONFIG_USB_SPI
  1161. /*****************************************************************************/
  1162. /* Support computing hash of code for verified boot */
  1163. #undef CONFIG_VBOOT_HASH
  1164. /*****************************************************************************/
  1165. /* Watchdog config */
  1166. /*
  1167. * Compile watchdog timer support. The watchdog timer will reboot the system
  1168. * if the hook task (which is the lowest-priority task on the system) gets
  1169. * starved for CPU time and isn't able to fire its HOOK_TICK event.
  1170. */
  1171. #define CONFIG_WATCHDOG
  1172. /*
  1173. * Try to detect a watchdog that is about to fire, and print a trace. This is
  1174. * required on chips such as STM32 where the watchdog timer simply reboots the
  1175. * system without any early warning.
  1176. */
  1177. #undef CONFIG_WATCHDOG_HELP
  1178. /* Watchdog period in ms; see also AUX_TIMER_PERIOD_MS */
  1179. #define CONFIG_WATCHDOG_PERIOD_MS 1600
  1180. /*
  1181. * Fire auxiliary timer 500ms before watchdog timer expires. This leaves
  1182. * some time for debug trace to be printed.
  1183. */
  1184. #define CONFIG_AUX_TIMER_PERIOD_MS (CONFIG_WATCHDOG_PERIOD_MS - 500)
  1185. /*****************************************************************************/
  1186. /*
  1187. * Support controlling power to WiFi, WWAN (3G/LTE), and/or bluetooth modules.
  1188. */
  1189. #undef CONFIG_WIRELESS
  1190. /*
  1191. * Support for WiFi devices that must remain powered in suspend. Set to the
  1192. * combination of EC_WIRELESS_SWITCH flags (from ec_commands.h) which should
  1193. * be set in suspend.
  1194. */
  1195. #undef CONFIG_WIRELESS_SUSPEND
  1196. /*
  1197. * Write protect signal is active-high. If this is defined, there must be a
  1198. * GPIO named GPIO_WP; if not defined, there must be a GPIO names GPIO_WP_L.
  1199. */
  1200. #undef CONFIG_WP_ACTIVE_HIGH
  1201. /*
  1202. * The write protect signal is always asserted,
  1203. * independantly of the GPIO existence or current value.
  1204. */
  1205. #undef CONFIG_WP_ALWAYS
  1206. /*****************************************************************************/
  1207. /*
  1208. * Include board and core configs, since those hold the CONFIG_ constants for a
  1209. * given configuration. This guarantees they get included everywhere, and
  1210. * fixes a fairly common bug where we gate out code with #ifndef
  1211. * CONFIG_SOMETHING and but forget to include both of these.
  1212. *
  1213. * Board is included after chip, so that chip defaults can be overridden on a
  1214. * per-board basis as needed.
  1215. */
  1216. #ifdef __CROS_EC_CONFIG_CHIP_H
  1217. #error Include config.h instead of config_chip.h!
  1218. #endif
  1219. #ifdef __BOARD_H
  1220. #error Include config.h instead of board.h!
  1221. #endif
  1222. #include "config_chip.h"
  1223. #include "board.h"
  1224. /*****************************************************************************/
  1225. /*
  1226. * Handle task-dependent configs.
  1227. *
  1228. * This prevent sub-modules from being compiled when the task and parent module
  1229. * are not present.
  1230. */
  1231. #ifndef HAS_TASK_CHIPSET
  1232. #undef CONFIG_CHIPSET_BAYTRAIL
  1233. #undef CONFIG_CHIPSET_BRASWELL
  1234. #undef CONFIG_CHIPSET_GAIA
  1235. #undef CONFIG_CHIPSET_HASWELL
  1236. #undef CONFIG_CHIPSET_IVYBRIDGE
  1237. #undef CONFIG_CHIPSET_ROCKCHIP
  1238. #undef CONFIG_CHIPSET_TEGRA
  1239. #undef CONFIG_POWER_COMMON
  1240. #endif
  1241. #ifndef HAS_TASK_KEYPROTO
  1242. #undef CONFIG_KEYBOARD_PROTOCOL_8042
  1243. /*
  1244. * Note that we don't undef CONFIG_KEYBOARD_PROTOCOL_MKBP, because it doesn't
  1245. * have its own task.
  1246. */
  1247. #endif
  1248. #ifndef HAS_TASK_KEYSCAN
  1249. #undef CONFIG_KEYBOARD_PROTOCOL_8042
  1250. #undef CONFIG_KEYBOARD_PROTOCOL_MKBP
  1251. #endif
  1252. /*****************************************************************************/
  1253. /*
  1254. * Apply test config overrides last, since tests need to override some of the
  1255. * config flags in non-standard ways to mock only parts of the system.
  1256. */
  1257. #include "test_config.h"
  1258. /*****************************************************************************/
  1259. /*
  1260. * Sanity checks to make sure some of the configs above make sense.
  1261. */
  1262. #if (CONFIG_AUX_TIMER_PERIOD_MS) < ((HOOK_TICK_INTERVAL_MS) * 2)
  1263. #error "CONFIG_AUX_TIMER_PERIOD_MS must be at least 2x HOOK_TICK_INTERVAL_MS"
  1264. #endif
  1265. #endif /* __CROS_EC_CONFIG_H */