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  1. /* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
  2. * Use of this source code is governed by a BSD-style license that can be
  3. * found in the LICENSE file.
  4. */
  5. /*
  6. * config.h - Top-level configuration Chrome EC
  7. *
  8. * All configuration settings (CONFIG_*) are defined in this file or in a
  9. * sub-configuration file (config_chip.h, board.h, etc.) included by this file.
  10. *
  11. * Note that this file is included by assembly (.S) files. Any C-isms such as
  12. * struct definitions or enums in a sub-configuration file MUST be guarded with
  13. * #ifndef __ASSEMBLER__ to prevent those C-isms from being evaluated by the
  14. * assembler.
  15. */
  16. #ifndef __CROS_EC_CONFIG_H
  17. #define __CROS_EC_CONFIG_H
  18. /*
  19. * All config options are listed alphabetically and described here.
  20. *
  21. * If you add a new config option somewhere in the code, you must add a
  22. * default value here and describe what it does.
  23. *
  24. * To get a list current list, run this command:
  25. * git grep " CONFIG_" | grep -o "CONFIG_[A-Za-z0-9_]\+" | sort | uniq
  26. *
  27. * Some options are #defined here to enable them by default. Chips or boards
  28. * may override this by #undef'ing them in config_chip.h or board.h,
  29. * respectively.
  30. *
  31. * TODO(crosbug.com/p/23758): Describe all of these. Also describe the
  32. * HAS_TASK_* macro and how/when it should be used vs. a config define. And
  33. * BOARD_*, CHIP_*, and CHIP_FAMILY_*.
  34. */
  35. /* Enable accelerometer interrupts. */
  36. #undef CONFIG_ACCEL_INTERRUPTS
  37. /* Specify type of accelerometers attached. */
  38. #undef CONFIG_ACCEL_KXCJ9
  39. #undef CONFIG_ACCELGYRO_LSM6DS0
  40. #undef CONFIG_ACCELGYRO_BMI160
  41. /* Compile chip support for analog-to-digital convertor */
  42. #undef CONFIG_ADC
  43. /* ADC sample time selection. The value is chip-dependent. */
  44. #undef CONFIG_ADC_SAMPLE_TIME
  45. /* Include the ADC analog watchdog feature in the ADC code */
  46. #define CONFIG_ADC_WATCHDOG
  47. /*
  48. * Some ALS modules may be connected to the EC. We need the command, and
  49. * specific drivers for each module.
  50. */
  51. #undef CONFIG_ALS
  52. #undef CONFIG_ALS_ISL29035
  53. /* Support AP hang detection host command and state machine */
  54. #undef CONFIG_AP_HANG_DETECT
  55. /* Support AP Warm reset Interrupt. */
  56. #undef CONFIG_AP_WARM_RESET_INTERRUPT
  57. /*
  58. * Support controlling the display backlight based on the state of the lid
  59. * switch. The EC will disable the backlight when the lid is closed.
  60. */
  61. #undef CONFIG_BACKLIGHT_LID
  62. /*
  63. * If defined, EC will enable the backlight signal only if this GPIO is
  64. * asserted AND the lid is open. This supports passing the backlight-enable
  65. * signal from the AP through EC.
  66. */
  67. #undef CONFIG_BACKLIGHT_REQ_GPIO
  68. /*****************************************************************************/
  69. /* Battery config */
  70. /* Support a simple battery. */
  71. #undef CONFIG_BATTERY
  72. /*
  73. * Compile battery-specific code.
  74. *
  75. * Note that some boards have their own unique battery constants / functions.
  76. * In this case, those are provided in board/(boardname)/battery.c, and none of
  77. * these are defined.
  78. */
  79. #undef CONFIG_BATTERY_BQ20Z453
  80. #undef CONFIG_BATTERY_BQ27541
  81. #undef CONFIG_BATTERY_BQ27621
  82. #undef CONFIG_BATTERY_RYU
  83. #undef CONFIG_BATTERY_SAMUS
  84. /* Compile mock battery support; used by tests. */
  85. #undef CONFIG_BATTERY_MOCK
  86. /*
  87. * Charger should call battery_override_params() to limit/correct the voltage
  88. * and current requested by the battery pack before acting on the request.
  89. *
  90. * This is valid with CONFIG_CHARGER_V1 only.
  91. */
  92. #undef CONFIG_BATTERY_OVERRIDE_PARAMS
  93. /*
  94. * If defined, the charger will check for battery presence before attempting
  95. * to communicate with it. This avoids the 30 second delay when booting
  96. * without a battery present. Do not use with CONFIG_BATTERY_PRESENT_GPIO.
  97. *
  98. * Replace the default battery_is_present() function with a board-specific
  99. * implementation in board.c
  100. */
  101. #undef CONFIG_BATTERY_PRESENT_CUSTOM
  102. /*
  103. * If defined, GPIO which is driven low when battery is present.
  104. * Charger will check for battery presence before attempting to communicate
  105. * with it. This avoids the 30 second delay when booting without a battery
  106. * present. Do not use with CONFIG_BATTERY_PRESENT_CUSTOM.
  107. */
  108. #undef CONFIG_BATTERY_PRESENT_GPIO
  109. /*
  110. * Compile smart battery support
  111. *
  112. * For batteries which support this specification:
  113. * http://sbs-forum.org/specs/sbdat110.pdf)
  114. */
  115. #undef CONFIG_BATTERY_SMART
  116. /*
  117. * Critical battery shutdown timeout (seconds)
  118. *
  119. * If the battery is at extremely low charge (and discharging) or extremely
  120. * high temperature, the EC will shut itself down. This defines the timeout
  121. * period in seconds between the critical condition being detected and the
  122. * EC shutting itself down. Note that if the critical condition is corrected
  123. * before the timeout expiration, the EC will not shut itself down.
  124. *
  125. */
  126. #define CONFIG_BATTERY_CRITICAL_SHUTDOWN_TIMEOUT 30
  127. /*
  128. * Support battery cut-off as host command and console command.
  129. *
  130. * Once defined, you have to implement a board_cut_off_battery() function
  131. * in board/???/battery.c file.
  132. */
  133. #undef CONFIG_BATTERY_CUT_OFF
  134. /*
  135. * The default delay is 1 second. Define this if a board prefers
  136. * different delay.
  137. */
  138. #undef CONFIG_BATTERY_CUTOFF_DELAY_US
  139. /*
  140. * The board-specific battery.c implements get and set functions to read and
  141. * write arbirary vendor-specific parameters stored in the battery.
  142. * See include/battery.h for prototypes.
  143. */
  144. #undef CONFIG_BATTERY_VENDOR_PARAM
  145. /*
  146. * TODO(crosbug.com/p/29467): allows charging of a dead battery that
  147. * requests nil for current and voltage. Remove this workaround when
  148. * possible.
  149. */
  150. #undef CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD
  151. /*
  152. * Check for battery in disconnect state (similar to cut-off state). If this
  153. * battery is found to be in disconnect state, take it out of this state by
  154. * force-applying a charge current.
  155. */
  156. #undef CONFIG_BATTERY_REVIVE_DISCONNECT
  157. /* Boot header storage offset. */
  158. #undef CONFIG_BOOT_HEADER_STORAGE_OFF
  159. /* Size of boot header in storage. */
  160. #undef CONFIG_BOOT_HEADER_STORAGE_SIZE
  161. /*****************************************************************************/
  162. /*
  163. * Call board_config_post_gpio_init() after GPIOs are initialized. See
  164. * include/board_config.h for more information.
  165. */
  166. #undef CONFIG_BOARD_POST_GPIO_INIT
  167. /*
  168. * Call board_config_pre_init() before any inits are called. See
  169. * include/board_config.h for more information.
  170. */
  171. #undef CONFIG_BOARD_PRE_INIT
  172. /* EC has GPIOs attached to board version stuffing resistors */
  173. #undef CONFIG_BOARD_VERSION
  174. /* Permanent LM4 boot configuration */
  175. #undef CONFIG_BOOTCFG_VALUE
  176. /******************************************************************************/
  177. /* Oak Board Revisions */
  178. #undef CONFIG_BOARD_OAK_REV_1
  179. #undef CONFIG_BOARD_OAK_REV_2
  180. #undef CONFIG_BOARD_OAK_REV_3
  181. /*****************************************************************************/
  182. /* Modify the default behavior to make system bringup easier. */
  183. #undef CONFIG_BRINGUP
  184. /*
  185. * Enable debug prints / asserts that may helpful for debugging board bring-up,
  186. * but probably shouldn't be enabled for production for performance reasons.
  187. */
  188. #undef CONFIG_DEBUG_BRINGUP
  189. /*****************************************************************************/
  190. /*
  191. * Number of extra buttons not on the keyboard scan matrix. Doesn't include
  192. * the power button, which has its own handler.
  193. */
  194. #undef CONFIG_BUTTON_COUNT
  195. /*
  196. * Enable case close debug (CCD) mode.
  197. */
  198. #undef CONFIG_CASE_CLOSED_DEBUG
  199. /*
  200. * Capsense chip has buttons, too.
  201. */
  202. #undef CONFIG_CAPSENSE
  203. /*****************************************************************************/
  204. /* Compile charge manager */
  205. #undef CONFIG_CHARGE_MANAGER
  206. /* Compile input current ramping support */
  207. #undef CONFIG_CHARGE_RAMP
  208. /* The hardware has some input current ramping/back-off mechanism */
  209. #undef CONFIG_CHARGE_RAMP_HW
  210. /*****************************************************************************/
  211. /* Charger config */
  212. /* Compile common charge state code. You must pick an implementation. */
  213. #undef CONFIG_CHARGER
  214. #undef CONFIG_CHARGER_V1
  215. #undef CONFIG_CHARGER_V2
  216. /* Compile charger-specific code for these chargers (pick at most one) */
  217. #undef CONFIG_CHARGER_BQ24707A
  218. #undef CONFIG_CHARGER_BQ24715
  219. #undef CONFIG_CHARGER_BQ24725
  220. #undef CONFIG_CHARGER_BQ24735
  221. #undef CONFIG_CHARGER_BQ24738
  222. #undef CONFIG_CHARGER_BQ24770
  223. #undef CONFIG_CHARGER_BQ24773
  224. #undef CONFIG_CHARGER_BQ25890
  225. #undef CONFIG_CHARGER_BQ25892
  226. #undef CONFIG_CHARGER_BQ25895
  227. #undef CONFIG_CHARGER_ISL9237
  228. #undef CONFIG_CHARGER_TPS65090 /* Note: does not use CONFIG_CHARGER */
  229. /*
  230. * BQ2589x IR Compensation settings.
  231. * Should be the combination of BQ2589X_IR_TREG_xxxC, BQ2589X_IR_VCLAMP_yyyMV
  232. * and BQ2589X_IR_BAT_COMP_zzzMOHM.
  233. */
  234. #undef CONFIG_CHARGER_BQ2589X_IR_COMP
  235. /*
  236. * BQ2589x 5V boost current limit and voltage.
  237. * Should be the combination of BQ2589X_BOOSTV_MV(voltage) and
  238. * BQ2589X_BOOST_LIM_xxxMA.
  239. */
  240. #undef CONFIG_CHARGER_BQ2589X_BOOST
  241. /*
  242. * Board specific charging current limit, in mA. If defined, the charge state
  243. * machine will not allow the battery to request more current than this.
  244. */
  245. #undef CONFIG_CHARGER_CURRENT_LIMIT
  246. /*
  247. * Board supports discharge mode. In this mode, the battery will discharge
  248. * even if AC is present. Used for testing.
  249. */
  250. #undef CONFIG_CHARGER_DISCHARGE_ON_AC
  251. /*
  252. * Board specific flag used to disable external ILIM pin used to determine input
  253. * current limit. When defined, the input current limit is decided only by
  254. * the software register value.
  255. */
  256. #undef CONFIG_CHARGER_ILIM_PIN_DISABLED
  257. /*
  258. * Default input current for the board, in mA.
  259. *
  260. * This value should depend on external power adapter, designed charging
  261. * voltage, and the maximum power of the running system.
  262. */
  263. #undef CONFIG_CHARGER_INPUT_CURRENT
  264. /*
  265. * Board specific maximum input current limit, in mA.
  266. */
  267. #undef CONFIG_CHARGER_MAX_INPUT_CURRENT
  268. /* Minimum battery percentage for power on */
  269. #undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON
  270. /*
  271. * Equivalent of CONFIG_BATTERY_OVERRIDE_PARAMS for use with
  272. * CONFIG_CHARGER_V2
  273. */
  274. #undef CONFIG_CHARGER_PROFILE_OVERRIDE
  275. /* Value of the charge sense resistor, in mOhms */
  276. #undef CONFIG_CHARGER_SENSE_RESISTOR
  277. /* Value of the input current sense resistor, in mOhms */
  278. #undef CONFIG_CHARGER_SENSE_RESISTOR_AC
  279. /*
  280. * Maximum time to charge the battery, in hours.
  281. *
  282. * If this timeout is reached, the charger will enter force-idle state.
  283. * If not defined, charger will provide current until the battery asks it to
  284. * stop.
  285. */
  286. #undef CONFIG_CHARGER_TIMEOUT_HOURS
  287. /*
  288. * Board has an GPIO pin to enable or disable charging.
  289. *
  290. * This GPIO should be named GPIO_CHARGER_EN, if active high. Or
  291. * GPIO_CHARGER_EN_L if active low.
  292. */
  293. #undef CONFIG_CHARGER_EN_GPIO
  294. /* Charger enable GPIO is active low */
  295. #undef CONFIG_CHARGER_EN_ACTIVE_LOW
  296. /*****************************************************************************/
  297. /* Chipset config */
  298. /* AP chipset support; pick at most one */
  299. #undef CONFIG_CHIPSET_BAYTRAIL /* Intel Bay Trail (x86) */
  300. #undef CONFIG_CHIPSET_BRASWELL /* Intel Braswell (x86) */
  301. #undef CONFIG_CHIPSET_ECDRIVEN /* Dummy power module */
  302. #undef CONFIG_CHIPSET_GAIA /* Gaia and Ares (ARM) */
  303. #undef CONFIG_CHIPSET_HASWELL /* Intel Haswell (x86) */
  304. #undef CONFIG_CHIPSET_MEDIATEK /* MediaTek MT81xx */
  305. #undef CONFIG_CHIPSET_ROCKCHIP /* Rockchip rk32xx */
  306. #undef CONFIG_CHIPSET_SKYLAKE /* Intel Skylake (x86) */
  307. #undef CONFIG_CHIPSET_TEGRA /* nVidia Tegra 5 */
  308. /* Support chipset throttling */
  309. #undef CONFIG_CHIPSET_CAN_THROTTLE
  310. /* Enable additional chipset debugging */
  311. #undef CONFIG_CHIPSET_DEBUG
  312. /* Support power rail control */
  313. #define CONFIG_CHIPSET_HAS_PP1350
  314. #define CONFIG_CHIPSET_HAS_PP5000
  315. /*****************************************************************************/
  316. /*
  317. * Chip config for clock circuitry
  318. * define = crystal / undef = oscillator
  319. */
  320. #undef CONFIG_CLOCK_CRYSTAL
  321. /*****************************************************************************/
  322. /* PMIC config */
  323. /* Support firmware long press power-off timer */
  324. #undef CONFIG_PMIC_FW_LONG_PRESS_TIMER
  325. /*****************************************************************************/
  326. /*
  327. * Optional console commands
  328. *
  329. * Defining these options will enable the corresponding command on the EC
  330. * console.
  331. */
  332. #undef CONFIG_CMD_ACCELS
  333. #undef CONFIG_CMD_ACCEL_INFO
  334. #undef CONFIG_CMD_BATDEBUG
  335. #undef CONFIG_CMD_CHGRAMP
  336. #undef CONFIG_CMD_CLOCKGATES
  337. #undef CONFIG_CMD_COMXTEST
  338. #undef CONFIG_CMD_ECTEMP
  339. #undef CONFIG_CMD_FLASH
  340. #undef CONFIG_CMD_FORCETIME
  341. #undef CONFIG_CMD_GSV
  342. #define CONFIG_CMD_HASH
  343. #undef CONFIG_CMD_HOSTCMD
  344. #define CONFIG_CMD_I2C_SCAN
  345. #define CONFIG_CMD_I2C_XFER
  346. #undef CONFIG_CMD_I2CWEDGE
  347. #define CONFIG_CMD_IDLE_STATS
  348. #undef CONFIG_CMD_ILIM
  349. #undef CONFIG_CMD_JUMPTAGS
  350. #undef CONFIG_CMD_LID_ANGLE
  351. #undef CONFIG_CMD_MCDP
  352. #define CONFIG_CMD_PD
  353. #undef CONFIG_CMD_PD_DEV_DUMP_INFO
  354. #undef CONFIG_CMD_PD_FLASH
  355. #undef CONFIG_CMD_PLL
  356. #undef CONFIG_CMD_PMU
  357. #define CONFIG_CMD_POWER_AP
  358. #define CONFIG_CMD_POWERINDEBUG
  359. #undef CONFIG_CMD_POWERLED
  360. #undef CONFIG_CMD_RTC_ALARM
  361. #undef CONFIG_CMD_SCRATCHPAD
  362. #define CONFIG_CMD_SHMEM
  363. #undef CONFIG_CMD_SLEEP
  364. #undef CONFIG_CMD_SPI_FLASH
  365. #undef CONFIG_CMD_STACKOVERFLOW
  366. #undef CONFIG_CMD_TASKREADY
  367. #define CONFIG_CMD_TIMERINFO
  368. #define CONFIG_CMD_TYPEC
  369. #undef CONFIG_CMD_USB_PD_PE
  370. /*****************************************************************************/
  371. /* Support Code RAM architecture (run code in RAM). */
  372. #undef CONFIG_CODERAM_ARCH
  373. /* Base address of Code RAM. */
  374. #undef CONFIG_CDRAM_BASE
  375. /* Size of Code RAM. */
  376. #undef CONFIG_CDRAM_SIZE
  377. /* Provide common core code to output panic information without interrupts. */
  378. #define CONFIG_COMMON_PANIC_OUTPUT
  379. /*
  380. * Store a panic log and halt the system for a software-related reasons, such as
  381. * stack overflow or assertion failure.
  382. */
  383. #undef CONFIG_SOFTWARE_PANIC
  384. /*
  385. * Provide the default GPIO abstraction layer.
  386. * You want this unless you are doing a really tiny firmware.
  387. */
  388. #define CONFIG_COMMON_GPIO
  389. /*
  390. * Provides smaller GPIO names to reduce flash size. Instead of the 'name'
  391. * field in GPIO macro it will concat 'port' and 'pin' to reduce flash size.
  392. */
  393. #undef CONFIG_COMMON_GPIO_SHORTNAMES
  394. /*
  395. * Provide common runtime layer code (tasks, hooks ...)
  396. * You want this unless you are doing a really tiny firmware.
  397. */
  398. #define CONFIG_COMMON_RUNTIME
  399. /* Provide common core code to handle the operating system timers. */
  400. #define CONFIG_COMMON_TIMER
  401. /*****************************************************************************/
  402. /*
  403. * Provide additional help on console commands, such as the supported
  404. * options/usage.
  405. *
  406. * Boards may #undef this to reduce image size.
  407. */
  408. #define CONFIG_CONSOLE_CMDHELP
  409. /*
  410. * Number of entries in console history buffer.
  411. *
  412. * Boards may #undef this to reduce memory usage.
  413. */
  414. #define CONFIG_CONSOLE_HISTORY 8
  415. /* Max length of a single line of input */
  416. #define CONFIG_CONSOLE_INPUT_LINE_SIZE 80
  417. /*
  418. * Disable EC console input if the system is locked. This is needed for
  419. * security on platforms where the EC console is accessible from outside the
  420. * case - for example, via a special USB dongle.
  421. */
  422. #undef CONFIG_CONSOLE_RESTRICTED_INPUT
  423. /* Include CRC-8 utility function */
  424. #undef CONFIG_CRC8
  425. /*****************************************************************************/
  426. /*
  427. * Debugging config
  428. *
  429. * Note that these options are enabled by default, because they're really
  430. * handy for debugging systems during bringup and even at factory time.
  431. *
  432. * A board may undefine any or all of these to reduce image size and RAM usage,
  433. * at the cost of debuggability.
  434. */
  435. /*
  436. * ASSERT() macros are checked at runtime. See CONFIG_DEBUG_ASSERT_REBOOTS
  437. * to see what happens if one fails.
  438. *
  439. * Boards may #undef this to reduce image size.
  440. */
  441. #define CONFIG_DEBUG_ASSERT
  442. /*
  443. * Prints a message and reboots if an ASSERT() macro fails at runtime. When
  444. * enabled, an ASSERT() which fails will produce a message of the form:
  445. *
  446. * ASSERTION FAILURE '<expr>' in function() at file:line
  447. *
  448. * If this is not defined, failing ASSERT() will trigger a BKPT instruction
  449. * instead.
  450. *
  451. * Ignored if CONFIG_DEBUG_ASSERT is not defined.
  452. *
  453. * Boards may #undef this to reduce image size.
  454. */
  455. #define CONFIG_DEBUG_ASSERT_REBOOTS
  456. /*
  457. * On assertion failure, prints only the file name and the line number.
  458. *
  459. * Ignored if CONFIG_DEBUG_ASSERT_REBOOTS is not defined.
  460. *
  461. * Boards may define this to reduce image size.
  462. */
  463. #undef CONFIG_DEBUG_ASSERT_BRIEF
  464. /*
  465. * Disable the write buffer used for default memory map accesses.
  466. * This turns "Imprecise data bus errors" into "Precise" errors
  467. * in exception traces at the cost of some performance.
  468. * This may help identify the offending instruction causing an
  469. * exception. Supported on cortex-m.
  470. */
  471. #undef CONFIG_DEBUG_DISABLE_WRITE_BUFFER
  472. /*
  473. * Print additional information when exceptions are triggered, such as the
  474. * fault address, here shown as bfar. This shows the reason for the fault
  475. * and may help to determine the cause.
  476. *
  477. * === EXCEPTION: 03 ====== xPSR: 01000000 ===========
  478. * r0 :0000000b r1 :00000047 r2 :60000000 r3 :200013dd
  479. * r4 :00000000 r5 :080053f4 r6 :200013d0 r7 :00000002
  480. * r8 :00000000 r9 :200013de r10:00000000 r11:00000000
  481. * r12:00000000 sp :200009a0 lr :08002b85 pc :08003a8a
  482. * Precise data bus error, Forced hard fault, Vector catch, bfar = 60000000
  483. * mmfs = 00008200, shcsr = 00000000, hfsr = 40000000, dfsr = 00000008
  484. *
  485. * If this is not defined, only a register dump will be printed.
  486. *
  487. * Boards may #undef this to reduce image size.
  488. */
  489. #define CONFIG_DEBUG_EXCEPTIONS
  490. /* Support Synchronous UART debug printf. */
  491. #undef CONFIG_DEBUG_PRINTF
  492. /* Check for stack overflows on every context switch */
  493. #define CONFIG_DEBUG_STACK_OVERFLOW
  494. /*****************************************************************************/
  495. /* Support DMA transfers inside the EC */
  496. #undef CONFIG_DMA
  497. /* Use the common interrupt handlers for DMA IRQs */
  498. #define CONFIG_DMA_DEFAULT_HANDLERS
  499. /* Compile extra debugging and tests for the DMA module */
  500. #undef CONFIG_DMA_HELP
  501. /* Support EC to Internal bus bridge. */
  502. #undef CONFIG_EC2I
  503. /* Support EC chip internal data EEPROM */
  504. #undef CONFIG_EEPROM
  505. /*
  506. * Compile the eoption module, which provides a higher-level interface to
  507. * options stored in internal data EEPROM.
  508. */
  509. #undef CONFIG_EOPTION
  510. /* Include code for handling external power */
  511. #define CONFIG_EXTPOWER
  512. /* Support detecting external power presence via a GPIO */
  513. #undef CONFIG_EXTPOWER_GPIO
  514. /*****************************************************************************/
  515. /* Number of cooling fans. Undef if none. */
  516. #undef CONFIG_FANS
  517. /*
  518. * Replace the default fan_percent_to_rpm() function with a board-specific
  519. * implementation in board.c
  520. */
  521. #undef CONFIG_FAN_RPM_CUSTOM
  522. /*
  523. * We normally check and update the fans once per second (HOOK_SECOND). If this
  524. * is #defined to a postive integer N, we will only update the fans every N
  525. * seconds instead.
  526. */
  527. #undef CONFIG_FAN_UPDATE_PERIOD
  528. /*****************************************************************************/
  529. /* Flash configuration */
  530. /* Support programming on-chip flash */
  531. #define CONFIG_FLASH
  532. #undef CONFIG_FLASH_BANK_SIZE
  533. #undef CONFIG_FLASH_BASE
  534. #undef CONFIG_FLASH_ERASED_VALUE32
  535. #undef CONFIG_FLASH_ERASE_SIZE
  536. /*
  537. * Flash is directly mapped into the EC's address space. If this is not
  538. * defined, the flash driver must implement flash_physical_read().
  539. */
  540. #define CONFIG_FLASH_MAPPED
  541. #undef CONFIG_FLASH_PHYSICAL_SIZE
  542. #undef CONFIG_FLASH_PROTECT_NEXT_BOOT
  543. /*
  544. * Store persistent write protect for the flash inside the flash data itself.
  545. * This allows ECs with internal flash to emulate something closer to a SPI
  546. * flash write protect register. If this is not defined, write protect state
  547. * is maintained solely by the physical flash driver.
  548. */
  549. #define CONFIG_FLASH_PSTATE
  550. /*
  551. * Store the pstate data in its own dedicated bank of flash. This allows
  552. * disabling the protect-RO-at-boot flag without rewriting the RO firmware,
  553. * but costs a bank of flash.
  554. *
  555. * If this is not defined, the pstate data is stored inside the RO firmware
  556. * image itself. This is more space-efficient, but the only way to clear the
  557. * flag once it's set is to rewrite the RO firmware (after removing the WP
  558. * screw, of course).
  559. */
  560. #define CONFIG_FLASH_PSTATE_BANK
  561. #undef CONFIG_FLASH_SIZE
  562. #undef CONFIG_FLASH_WRITE_IDEAL_SIZE
  563. #undef CONFIG_FLASH_WRITE_SIZE
  564. /* Base address of SPI Flash. */
  565. #undef CONFIG_FLASH_BASE_SPI
  566. /*****************************************************************************/
  567. /* Include a flashmap in the compiled firmware image */
  568. #define CONFIG_FMAP
  569. /* Allow EC serial console input to wake up the EC from STOP mode */
  570. #undef CONFIG_FORCE_CONSOLE_RESUME
  571. /* Enable support for floating point unit */
  572. #undef CONFIG_FPU
  573. /*****************************************************************************/
  574. /* Firmware region configuration */
  575. #undef CONFIG_FW_IMAGE_SIZE
  576. #undef CONFIG_FW_PSTATE_OFF
  577. #undef CONFIG_FW_PSTATE_SIZE
  578. /*
  579. * Read-only / read-write image configuration.
  580. * Images may reside on storage (ex. external or internal SPI) at a different
  581. * offset than when copied to program memory. Hence, two sets of offsets,
  582. * for STORAGE and for MEMORY.
  583. */
  584. #undef CONFIG_RO_MEM_OFF
  585. #undef CONFIG_RO_STORAGE_OFF
  586. #undef CONFIG_RO_SIZE
  587. #undef CONFIG_RW_MEM_OFF
  588. #undef CONFIG_RW_STORAGE_OFF
  589. #undef CONFIG_RW_SIZE
  590. /* Enable SPI Flash write protect. */
  591. #undef CONFIG_WP_ENABLE
  592. /*
  593. * Write protect region offset / size. This region normally encompasses the
  594. * RO image, but may also contain additional images or data.
  595. */
  596. #undef CONFIG_WP_OFF
  597. #undef CONFIG_WP_SIZE
  598. /*
  599. * Board Image ec.bin contains a RO firmware. If not defined, the image will
  600. * only contain the RW firmware. The RO firmware comes from another board.
  601. */
  602. #define CONFIG_FW_INCLUDE_RO
  603. /* If defined, another image (RW) exists with more features */
  604. #undef CONFIG_FW_LIMITED_IMAGE
  605. /*****************************************************************************/
  606. /* Motion sensor based gesture recognition information */
  607. /* These all require HAS_TASK_MOTIONSENSE to work */
  608. /* Do we want to detect gestures? */
  609. #undef CONFIG_GESTURE_DETECTION
  610. /* Which sensor to look for gesture recognition */
  611. #undef CONFIG_GESTURE_SENSOR_BATTERY_TAP
  612. /* Sensor sampling interval for gesture recognition */
  613. #undef CONFIG_GESTURE_SAMPLING_INTERVAL_MS
  614. /*
  615. * Double tap detection parameters
  616. * Double tap works by looking for two isolated Z-axis accelerometer impulses
  617. * preceded and followed by relatively calm periods of accelerometer motion.
  618. *
  619. * Define an outer and inner window. The inner window specifies how
  620. * long the tap impulse is expected to last. The outer window specifies the
  621. * period before the initial tap impluse and after the final tap impulse for
  622. * which to check for relatively calm periods. In between the two impulses
  623. * there is a minimum and maximum interstice time allowed.
  624. */
  625. #undef CONFIG_GESTURE_TAP_OUTER_WINDOW_T
  626. #undef CONFIG_GESTURE_TAP_INNER_WINDOW_T
  627. #undef CONFIG_GESTURE_TAP_MIN_INTERSTICE_T
  628. #undef CONFIG_GESTURE_TAP_MAX_INTERSTICE_T
  629. /* Do we want to detect the lid angle? */
  630. #undef CONFIG_LID_ANGLE
  631. /* Which sensor is located on the base? */
  632. #undef CONFIG_LID_ANGLE_SENSOR_BASE
  633. /* Which sensor is located on the lid? */
  634. #undef CONFIG_LID_ANGLE_SENSOR_LID
  635. /*
  636. * Allows using the lid angle measurement to determine if key scanning should
  637. * be enabled or disabled when chipset is suspended.
  638. */
  639. #undef CONFIG_LID_ANGLE_KEY_SCAN
  640. /* Define which index in motion_sensors is in the base. */
  641. #undef CONFIG_SENSOR_BASE
  642. /* Define which index in motion_sensors is in the lid. */
  643. #undef CONFIG_SENSOR_LID
  644. /******************************************************************************/
  645. /* Host to RAM (H2RAM) Memory Mapping */
  646. /* H2RAM Base memory address */
  647. #undef CONFIG_H2RAM_BASE
  648. /* H2RAM Size */
  649. #undef CONFIG_H2RAM_SIZE
  650. /* H2RAM Host LPC I/O base memory address */
  651. #undef CONFIG_H2RAM_HOST_LPC_IO_BASE
  652. /*****************************************************************************/
  653. /*
  654. * Support the host asking the EC about the status of the most recent host
  655. * command.
  656. *
  657. * When the AP is attached to the EC via a serialized bus such as I2C or SPI,
  658. * it needs a way to minimize the length of time an EC command will tie up the
  659. * bus (and the kernel driver on the AP). If this config is defined, the EC
  660. * may return an in-progress result code for slow commands such as flash
  661. * erase/write instead of stalling until the command finishes processing, and
  662. * the AP may then inquire the status of the current command and/or the result
  663. * of the previous command.
  664. */
  665. #undef CONFIG_HOST_COMMAND_STATUS
  666. /* If we have host command task, assume we also are using host events. */
  667. #ifdef HAS_TASK_HOSTCMD
  668. #define CONFIG_HOSTCMD_EVENTS
  669. #else
  670. #undef CONFIG_HOSTCMD_EVENTS
  671. #endif
  672. /*
  673. * For ECs where the host command interface is I2C, slave
  674. * address which the EC will respond to.
  675. */
  676. #undef CONFIG_HOSTCMD_I2C_SLAVE_ADDR
  677. /*
  678. * Host command rate limiting assures EC will have time to process lower
  679. * priority tasks even if the AP is hammering the EC with host commands.
  680. * If there is less than CONFIG_HOSTCMD_RATE_LIMITING_MIN_REST between
  681. * host commands for CONFIG_HOSTCMD_RATE_LIMITING_PERIOD, then a
  682. * recess period of CONFIG_HOSTCMD_RATE_LIMITING_RECESS will be
  683. * enforced.
  684. */
  685. #define CONFIG_HOSTCMD_RATE_LIMITING_PERIOD (500 * MSEC)
  686. #define CONFIG_HOSTCMD_RATE_LIMITING_MIN_REST (3 * MSEC)
  687. #define CONFIG_HOSTCMD_RATE_LIMITING_RECESS (20 * MSEC)
  688. /* PD MCU supports host commands */
  689. #undef CONFIG_HOSTCMD_PD
  690. /*
  691. * Use if PD MCU controls charging (selecting charging port and input
  692. * current limit).
  693. */
  694. #undef CONFIG_HOSTCMD_PD_CHG_CTRL
  695. /* Panic when status of PD MCU reflects that it has crashed */
  696. #undef CONFIG_HOSTCMD_PD_PANIC
  697. /*****************************************************************************/
  698. /* Enable debugging and profiling statistics for hook functions */
  699. #undef CONFIG_HOOK_DEBUG
  700. /*****************************************************************************/
  701. /* CRC configuration */
  702. /* Enable the hardware accelerator for CRC computation */
  703. #undef CONFIG_HW_CRC
  704. /* Enable the software routine for CRC computation */
  705. #undef CONFIG_SW_CRC
  706. /*****************************************************************************/
  707. /* Enable system hibernate */
  708. #define CONFIG_HIBERNATE
  709. /* Default delay after shutting down before hibernating */
  710. #define CONFIG_HIBERNATE_DELAY_SEC 3600
  711. /*
  712. * Use to define going in to hibernate early if low on battery.
  713. * CONFIG_HIBERNATE_BATT_PCT specifies the low battery threshold
  714. * for going into hibernate early, and CONFIG_HIBERNATE_BATT_SEC defines
  715. * the minimum amount of time to stay in G3 before checking for low
  716. * battery hibernate.
  717. */
  718. #undef CONFIG_HIBERNATE_BATT_PCT
  719. #undef CONFIG_HIBERNATE_BATT_SEC
  720. /* For ECs with multiple wakeup pins, define enabled wakeup pins */
  721. #undef CONFIG_HIBERNATE_WAKEUP_PINS
  722. /* Use a hardware specific udelay(). */
  723. #undef CONFIG_HW_SPECIFIC_UDELAY
  724. /*****************************************************************************/
  725. /* I2C configuration */
  726. #undef CONFIG_I2C
  727. #undef CONFIG_I2C_ARBITRATION
  728. #undef CONFIG_I2C_DEBUG
  729. #undef CONFIG_I2C_DEBUG_PASSTHRU
  730. #undef CONFIG_I2C_PASSTHROUGH
  731. #undef CONFIG_I2C_PASSTHRU_RESTRICTED
  732. /* Defines I2C operation retry count when slave nack'd(EC_ERROR_BUSY) */
  733. #define CONFIG_I2C_NACK_RETRY_COUNT 0
  734. /*
  735. * I2C SCL gating.
  736. *
  737. * If CONFIG_I2C_SCL_GATE_ADDR/PORT is defined, whenever the defined address
  738. * is addressed, CONFIG_I2C_SCL_GATE_GPIO is set to high. When the I2C
  739. * transaction is done, the pin is set back to low.
  740. */
  741. #undef CONFIG_I2C_SCL_GATE_PORT
  742. #undef CONFIG_I2C_SCL_GATE_ADDR
  743. #undef CONFIG_I2C_SCL_GATE_GPIO
  744. /*
  745. * I2C multi-port controller.
  746. *
  747. * If CONFIG_I2C_MULTI_PORT_CONTROLLER is defined, a single on-chip I2C
  748. * controller may have multiple I2C ports attached. Therefore, I2c operations
  749. * must lock the controller (not just the port) to prevent hardware access
  750. * conflicts.
  751. */
  752. #undef CONFIG_I2C_MULTI_PORT_CONTROLLER
  753. /*****************************************************************************/
  754. /* Current/Power monitor */
  755. /*
  756. * Compile driver for INA219 or INA231. These two flags may not be both
  757. * defined.
  758. */
  759. #undef CONFIG_INA219
  760. #undef CONFIG_INA231
  761. /*****************************************************************************/
  762. /* Inductive charging */
  763. /* Enable inductive charging support */
  764. #undef CONFIG_INDUCTIVE_CHARGING
  765. /******************************************************************************/
  766. /* Support NXP PCA9534 I/O expander. */
  767. #undef CONFIG_IO_EXPANDER_PCA9534
  768. /*****************************************************************************/
  769. /* Number of IRQs supported on the EC chip */
  770. #undef CONFIG_IRQ_COUNT
  771. /* Enable Wake-up control interrupt from KSI */
  772. #undef CONFIG_IT83XX_KEYBOARD_KSI_WUC_INT
  773. /* Interrupt for PECI module. (IT839X series and IT838X DX only) */
  774. #undef CONFIG_IT83XX_PECI_WITH_INTERRUPT
  775. /* To define it, if I2C channel C and PECI used at the same time. */
  776. #undef CONFIG_IT83XX_SMCLK2_ON_GPC7
  777. /* Use SSPI Chip Enable 1. */
  778. #undef CONFIG_IT83XX_SPI_USE_CS1
  779. /*****************************************************************************/
  780. /* Keyboard config */
  781. /*
  782. * The Silego reset chip sits in between the EC and the physical keyboard on
  783. * column 2. To save power in low-power modes, some Silego variants require
  784. * the signal to be inverted so that the open-drain output from the EC isn't
  785. * costing power due to the pull-up resistor in the Silego.
  786. */
  787. #undef CONFIG_KEYBOARD_COL2_INVERTED
  788. /*
  789. * Config KSO to start from a different KSO pin. This is to allow some chips
  790. * to use alternate functions on KSO pins.
  791. */
  792. #define CONFIG_KEYBOARD_KSO_BASE 0
  793. /* Enable extra debugging output from keyboard modules */
  794. #undef CONFIG_KEYBOARD_DEBUG
  795. /* The board uses a negative edge-triggered GPIO for keyboard interrupts. */
  796. #undef CONFIG_KEYBOARD_IRQ_GPIO
  797. /* Compile code for 8042 keyboard protocol */
  798. #undef CONFIG_KEYBOARD_PROTOCOL_8042
  799. /* Compile code for MKBP keyboard protocol */
  800. #undef CONFIG_KEYBOARD_PROTOCOL_MKBP
  801. /*
  802. * Keyboard config (struct keyboard_scan_config) is in board.c. If this is
  803. * not defined, default values from common/keyboard_scan.c will be used.
  804. */
  805. #undef CONFIG_KEYBOARD_BOARD_CONFIG
  806. /*
  807. * Minimum CPU clocks between scans. This ensures that keyboard scanning
  808. * doesn't starve the other EC tasks of CPU when running at a decreased system
  809. * clock.
  810. */
  811. #undef CONFIG_KEYBOARD_POST_SCAN_CLOCKS
  812. /*
  813. * Call board-supplied keyboard_suppress_noise() function when the debounced
  814. * keyboard state changes. Some boards use this to send a signal to the audio
  815. * codec to suppress typing noise picked up by the microphone.
  816. */
  817. #undef CONFIG_KEYBOARD_SUPPRESS_NOISE
  818. /*
  819. * Enable keyboard testing functionality. This enables a message which receives
  820. * a list of keyscan events from the AP and processes them. This will cause
  821. * keypresses to appear on the AP through the same mechanism as a normal
  822. * keyboard press.
  823. *
  824. * This can be used to spoof keyboard events, so is not normally defined,
  825. * except during internal testing.
  826. */
  827. #undef CONFIG_KEYBOARD_TEST
  828. /*****************************************************************************/
  829. /* Support common LED interface */
  830. #undef CONFIG_LED_COMMON
  831. /* Standard LED behavior according to spec given that we have a red-green
  832. * bicolor led for charging and one power led
  833. */
  834. #undef CONFIG_LED_POLICY_STD
  835. /*
  836. * LEDs for LED_POLICY STD may be inverted. In this case they are active low
  837. * and the GPIO names will be GPIO_LED..._L.
  838. */
  839. #undef CONFIG_LED_BAT_ACTIVE_LOW
  840. #undef CONFIG_LED_POWER_ACTIVE_LOW
  841. /* Support for LED driver chip(s) */
  842. #undef CONFIG_LED_DRIVER_DS2413 /* Maxim DS2413, on one-wire interface */
  843. #undef CONFIG_LED_DRIVER_LP5562 /* LP5562, on I2C interface */
  844. /* Offset in flash where little firmware will live. */
  845. #undef CONFIG_LFW_OFFSET
  846. /*
  847. * Compile lid switch support.
  848. *
  849. * This is enabled by default because all boards other than reference boards
  850. * are for laptops with lid switchs. Reference boards #undef it.
  851. */
  852. #define CONFIG_LID_SWITCH
  853. /*
  854. * Support for turning the lightbar power rails on briefly when the AP is off.
  855. * Enabling this requires implementing the board-specific lb_power() function
  856. * to do it (see lb_common.h).
  857. */
  858. #undef CONFIG_LIGHTBAR_POWER_RAILS
  859. /*
  860. * For tap sequence, show the last segment in dim to give a better idea of
  861. * battery percentage.
  862. */
  863. #undef CONFIG_LIGHTBAR_TAP_DIM_LAST_SEGMENT
  864. /* Program memory offset for little firmware loader. */
  865. #undef CONFIG_LOADER_MEM_OFF
  866. /* Size of little firmware loader. */
  867. #undef CONFIG_LOADER_SIZE
  868. /* Little firmware loader storage offset. */
  869. #undef CONFIG_LOADER_STORAGE_OFF
  870. /*
  871. * Low power idle options. These are disabled by default and all boards that
  872. * want to use low power idle must define it. When using the LFIOSC, the low
  873. * frequency clock will be used to conserve even more power when possible.
  874. *
  875. * GPIOs which need to trigger interrupts in low power idle must specify the
  876. * GPIO_INT_DSLEEP flag in gpio_list[].
  877. *
  878. * Note that for some processors (e.g. LM4), an active JTAG connection will
  879. * prevent the EC from using low-power idle.
  880. */
  881. #undef CONFIG_LOW_POWER_IDLE
  882. #undef CONFIG_LOW_POWER_USE_LFIOSC
  883. /*
  884. * Enable deep sleep during S0 (ignores SLEEP_MASK_AP_RUN).
  885. */
  886. #undef CONFIG_LOW_POWER_S0
  887. /* Support LPC interface */
  888. #undef CONFIG_LPC
  889. /* Base address of low power RAM. */
  890. #undef CONFIG_LPRAM_BASE
  891. /* Size of low power RAM. */
  892. #undef CONFIG_LPRAM_SIZE
  893. /* Use Link-Time Optimizations to try to reduce the firmware code size */
  894. #undef CONFIG_LTO
  895. /* Presence of a Bosh Sensortec BMM150 magnetometer behind a BMI160. */
  896. #undef CONFIG_MAG_BMI160_BMM150
  897. /* Microchip EC SRAM start address */
  898. #undef CONFIG_MEC_SRAM_BASE_START
  899. /* Microchip EC SRAM end address */
  900. #undef CONFIG_MEC_SRAM_BASE_END
  901. /* Microchip EC SRAM size */
  902. #undef CONFIG_MEC_SRAM_SIZE
  903. /*
  904. * Define Megachips DisplayPort to HDMI protocol converter/level shifter serial
  905. * interface.
  906. */
  907. #undef CONFIG_MCDP28X0
  908. /* Define clock input to MFT module. */
  909. #undef CONFIG_MFT_INPUT_LFCLK
  910. /* Support MKBP event */
  911. #undef CONFIG_MKBP_EVENT
  912. /* Support memory protection unit (MPU) */
  913. #undef CONFIG_MPU
  914. /* Support one-wire interface */
  915. #undef CONFIG_ONEWIRE
  916. /* Support PECI interface to x86 processor */
  917. #undef CONFIG_PECI
  918. /*
  919. * Maximum operating temperature in degrees Celcius used on some x86
  920. * processors. CPU chip temperature is reported relative to this value and
  921. * is never reported greater than this value. Processor asserts PROCHOT#
  922. * and starts throttling frequency and voltage at this temp. Operation may
  923. * become unreliable if temperature exceeds this limit.
  924. */
  925. #undef CONFIG_PECI_TJMAX
  926. /*****************************************************************************/
  927. /* PMU config */
  928. /*
  929. * Enable hard-resetting the PMU from the EC. The implementation is rather
  930. * hacky; it simply shorts out the 3.3V rail to force the PMIC to panic. We
  931. * need this unfortunate hack because it's the only way to reset the I2C engine
  932. * inside the PMU.
  933. */
  934. #undef CONFIG_PMU_HARD_RESET
  935. /* Support TPS65090 PMU */
  936. #undef CONFIG_PMU_TPS65090
  937. /* Suport TPS65090 PMU charging LED. */
  938. #undef CONFIG_PMU_TPS65090_CHARGING_LED
  939. /*
  940. * Support PMU powerinfo host and console commands. Note that the
  941. * implementation is currently specific to the Pit board, so don't blindly
  942. * enable this for another board without fixing that first.
  943. */
  944. #undef CONFIG_PMU_POWERINFO
  945. /*****************************************************************************/
  946. /*
  947. * Enable polling at boot by port 80 task.
  948. * Ignored if port 80 is handled by interrupt
  949. */
  950. #undef CONFIG_PORT80_TASK_EN
  951. /*****************************************************************************/
  952. /* Compile common code to support power button debouncing */
  953. #undef CONFIG_POWER_BUTTON
  954. /* Force the active state of the power button : 0(default if unset) or 1 */
  955. #undef CONFIG_POWER_BUTTON_ACTIVE_STATE
  956. /* Allow the power button to send events while the lid is closed */
  957. #undef CONFIG_POWER_BUTTON_IGNORE_LID
  958. /* Support sending the power button signal to x86 chipsets */
  959. #undef CONFIG_POWER_BUTTON_X86
  960. /* Compile common code for AP power state machine */
  961. #undef CONFIG_POWER_COMMON
  962. /* Disable the power-on transition when the lid is opened */
  963. #undef CONFIG_POWER_IGNORE_LID_OPEN
  964. /* Support stopping in S5 on shutdown */
  965. #undef CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
  966. /* Use part of the EC's data EEPROM to hold persistent storage for the AP. */
  967. #undef CONFIG_PSTORE
  968. /*****************************************************************************/
  969. /* Support PWM control */
  970. #undef CONFIG_PWM
  971. /* Support PWM control while in low-power idle */
  972. #undef CONFIG_PWM_DSLEEP
  973. /* Define clock input to PWM module. */
  974. #undef CONFIG_PWM_INPUT_LFCLK
  975. /*****************************************************************************/
  976. /* Support PWM output to keyboard backlight */
  977. #undef CONFIG_PWM_KBLIGHT
  978. /* Base address of RAM for the chip */
  979. #undef CONFIG_RAM_BASE
  980. /* Base address of RAM for RO/RW. */
  981. #undef CONFIG_RAM_BASE_RORW
  982. /* Size of RAM available on the chip, in bytes */
  983. #undef CONFIG_RAM_SIZE
  984. /* Size of RAM for loader */
  985. #undef CONFIG_RAM_SIZE_LOADER
  986. /* Size of RAM for RO/RW */
  987. #undef CONFIG_RAM_SIZE_RORW
  988. /* Size of RAM for RO/RW & loader */
  989. #undef CONFIG_RAM_SIZE_TOTAL
  990. /* Support IR357x Link voltage regulator debugging / reprogramming */
  991. #undef CONFIG_REGULATOR_IR357X
  992. /* Support verifying 2048-bit RSA signature */
  993. #undef CONFIG_RSA
  994. /* Define the RSA key size. */
  995. #undef CONFIG_RSA_KEY_SIZE
  996. /* Flash address of the RO image. */
  997. #undef CONFIG_RO_IMAGE_FLASHADDR
  998. /* Flash address of the RW image. */
  999. #undef CONFIG_RW_IMAGE_FLASHADDR
  1000. /*
  1001. * Verify the RW firmware using the RSA signature.
  1002. * (for accessories without software sync)
  1003. */
  1004. #undef CONFIG_RWSIG
  1005. /*
  1006. * If defined, the hash module will save its last computed hash when jumping
  1007. * between EC images.
  1008. */
  1009. #undef CONFIG_SAVE_VBOOT_HASH
  1010. /* Enable smart battery firmware update driver */
  1011. #undef CONFIG_SB_FIRMWARE_UPDATE
  1012. /* Allow the board to use a GPIO for the SCI# signal. */
  1013. #undef CONFIG_SCI_GPIO
  1014. /* Support computing SHA-1 hash */
  1015. #undef CONFIG_SHA1
  1016. /* Support computing SHA-256 hash (without the VBOOT code) */
  1017. #undef CONFIG_SHA256
  1018. /* Emulate the CLZ (Count Leading Zeros) in software for CPU lacking support */
  1019. #undef CONFIG_SOFTWARE_CLZ
  1020. /* Support smbus interface */
  1021. #undef CONFIG_SMBUS
  1022. /* Support SPI interfaces */
  1023. #undef CONFIG_SPI
  1024. /* Define SPI chip select GPIO pin. */
  1025. #undef CONFIG_SPI_CS_GPIO
  1026. /* Support SPI flash */
  1027. #undef CONFIG_SPI_FLASH
  1028. /* Support W25Q64 SPI flash */
  1029. #undef CONFIG_SPI_FLASH_W25Q64
  1030. /* Support W25X40 SPI flash */
  1031. #undef CONFIG_SPI_FLASH_W25X40
  1032. /* SPI flash part supports SR2 register */
  1033. #undef CONFIG_SPI_FLASH_HAS_SR2
  1034. /* Size (bytes) of SPI flash memory */
  1035. #undef CONFIG_SPI_FLASH_SIZE
  1036. /* SPI module port used for master interface */
  1037. #undef CONFIG_SPI_MASTER_PORT
  1038. /* SPI module port. */
  1039. #undef CONFIG_SPI_PORT
  1040. /* Support testing SPI slave controller driver. */
  1041. #undef CONFIG_SPS_TEST
  1042. /* Default stack size to use for tasks, in bytes */
  1043. #undef CONFIG_STACK_SIZE
  1044. /* Use 32-bit timer for clock source on stm32. */
  1045. #undef CONFIG_STM_HWTIMER32
  1046. /* Fake hibernate mode */
  1047. #undef CONFIG_STM32L_FAKE_HIBERNATE
  1048. /*
  1049. * Compile common code to handle simple switch inputs such as the recovery
  1050. * button input from the servo debug interface.
  1051. */
  1052. #undef CONFIG_SWITCH
  1053. /* Support dedicated recovery signal from servo board */
  1054. #undef CONFIG_SWITCH_DEDICATED_RECOVERY
  1055. /*
  1056. * System should remain unlocked even if write protect is enabled.
  1057. *
  1058. * NOTE: This should ONLY be defined during bringup, and should never be
  1059. * defined on a shipping / released platform.
  1060. */
  1061. #undef CONFIG_SYSTEM_UNLOCKED
  1062. /*****************************************************************************/
  1063. /* Task config */
  1064. /*
  1065. * List of enabled tasks in ascending priority order. This is normally
  1066. * defined in each board's ec.tasklist file.
  1067. *
  1068. * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
  1069. * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
  1070. * where :
  1071. * 'n' is the name of the task
  1072. * 'r' is the main routine of the task
  1073. * 'd' is an opaque parameter passed to the routine at startup
  1074. * 's' is the stack size in bytes; must be a multiple of 8
  1075. */
  1076. #undef CONFIG_TASK_LIST
  1077. /*
  1078. * List of test tasks. Same format as CONFIG_TASK_LIST, but used to define
  1079. * additional tasks for a unit test. Normally defined in
  1080. * test/{testname}.tasklist.
  1081. */
  1082. #undef CONFIG_TEST_TASK_LIST
  1083. /*
  1084. * Enable task profiling.
  1085. *
  1086. * Boards may #undef this to reduce image size and RAM usage.
  1087. */
  1088. #define CONFIG_TASK_PROFILING
  1089. /*****************************************************************************/
  1090. /* Temperature sensor config */
  1091. /* Compile common code for temperature sensor support */
  1092. #undef CONFIG_TEMP_SENSOR
  1093. /* Support particular temperature sensor chips */
  1094. #undef CONFIG_TEMP_SENSOR_G781 /* G781 sensor, on I2C bus */
  1095. #undef CONFIG_TEMP_SENSOR_TMP006 /* TI TMP006 sensor, on I2C bus */
  1096. #undef CONFIG_TEMP_SENSOR_TMP432 /* TI TMP432 sensor, on I2C bus */
  1097. /*
  1098. * If defined, active-high GPIO which indicates temperature sensor chips are
  1099. * powered. If not defined, temperature sensors are assumed to be always
  1100. * powered.
  1101. */
  1102. #undef CONFIG_TEMP_SENSOR_POWER_GPIO
  1103. /*****************************************************************************/
  1104. /* USART stream config */
  1105. #undef CONFIG_STREAM_USART
  1106. /*
  1107. * Each USART stream can be individually enabled and accessible using the
  1108. * stream interface provided in the usart_config struct.
  1109. */
  1110. #undef CONFIG_STREAM_USART1
  1111. #undef CONFIG_STREAM_USART2
  1112. #undef CONFIG_STREAM_USART3
  1113. #undef CONFIG_STREAM_USART4
  1114. /*****************************************************************************/
  1115. /* USB stream config */
  1116. #undef CONFIG_STREAM_USB
  1117. /*****************************************************************************/
  1118. /* UART config */
  1119. /* Baud rate for UARTs */
  1120. #define CONFIG_UART_BAUD_RATE 115200
  1121. /* UART index (number) for EC console */
  1122. #undef CONFIG_UART_CONSOLE
  1123. /* UART index (number) for host UART, if present */
  1124. #undef CONFIG_UART_HOST
  1125. /* Use uart_input_filter() to filter UART input. See prototype in uart.h */
  1126. #undef CONFIG_UART_INPUT_FILTER
  1127. /*
  1128. * UART receive buffer size in bytes. Must be a power of 2 for macros in
  1129. * common/uart_buffering.c to work properly. Must be larger than
  1130. * CONFIG_CONSOLE_INPUT_LINE_SIZE to copy and paste scripts.
  1131. */
  1132. #define CONFIG_UART_RX_BUF_SIZE 128
  1133. /* Use DMA for UART input */
  1134. #undef CONFIG_UART_RX_DMA
  1135. /*
  1136. * On some platforms, UART receive DMA can't trigger an interrupt when a single
  1137. * character is received. Those platforms poll for characters every HOOK_TICK.
  1138. * When a character is received, make this many additional checks between then
  1139. * and the next HOOK_TICK, to increase responsiveness of the console to input.
  1140. */
  1141. #define CONFIG_UART_RX_DMA_RECHECKS 5
  1142. /*
  1143. * UART transmit buffer size in bytes. Must be a power of 2 for macros in
  1144. * common/uart_buffering.c to work properly.
  1145. */
  1146. #define CONFIG_UART_TX_BUF_SIZE 512
  1147. /* Use DMA for UART output */
  1148. #undef CONFIG_UART_TX_DMA
  1149. /* The DMA channel for UART. If not defined, default to UART1. */
  1150. #undef CONFIG_UART_TX_DMA_CH
  1151. #undef CONFIG_UART_RX_DMA_CH
  1152. /*****************************************************************************/
  1153. /* USB PD config */
  1154. /* Include all USB Power Delivery modules */
  1155. #undef CONFIG_USB_POWER_DELIVERY
  1156. /* Support for USB PD alternate mode */
  1157. #undef CONFIG_USB_PD_ALT_MODE
  1158. /* Support for USB PD alternate mode of Downward Facing Port */
  1159. #undef CONFIG_USB_PD_ALT_MODE_DFP
  1160. /* Check if max voltage request is allowed before each request */
  1161. #undef CONFIG_USB_PD_CHECK_MAX_REQUEST_ALLOWED
  1162. /* Default state of PD communication enabled flag */
  1163. #define CONFIG_USB_PD_COMM_ENABLED 1
  1164. /* Respond to custom vendor-defined messages over PD */
  1165. #undef CONFIG_USB_PD_CUSTOM_VDM
  1166. /* Default USB data role when a USB PD debug accessory is seen */
  1167. #define CONFIG_USB_PD_DEBUG_DR PD_ROLE_DFP
  1168. /* Define if this board can act as a dual-role PD port (source and sink) */
  1169. #undef CONFIG_USB_PD_DUAL_ROLE
  1170. /* Dynamic USB PD source capability */
  1171. #undef CONFIG_USB_PD_DYNAMIC_SRC_CAP
  1172. /* Support USB PD flash. */
  1173. #undef CONFIG_USB_PD_FLASH
  1174. /* Check whether PD is the sole power source before flash erase operation */
  1175. #undef CONFIG_USB_PD_FLASH_ERASE_CHECK
  1176. /* Major and Minor ChromeOS specific PD device Hardware IDs. */
  1177. #undef CONFIG_USB_PD_HW_DEV_ID_BOARD_MAJOR
  1178. #undef CONFIG_USB_PD_HW_DEV_ID_BOARD_MINOR
  1179. /* HW & SW version for alternate mode discover identity response (4bits each) */
  1180. #undef CONFIG_USB_PD_IDENTITY_HW_VERS
  1181. #undef CONFIG_USB_PD_IDENTITY_SW_VERS
  1182. /* USB PD MCU slave address for host commands */
  1183. #define CONFIG_USB_PD_I2C_SLAVE_ADDR 0x3c
  1184. /* Define if using internal comparator for PD receive */
  1185. #undef CONFIG_USB_PD_INTERNAL_COMP
  1186. /* Record main PD events in a circular buffer */
  1187. #undef CONFIG_USB_PD_LOGGING
  1188. /* The size in bytes of the FIFO used for PD events logging */
  1189. #undef CONFIG_USB_PD_LOG_SIZE
  1190. /* Define if USB-PD device has no way of detecting USB VBUS */
  1191. #undef CONFIG_USB_PD_NO_VBUS_DETECT
  1192. /* Number of USB PD ports */
  1193. #undef CONFIG_USB_PD_PORT_COUNT
  1194. /* Simple DFP, such as power adapter, will not send discovery VDM on connect */
  1195. #undef CONFIG_USB_PD_SIMPLE_DFP
  1196. /* Use comparator module for PD RX interrupt */
  1197. #define CONFIG_USB_PD_RX_COMP_IRQ
  1198. /* Use TCPC module (type-C port controller) */
  1199. #undef CONFIG_USB_PD_TCPC
  1200. /*
  1201. * Choose one of the following TCPMs (type-C port manager) to manage TCPC. The
  1202. * TCPM stub is used to make direct function calls to TCPC when TCPC is on
  1203. * the same MCU. The TCPCI TCPM uses the standard TCPCI i2c interface to TCPC.
  1204. */
  1205. #undef CONFIG_USB_PD_TCPM_STUB
  1206. #undef CONFIG_USB_PD_TCPM_TCPCI
  1207. /* Define the type-c port controller I2C base address. */
  1208. #undef CONFIG_TCPC_I2C_BASE_ADDR
  1209. /* Alternative configuration keeping only the TX part of PHY */
  1210. #undef CONFIG_USB_PD_TX_PHY_ONLY
  1211. /* Use DAC as reference for comparator at 850mV. */
  1212. #undef CONFIG_PD_USE_DAC_AS_REF
  1213. /* USB Product ID. */
  1214. #undef CONFIG_USB_PID
  1215. /* Support for USB type-c superspeed mux */
  1216. #undef CONFIG_USBC_SS_MUX
  1217. /*
  1218. * Only configure USB type-c superspeed mux when DFP (for chipsets that
  1219. * don't support being a UFP)
  1220. */
  1221. #undef CONFIG_USBC_SS_MUX_DFP_ONLY
  1222. /* Support v1.1 type-C connection state machine */
  1223. #undef CONFIG_USBC_BACKWARDS_COMPATIBLE_DFP
  1224. /* Support for USB type-c vconn. Not needed for captive cables. */
  1225. #undef CONFIG_USBC_VCONN
  1226. /* Support VCONN swap */
  1227. #undef CONFIG_USBC_VCONN_SWAP
  1228. /* USB Binary device Object Store support */
  1229. #undef CONFIG_USB_BOS
  1230. /* USB Device version of product */
  1231. #undef CONFIG_USB_BCD_DEV
  1232. /*****************************************************************************/
  1233. /* Compile chip support for the USB device controller */
  1234. #undef CONFIG_USB
  1235. /* Support USB blob handler. */
  1236. #undef CONFIG_USB_BLOB
  1237. /* Common USB / BC1.2 charger task */
  1238. #undef CONFIG_USB_CHARGER
  1239. /* Enable USB serial console module. */
  1240. #undef CONFIG_USB_CONSOLE
  1241. /* Support USB HID interface. */
  1242. #undef CONFIG_USB_HID
  1243. /* USB device buffers and descriptors */
  1244. #undef CONFIG_USB_RAM_ACCESS_SIZE
  1245. #undef CONFIG_USB_RAM_ACCESS_TYPE
  1246. #undef CONFIG_USB_RAM_BASE
  1247. #undef CONFIG_USB_RAM_SIZE
  1248. /* Disable automatic connection of USB peripheral */
  1249. #undef CONFIG_USB_INHIBIT_CONNECT
  1250. /* Disable automatic initialization of USB peripheral */
  1251. #undef CONFIG_USB_INHIBIT_INIT
  1252. /* Support simple control of power to the device's USB ports */
  1253. #undef CONFIG_USB_PORT_POWER_DUMB
  1254. /*
  1255. * Support supplying USB power in S3, if the host leaves the port enabled when
  1256. * entering S3.
  1257. */
  1258. #undef CONFIG_USB_PORT_POWER_IN_S3
  1259. /*
  1260. * Support smart power control to the device's USB ports, using
  1261. * dedicated power control chips. This potentially enables automatic
  1262. * negotiation of supplying more power to peripherals.
  1263. */
  1264. #undef CONFIG_USB_PORT_POWER_SMART
  1265. /*
  1266. * Override the default charging mode for USB smart power control.
  1267. * Value is selected from usb_charge_mode in include/usb_charge.h
  1268. */
  1269. #undef CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE
  1270. /*
  1271. * Smart USB power control can use a full set of control signals to the USB
  1272. * port power chip, or a reduced set. If this is defined, use the reduced set.
  1273. */
  1274. #undef CONFIG_USB_PORT_POWER_SMART_SIMPLE
  1275. /*
  1276. * Smart USB power control current limit pins may be inverted. In this case
  1277. * they are active low and the GPIO names will be GPIO_USBn_ILIM_SEL_L.
  1278. */
  1279. #undef CONFIG_USB_PORT_POWER_SMART_INVERTED
  1280. /******************************************************************************/
  1281. /* USB port switch */
  1282. /* 8-bit USB type-C switch I2C addresses */
  1283. #undef CONFIG_USB_SWITCH_I2C_ADDRS
  1284. /* Support the TSU6721 I2C smart switch */
  1285. #undef CONFIG_USB_SWITCH_TSU6721
  1286. /* Support the Pericom PI3USB9281 I2C USB switch */
  1287. #undef CONFIG_USB_SWITCH_PI3USB9281
  1288. /* Number of Pericom PI3USB9281 chips present in system */
  1289. #undef CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT
  1290. /* Support the Pericom PI3USB30532 USB3.0/DP1.2 Matrix Switch */
  1291. #undef CONFIG_USB_MUX_PI3USB30532
  1292. /* Support the Parade PS8740 Type-C Redriving Switch */
  1293. #undef CONFIG_USB_MUX_PS8740
  1294. /*****************************************************************************/
  1295. /* USB GPIO config */
  1296. #undef CONFIG_USB_GPIO
  1297. /*****************************************************************************/
  1298. /* USB SPI config */
  1299. #undef CONFIG_USB_SPI
  1300. /*****************************************************************************/
  1301. /* Support computing hash of code for verified boot */
  1302. #undef CONFIG_VBOOT_HASH
  1303. /******************************************************************************/
  1304. /* GPIO pin to wake from hibernate. */
  1305. #undef CONFIG_WAKE_PIN
  1306. /*****************************************************************************/
  1307. /* Watchdog config */
  1308. /*
  1309. * Compile watchdog timer support. The watchdog timer will reboot the system
  1310. * if the hook task (which is the lowest-priority task on the system) gets
  1311. * starved for CPU time and isn't able to fire its HOOK_TICK event.
  1312. */
  1313. #define CONFIG_WATCHDOG
  1314. /*
  1315. * Try to detect a watchdog that is about to fire, and print a trace. This is
  1316. * required on chips such as STM32 where the watchdog timer simply reboots the
  1317. * system without any early warning.
  1318. */
  1319. #undef CONFIG_WATCHDOG_HELP
  1320. /* Watchdog period in ms; see also AUX_TIMER_PERIOD_MS */
  1321. #define CONFIG_WATCHDOG_PERIOD_MS 1600
  1322. /*
  1323. * Fire auxiliary timer 500ms before watchdog timer expires. This leaves
  1324. * some time for debug trace to be printed.
  1325. */
  1326. #define CONFIG_AUX_TIMER_PERIOD_MS (CONFIG_WATCHDOG_PERIOD_MS - 500)
  1327. /*****************************************************************************/
  1328. /*
  1329. * Support controlling power to WiFi, WWAN (3G/LTE), and/or bluetooth modules.
  1330. */
  1331. #undef CONFIG_WIRELESS
  1332. /*
  1333. * Support for WiFi devices that must remain powered in suspend. Set to the
  1334. * combination of EC_WIRELESS_SWITCH flags (from ec_commands.h) which should
  1335. * be set in suspend.
  1336. */
  1337. #undef CONFIG_WIRELESS_SUSPEND
  1338. /*
  1339. * Write protect signal is active-high. If this is defined, there must be a
  1340. * GPIO named GPIO_WP; if not defined, there must be a GPIO names GPIO_WP_L.
  1341. */
  1342. #undef CONFIG_WP_ACTIVE_HIGH
  1343. /*
  1344. * The write protect signal is always asserted,
  1345. * independantly of the GPIO existence or current value.
  1346. */
  1347. #undef CONFIG_WP_ALWAYS
  1348. /*****************************************************************************/
  1349. /*
  1350. * Include board and core configs, since those hold the CONFIG_ constants for a
  1351. * given configuration. This guarantees they get included everywhere, and
  1352. * fixes a fairly common bug where we gate out code with #ifndef
  1353. * CONFIG_SOMETHING and but forget to include both of these.
  1354. *
  1355. * Board is included after chip, so that chip defaults can be overridden on a
  1356. * per-board basis as needed.
  1357. */
  1358. #ifdef __CROS_EC_CONFIG_CHIP_H
  1359. #error Include config.h instead of config_chip.h!
  1360. #endif
  1361. #ifdef __BOARD_H
  1362. #error Include config.h instead of board.h!
  1363. #endif
  1364. #include "config_chip.h"
  1365. #include "board.h"
  1366. /*****************************************************************************/
  1367. /*
  1368. * Handle task-dependent configs.
  1369. *
  1370. * This prevent sub-modules from being compiled when the task and parent module
  1371. * are not present.
  1372. */
  1373. #ifndef HAS_TASK_CHIPSET
  1374. #undef CONFIG_CHIPSET_BAYTRAIL
  1375. #undef CONFIG_CHIPSET_BRASWELL
  1376. #undef CONFIG_CHIPSET_GAIA
  1377. #undef CONFIG_CHIPSET_HASWELL
  1378. #undef CONFIG_CHIPSET_MEDIATEK
  1379. #undef CONFIG_CHIPSET_ROCKCHIP
  1380. #undef CONFIG_CHIPSET_TEGRA
  1381. #undef CONFIG_POWER_COMMON
  1382. #endif
  1383. #ifndef HAS_TASK_KEYPROTO
  1384. #undef CONFIG_KEYBOARD_PROTOCOL_8042
  1385. /*
  1386. * Note that we don't undef CONFIG_KEYBOARD_PROTOCOL_MKBP, because it doesn't
  1387. * have its own task.
  1388. */
  1389. #endif
  1390. #ifndef HAS_TASK_KEYSCAN
  1391. #undef CONFIG_KEYBOARD_PROTOCOL_8042
  1392. #undef CONFIG_KEYBOARD_PROTOCOL_MKBP
  1393. #endif
  1394. /*****************************************************************************/
  1395. /*
  1396. * Apply test config overrides last, since tests need to override some of the
  1397. * config flags in non-standard ways to mock only parts of the system.
  1398. */
  1399. #include "test_config.h"
  1400. /*****************************************************************************/
  1401. /*
  1402. * Sanity checks to make sure some of the configs above make sense.
  1403. */
  1404. #if (CONFIG_AUX_TIMER_PERIOD_MS) < ((HOOK_TICK_INTERVAL_MS) * 2)
  1405. #error "CONFIG_AUX_TIMER_PERIOD_MS must be at least 2x HOOK_TICK_INTERVAL_MS"
  1406. #endif
  1407. #endif /* __CROS_EC_CONFIG_H */