mosys: add support for JEDEC ID code for LPDDR3

The Kohaku SPDs use the JEDEC-standard memory type ID for LPDDR3,
which is 0x0F, instead of the pre-spec ID of 0xF1. Update the
ID list to include the JEDEC code, and then add it as an
alternative where we're using the pre-spec value.

BUG=b:132818542
BRANCH=none
TEST=build and install mosys on a Kohaku unit and verify that
'mosys -k memory spd print all' prints the correct information
about the memory installed.

Change-Id: I34795deb3db8394e80de1e36f70e44500fe2b651
Reviewed-on: https://chromium-review.googlesource.com/1617841
Commit-Ready: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: Paul Fagerburg <pfagerburg@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
diff --git a/include/lib/smbios_tables.h b/include/lib/smbios_tables.h
index 8c9ec30..6ab9b11 100644
--- a/include/lib/smbios_tables.h
+++ b/include/lib/smbios_tables.h
@@ -246,7 +246,7 @@
 	uint8_t serial_number;			/* string */
 	uint8_t asset_tag;			/* string */
 	uint8_t part_number;			/* string */
-        uint8_t attributes;			/* number of rank in dimm */
+	uint8_t attributes;			/* number of rank in dimm */
 } __attribute__ ((packed));
 
 /* memory device types */
@@ -273,6 +273,7 @@
 	SMBIOS_MEMORY_TYPE_DDR2_FBDIMM = 0x14,
 	SMBIOS_MEMORY_TYPE_DDR3 = 0x18,
 	SMBIOS_MEMORY_TYPE_DDR4 = 0x1A,
+	SMBIOS_MEMORY_TYPE_LPDDR3 = 0x1D,
 	SMBIOS_MEMORY_TYPE_LPDDR4 = 0x1E,
 };
 
diff --git a/include/lib/spd.h b/include/lib/spd.h
index ca4eaf8..8977fbe 100644
--- a/include/lib/spd.h
+++ b/include/lib/spd.h
@@ -68,6 +68,7 @@
 	SPD_DRAM_TYPE_FBDIMM	= 0x09,
 	SPD_DRAM_TYPE_DDR3	= 0x0b,
 	SPD_DRAM_TYPE_LPDDR3	= 0xf1,
+	SPD_DRAM_TYPE_JEDEC_LPDDR3 = 0x0f,
 	SPD_DRAM_TYPE_DDR4      = 0x0c,
 	SPD_DRAM_TYPE_LPDDR4	= 0x10,
 	SPD_DRAM_TYPE_LPDDR4X	= 0x11,
diff --git a/lib/spd/nonspd.c b/lib/spd/nonspd.c
index bfc3fec..647be09 100644
--- a/lib/spd/nonspd.c
+++ b/lib/spd/nonspd.c
@@ -83,6 +83,7 @@
 		case SPD_DRAM_TYPE_DDR4:
 			kv_pair_add(kv, "dram", "DDR4");
 			break;
+		case SPD_DRAM_TYPE_JEDEC_LPDDR3:
 		case SPD_DRAM_TYPE_LPDDR3:
 			kv_pair_add(kv, "dram", "LPDDR3");
 			break;
@@ -102,6 +103,7 @@
 		switch (info->dram_type) {
 		case SPD_DRAM_TYPE_DDR3:
 		case SPD_DRAM_TYPE_LPDDR3:
+		case SPD_DRAM_TYPE_JEDEC_LPDDR3:
 			kv_pair_add(kv, "module",
 			            val2str(info->module_type.ddr3_type,
 					    ddr3_module_type_lut));
@@ -246,6 +248,7 @@
 				string_builder_strcat(speeds, "DDR4-");
 				break;
 			case SPD_DRAM_TYPE_LPDDR3:
+			case SPD_DRAM_TYPE_JEDEC_LPDDR3:
 				string_builder_strcat(speeds, "LPDDR3-");
 				break;
 			case SPD_DRAM_TYPE_LPDDR4:
diff --git a/lib/spd/nonspd_modules.c b/lib/spd/nonspd_modules.c
index 45082fd..f6abd45 100644
--- a/lib/spd/nonspd_modules.c
+++ b/lib/spd/nonspd_modules.c
@@ -896,6 +896,8 @@
 		return SPD_DRAM_TYPE_DDR3;
 	case SMBIOS_MEMORY_TYPE_DDR4:
 		return SPD_DRAM_TYPE_DDR4;
+	case SMBIOS_MEMORY_TYPE_LPDDR3:
+		return SPD_DRAM_TYPE_LPDDR3;
 	case SMBIOS_MEMORY_TYPE_LPDDR4:
 		return SPD_DRAM_TYPE_LPDDR4;
 	default: