spd: Update spd handling to support DDR4
SPD reading from CBFS assumed that the SPD binary size is always
256. However, this is not true for DDR4 memory type which has a size
of 512 bytes. Additionally, the part number for DDR4 memory is located
at a different offset.
This change updates the SPD handling code to take into account
differences in SPD length and part number offset.
BUG=b:72749394
BRANCH=None
TEST=Verified that "mosys -k memory spd print all" prints correct SPD
info on nami.
Change-Id: I738b46fca2e5dbe0f6f4cc309f33cb9baa20fa20
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/897740
Reviewed-by: Shelley Chen <shchen@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
4 files changed
