mosys: Add LPDDR3 SPD type 0xF1

This may not be official because JEDEC does not seem to have
ever published an SPD annex for LPDDR3 but it is what Intel uses.

BUG=chrome-os-partner:23449
BRANCH=samus
TEST=emerge-samus mosys

Original-Change-Id: If0dfff0f55a2587fb9e1752aef0695facf2aedd9
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173824
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit b4f2ce68f436594d4125897ed84661bf5e98bec2)

Change-Id: I7bf5d726a505e41129aa3030369a54762439a27b
Reviewed-on: https://chromium-review.googlesource.com/174410
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
2 files changed