| commit | 4cf416a1597da20b19a1cdbe5f5b6104bb6ffa07 | [log] [tgz] |
|---|---|---|
| author | Dilan Lee <dilee@nvidia.com> | Thu May 12 05:22:08 2011 |
| committer | Simon Glass <sjg@chromium.org> | Sat May 21 04:41:18 2011 |
| tree | 43ff890f5c07201ca8f93394be62615124e50fa0 | |
| parent | a80a3ff0d4e8c8444a7ded3595aa1eb189b478e1 [diff] |
Tegra2: Correct the power-on sequence of AUO panel for Aebl The LCD power-on sequence has to match AUO panel timing specification to avoid display noise on Aebl BUG=chrome-os-partner:2699 TEST=test on Aebl, No garbage during power-on Change-Id: I4f59d1768da3ebbb40661ac0d369582e8101ebc1 Signed-off-by: Dilan Lee <dilee@nvidia.com> Reviewed-on: http://gerrit.chromium.org/gerrit/749 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>