| commit | 8c8efa862084018ab60ddb23d26157900ed65db4 | [log] [tgz] |
|---|---|---|
| author | Manish Pandey <manish.pandey2@arm.com> | Fri Mar 05 09:14:03 2021 |
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Fri Mar 05 09:14:03 2021 |
| tree | e752f493b5a5d1c3122db472bf48639f8af4ed28 | |
| parent | 42de214f8fa0d05ff85caca32f3a3c2dd5360a66 [diff] | |
| parent | 612b4a3f2d2929b6b8fd9dd211c8488050e10183 [diff] |
Merge changes I76eee5c5,Ie45ab1d8,Iddcb83d3,I4425777d,I5be2837c, ... into integration * changes: drivers/gicv3: also shift eSPI register offset in GICD_OFFSET_64() drivers/gicv3: add debug log for maximum INTID of SPI and eSPI drivers/gicv3: limit SPI ID to avoid misjudgement in GICD_OFFSET() drivers/gicv3: fix logical issue for num_eints drivers/gicv3: fix potential GICD context override with ESPI enabled drivers/gicv3: use mpidr to probe GICR for current CPU