Merge pull request #1097 from davidcunado-arm/dc/reset_bl31
plat/arm: Fix BL31_BASE when RESET_TO_BL31=1
diff --git a/docs/user-guide.rst b/docs/user-guide.rst
index f66bde3..1ff080d 100644
--- a/docs/user-guide.rst
+++ b/docs/user-guide.rst
@@ -1593,15 +1593,15 @@
-C cluster0.NUM_CORES=4 \
-C cluster1.NUM_CORES=4 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBAR=0x04023000 \
- -C cluster0.cpu1.RVBAR=0x04023000 \
- -C cluster0.cpu2.RVBAR=0x04023000 \
- -C cluster0.cpu3.RVBAR=0x04023000 \
- -C cluster1.cpu0.RVBAR=0x04023000 \
- -C cluster1.cpu1.RVBAR=0x04023000 \
- -C cluster1.cpu2.RVBAR=0x04023000 \
- -C cluster1.cpu3.RVBAR=0x04023000 \
- --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \
+ -C cluster0.cpu0.RVBAR=0x04020000 \
+ -C cluster0.cpu1.RVBAR=0x04020000 \
+ -C cluster0.cpu2.RVBAR=0x04020000 \
+ -C cluster0.cpu3.RVBAR=0x04020000 \
+ -C cluster1.cpu0.RVBAR=0x04020000 \
+ -C cluster1.cpu1.RVBAR=0x04020000 \
+ -C cluster1.cpu2.RVBAR=0x04020000 \
+ -C cluster1.cpu3.RVBAR=0x04020000 \
+ --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04020000 \
--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
@@ -1678,15 +1678,15 @@
-C bp.secure_memory=1 \
-C bp.tzc_400.diagnostics=1 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBARADDR=0x04023000 \
- -C cluster0.cpu1.RVBARADDR=0x04023000 \
- -C cluster0.cpu2.RVBARADDR=0x04023000 \
- -C cluster0.cpu3.RVBARADDR=0x04023000 \
- -C cluster1.cpu0.RVBARADDR=0x04023000 \
- -C cluster1.cpu1.RVBARADDR=0x04023000 \
- -C cluster1.cpu2.RVBARADDR=0x04023000 \
- -C cluster1.cpu3.RVBARADDR=0x04023000 \
- --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \
+ -C cluster0.cpu0.RVBARADDR=0x04020000 \
+ -C cluster0.cpu1.RVBARADDR=0x04020000 \
+ -C cluster0.cpu2.RVBARADDR=0x04020000 \
+ -C cluster0.cpu3.RVBARADDR=0x04020000 \
+ -C cluster1.cpu0.RVBARADDR=0x04020000 \
+ -C cluster1.cpu1.RVBARADDR=0x04020000 \
+ -C cluster1.cpu2.RVBARADDR=0x04020000 \
+ -C cluster1.cpu3.RVBARADDR=0x04020000 \
+ --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04020000 \
--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index efc276c..787ccb0 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -292,6 +292,13 @@
#define BL31_BASE ARM_AP_TZC_DRAM1_BASE
#define BL31_LIMIT (ARM_AP_TZC_DRAM1_BASE + \
PLAT_ARM_MAX_BL31_SIZE)
+#elif (RESET_TO_BL31)
+/*
+ * Put BL31_BASE in the middle of the Trusted SRAM.
+ */
+#define BL31_BASE (ARM_TRUSTED_SRAM_BASE + \
+ (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1))
+#define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
#else
/*
* Put BL31 at the top of the Trusted SRAM.
