UPSTREAM: mb/google: Remove blank lines before '}' and after '{'
(cherry picked from commit c55765d6818534236338539101630448f00d1595)
Original-Change-Id: If68303cd59b287c8a5c982063b2ab75fd74898d6
Original-Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/81477
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Eric Lai <ericllai@google.com>
Original-Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Original-Reviewed-by: Jakub Czapiga <czapiga@google.com>
GitOrigin-RevId: c55765d6818534236338539101630448f00d1595
Change-Id: I34ca1b5c3edb970a5d4be2b9dcd677d3c0f24fc4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/5408874
Commit-Queue: Kangheui Won <khwon@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: ChromeOS Prod (Robot) <chromeos-ci-prod@chromeos-bot.iam.gserviceaccount.com>
diff --git a/src/mainboard/google/brox/mainboard.c b/src/mainboard/google/brox/mainboard.c
index 5820805..9285ae2 100644
--- a/src/mainboard/google/brox/mainboard.c
+++ b/src/mainboard/google/brox/mainboard.c
@@ -191,7 +191,6 @@
mainboard_generate_s0ix_hook();
acpigen_write_method_end(); /* Method */
acpigen_write_scope_end(); /* Scope */
-
}
void __weak variant_fill_ssdt(const struct device *dev)
diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c
index 9cf56b2..07aa4b5 100644
--- a/src/mainboard/google/brya/mainboard.c
+++ b/src/mainboard/google/brya/mainboard.c
@@ -191,7 +191,6 @@
mainboard_generate_s0ix_hook();
acpigen_write_method_end(); /* Method */
acpigen_write_scope_end(); /* Scope */
-
}
void __weak variant_fill_ssdt(const struct device *dev)
diff --git a/src/mainboard/google/brya/variants/aurash/fw_config.c b/src/mainboard/google/brya/variants/aurash/fw_config.c
index 5302923..4491781 100644
--- a/src/mainboard/google/brya/variants/aurash/fw_config.c
+++ b/src/mainboard/google/brya/variants/aurash/fw_config.c
@@ -39,6 +39,5 @@
printk(BIOS_INFO, "BT offload enabled over I2S with NAU88L25B\n");
gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
}
-
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
diff --git a/src/mainboard/google/brya/variants/brask/fw_config.c b/src/mainboard/google/brya/variants/brask/fw_config.c
index 5302923..4491781 100644
--- a/src/mainboard/google/brya/variants/brask/fw_config.c
+++ b/src/mainboard/google/brya/variants/brask/fw_config.c
@@ -39,6 +39,5 @@
printk(BIOS_INFO, "BT offload enabled over I2S with NAU88L25B\n");
gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
}
-
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
diff --git a/src/mainboard/google/brya/variants/felwinter/fw_config.c b/src/mainboard/google/brya/variants/felwinter/fw_config.c
index 2a89c94..584c9a5 100644
--- a/src/mainboard/google/brya/variants/felwinter/fw_config.c
+++ b/src/mainboard/google/brya/variants/felwinter/fw_config.c
@@ -40,6 +40,5 @@
printk(BIOS_INFO, "BT offload enabled over I2S with MAX98360+RT5682VS\n");
gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
}
-
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
diff --git a/src/mainboard/google/brya/variants/moli/fw_config.c b/src/mainboard/google/brya/variants/moli/fw_config.c
index 5302923..4491781 100644
--- a/src/mainboard/google/brya/variants/moli/fw_config.c
+++ b/src/mainboard/google/brya/variants/moli/fw_config.c
@@ -39,6 +39,5 @@
printk(BIOS_INFO, "BT offload enabled over I2S with NAU88L25B\n");
gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
}
-
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
diff --git a/src/mainboard/google/brya/variants/volmar/variant.c b/src/mainboard/google/brya/variants/volmar/variant.c
index d1ef1fa..1521fea 100644
--- a/src/mainboard/google/brya/variants/volmar/variant.c
+++ b/src/mainboard/google/brya/variants/volmar/variant.c
@@ -17,5 +17,4 @@
if (fw_config_probe(FW_CONFIG(FPMCU_MASK, FPMCU_DISABLED)))
config->serial_io_gspi_mode[PchSerialIoIndexGSPI1] = PchSerialIoDisabled;
-
}
diff --git a/src/mainboard/google/brya/variants/xivu/fw_config.c b/src/mainboard/google/brya/variants/xivu/fw_config.c
index 9008b95..f292404 100644
--- a/src/mainboard/google/brya/variants/xivu/fw_config.c
+++ b/src/mainboard/google/brya/variants/xivu/fw_config.c
@@ -24,5 +24,4 @@
gpio_padbased_override(padbased_table, wfc_disable_pads,
ARRAY_SIZE(wfc_disable_pads));
}
-
}
diff --git a/src/mainboard/google/brya/variants/xol/gpio.c b/src/mainboard/google/brya/variants/xol/gpio.c
index 3a92b8e..13fd10d 100644
--- a/src/mainboard/google/brya/variants/xol/gpio.c
+++ b/src/mainboard/google/brya/variants/xol/gpio.c
@@ -221,7 +221,6 @@
{
*num = ARRAY_SIZE(gpio_overrides);
return gpio_overrides;
-
}
const struct pad_config *variant_early_gpio_table(size_t *num)
diff --git a/src/mainboard/google/butterfly/ec.c b/src/mainboard/google/butterfly/ec.c
index 4e5e422..b979bf5 100644
--- a/src/mainboard/google/butterfly/ec.c
+++ b/src/mainboard/google/butterfly/ec.c
@@ -18,5 +18,4 @@
/* Disable wake on USB, LAN & RTC */
/* Enable Wake from Keyboard */
ec_mem_write(EC_EC_PSW, EC_PSW_IKB);
-
}
diff --git a/src/mainboard/google/butterfly/mainboard.c b/src/mainboard/google/butterfly/mainboard.c
index 988c210..a574d38 100644
--- a/src/mainboard/google/butterfly/mainboard.c
+++ b/src/mainboard/google/butterfly/mainboard.c
@@ -126,7 +126,6 @@
char kbd_type = EC_KBD_EN; /* Default keyboard type is English */
if (search_length != -1) {
-
/*
* Search for keyboard_layout identifier
* The only options in the EC are Japanese or English.
diff --git a/src/mainboard/google/cherry/chromeos.c b/src/mainboard/google/cherry/chromeos.c
index 4a93ae2..7838c5e 100644
--- a/src/mainboard/google/cherry/chromeos.c
+++ b/src/mainboard/google/cherry/chromeos.c
@@ -21,7 +21,6 @@
gpio_output(GPIO_BEEP_ON, 0);
else if (CONFIG(CHERRY_USE_RT1011))
gpio_output(GPIO_RST_RT1011, 0);
-
}
void fill_lb_gpios(struct lb_gpios *gpios)
diff --git a/src/mainboard/google/cherry/regulator.c b/src/mainboard/google/cherry/regulator.c
index 61f53d1..83ba9ed 100644
--- a/src/mainboard/google/cherry/regulator.c
+++ b/src/mainboard/google/cherry/regulator.c
@@ -174,7 +174,6 @@
}
return !!enabled;
}
-
}
printk(BIOS_ERR, "Invalid regulator ID: %d\n; assuming disabled", regulator);
diff --git a/src/mainboard/google/cyan/variants/banon/romstage.c b/src/mainboard/google/cyan/variants/banon/romstage.c
index 7dcf622..a711e19 100644
--- a/src/mainboard/google/cyan/variants/banon/romstage.c
+++ b/src/mainboard/google/cyan/variants/banon/romstage.c
@@ -13,7 +13,6 @@
* RAMID = 12 - 2GiB Micron MT52L256M32D1PF
*/
if (ram_id == 4 || ram_id == 12) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.
diff --git a/src/mainboard/google/cyan/variants/celes/ramstage.c b/src/mainboard/google/cyan/variants/celes/ramstage.c
index a126a48..a287838 100644
--- a/src/mainboard/google/cyan/variants/celes/ramstage.c
+++ b/src/mainboard/google/cyan/variants/celes/ramstage.c
@@ -5,7 +5,6 @@
void board_silicon_USB2_override(SILICON_INIT_UPD *params)
{
if (SocStepping() >= SocD0) {
-
//Follow Intel recommendation to set
//BSW D-stepping PERPORTRXISET 2 (low strength)
params->Usb2Port0PerPortPeTxiSet = 7;
diff --git a/src/mainboard/google/cyan/variants/edgar/romstage.c b/src/mainboard/google/cyan/variants/edgar/romstage.c
index 7b1d8cc..af55b8a 100644
--- a/src/mainboard/google/cyan/variants/edgar/romstage.c
+++ b/src/mainboard/google/cyan/variants/edgar/romstage.c
@@ -13,7 +13,6 @@
* RAMID = 7 - 2GiB Micron MT52L256M32D1PF-107
*/
if (ram_id == 5 || ram_id == 7) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.
diff --git a/src/mainboard/google/cyan/variants/kefka/ramstage.c b/src/mainboard/google/cyan/variants/kefka/ramstage.c
index e1fd33a..96d53c2 100644
--- a/src/mainboard/google/cyan/variants/kefka/ramstage.c
+++ b/src/mainboard/google/cyan/variants/kefka/ramstage.c
@@ -5,7 +5,6 @@
void board_silicon_USB2_override(SILICON_INIT_UPD *params)
{
if (SocStepping() >= SocD0) {
-
//Follow Intel recommendation to set
//BSW D-stepping PERPORTRXISET 2 (low strength)
params->D0Usb2Port0PerPortRXISet = 2;
diff --git a/src/mainboard/google/cyan/variants/kefka/romstage.c b/src/mainboard/google/cyan/variants/kefka/romstage.c
index 9492b84..d5e8883 100644
--- a/src/mainboard/google/cyan/variants/kefka/romstage.c
+++ b/src/mainboard/google/cyan/variants/kefka/romstage.c
@@ -13,7 +13,6 @@
* RAMID = 3 - 2GiB Micron MT52L256M32D1PF-107
*/
if (ram_id == 2 || ram_id == 3) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.
diff --git a/src/mainboard/google/cyan/variants/reks/romstage.c b/src/mainboard/google/cyan/variants/reks/romstage.c
index c8fd30b..4b817e5 100644
--- a/src/mainboard/google/cyan/variants/reks/romstage.c
+++ b/src/mainboard/google/cyan/variants/reks/romstage.c
@@ -13,7 +13,6 @@
* RAMID = 2 - 2GiB Micron MT52L256M32D1PF-107
*/
if (ram_id == 2 || ram_id == 0xA) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.
diff --git a/src/mainboard/google/cyan/variants/relm/romstage.c b/src/mainboard/google/cyan/variants/relm/romstage.c
index c8fd30b..4b817e5 100644
--- a/src/mainboard/google/cyan/variants/relm/romstage.c
+++ b/src/mainboard/google/cyan/variants/relm/romstage.c
@@ -13,7 +13,6 @@
* RAMID = 2 - 2GiB Micron MT52L256M32D1PF-107
*/
if (ram_id == 2 || ram_id == 0xA) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.
diff --git a/src/mainboard/google/cyan/variants/setzer/romstage.c b/src/mainboard/google/cyan/variants/setzer/romstage.c
index e8c3c1c..21e1569 100644
--- a/src/mainboard/google/cyan/variants/setzer/romstage.c
+++ b/src/mainboard/google/cyan/variants/setzer/romstage.c
@@ -13,7 +13,6 @@
* RAMID = 5 - 2GiB Micron MT52L256M32D1PF-107
*/
if (ram_id == 4 || ram_id == 5) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.
diff --git a/src/mainboard/google/cyan/variants/terra/romstage.c b/src/mainboard/google/cyan/variants/terra/romstage.c
index 5bdd7fe..531f1ea 100644
--- a/src/mainboard/google/cyan/variants/terra/romstage.c
+++ b/src/mainboard/google/cyan/variants/terra/romstage.c
@@ -13,7 +13,6 @@
* RAMID = 11 - 4GiB Micron MT52L256M32D1PF-107
*/
if (ram_id == 3 || ram_id == 11) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.
diff --git a/src/mainboard/google/cyan/variants/ultima/gpio.c b/src/mainboard/google/cyan/variants/ultima/gpio.c
index ede6229..13cc639 100644
--- a/src/mainboard/google/cyan/variants/ultima/gpio.c
+++ b/src/mainboard/google/cyan/variants/ultima/gpio.c
@@ -237,5 +237,4 @@
struct soc_gpio_config *mainboard_get_gpios(void)
{
return &gpio_config;
-
}
diff --git a/src/mainboard/google/dedede/mainboard.c b/src/mainboard/google/dedede/mainboard.c
index b381d98..aae4155 100644
--- a/src/mainboard/google/dedede/mainboard.c
+++ b/src/mainboard/google/dedede/mainboard.c
@@ -128,18 +128,15 @@
static void mainboard_fill_ssdt(const struct device *dev)
{
-
acpigen_write_scope("\\_SB");
acpigen_write_method_serialized("MS0X", 1);
mainboard_generate_s0ix_hook();
acpigen_write_method_end(); /* Method */
acpigen_write_scope_end(); /* Scope */
-
}
void __weak variant_generate_s0ix_hook(enum s0ix_entry entry)
{
-
/* Add board-specific MS0X entries */
/*
if (s0ix_entry == S0IX_ENTRY) {
diff --git a/src/mainboard/google/dedede/variants/baseboard/memory.c b/src/mainboard/google/dedede/variants/baseboard/memory.c
index aa52636..da8439a 100644
--- a/src/mainboard/google/dedede/variants/baseboard/memory.c
+++ b/src/mainboard/google/dedede/variants/baseboard/memory.c
@@ -7,7 +7,6 @@
#include <soc/romstage.h>
static const struct mb_cfg baseboard_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/google/dedede/variants/beadrix/memory.c b/src/mainboard/google/dedede/variants/beadrix/memory.c
index bfef45b..d80832d 100644
--- a/src/mainboard/google/dedede/variants/beadrix/memory.c
+++ b/src/mainboard/google/dedede/variants/beadrix/memory.c
@@ -7,7 +7,6 @@
#include <soc/romstage.h>
static const struct mb_cfg board_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/google/dedede/variants/drawcia/gpio.c b/src/mainboard/google/dedede/variants/drawcia/gpio.c
index fa4d4d5..d42b38e 100644
--- a/src/mainboard/google/dedede/variants/drawcia/gpio.c
+++ b/src/mainboard/google/dedede/variants/drawcia/gpio.c
@@ -9,14 +9,12 @@
/* Pad configuration in ramstage */
static const struct pad_config not_board6or8_gpio_table[] = {
-
/* C12 : AP_PEN_DET_ODL */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, UP_20K, DEEP),
};
/* bid6: Pad configuration for board version 6 or 8 in ramstage */
static const struct pad_config board6or8_gpio_table[] = {
-
/* A10 : WWAN_EN */
PAD_CFG_GPO(GPP_A10, 1, PWROK),
diff --git a/src/mainboard/google/dedede/variants/drawcia/variant.c b/src/mainboard/google/dedede/variants/drawcia/variant.c
index 9077bae..5f85f6a 100644
--- a/src/mainboard/google/dedede/variants/drawcia/variant.c
+++ b/src/mainboard/google/dedede/variants/drawcia/variant.c
@@ -19,7 +19,6 @@
uint32_t sku_id = google_chromeec_get_board_sku();
if (fw_config_probe(FW_CONFIG(TABLETMODE, TABLETMODE_ENABLED))) {
-
if (sku_id >= OSCINO_SKU_START && sku_id <= OSCINO_SKU_END)
return "wifi_sar-oscino.hex";
else
diff --git a/src/mainboard/google/dedede/variants/galtic/gpio.c b/src/mainboard/google/dedede/variants/galtic/gpio.c
index e2e6669..d92bdf5 100644
--- a/src/mainboard/google/dedede/variants/galtic/gpio.c
+++ b/src/mainboard/google/dedede/variants/galtic/gpio.c
@@ -5,7 +5,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* A11 : TOUCH_RPT_EN */
PAD_NC(GPP_A11, NONE),
diff --git a/src/mainboard/google/dedede/variants/pirika/gpio.c b/src/mainboard/google/dedede/variants/pirika/gpio.c
index e2e6669..d92bdf5 100644
--- a/src/mainboard/google/dedede/variants/pirika/gpio.c
+++ b/src/mainboard/google/dedede/variants/pirika/gpio.c
@@ -5,7 +5,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* A11 : TOUCH_RPT_EN */
PAD_NC(GPP_A11, NONE),
diff --git a/src/mainboard/google/fizz/variants/baseboard/nhlt.c b/src/mainboard/google/fizz/variants/baseboard/nhlt.c
index 3011955..6dba2b4 100644
--- a/src/mainboard/google/fizz/variants/baseboard/nhlt.c
+++ b/src/mainboard/google/fizz/variants/baseboard/nhlt.c
@@ -6,11 +6,9 @@
void __weak variant_nhlt_init(struct nhlt *nhlt)
{
-
/* RT5663 Headset codec */
if (nhlt_soc_add_rt5663(nhlt, AUDIO_LINK_SSP1))
printk(BIOS_ERR, "Couldn't add headset codec.\n");
-
}
void __weak variant_nhlt_oem_overrides(const char **oem_id,
diff --git a/src/mainboard/google/fizz/variants/endeavour/board.c b/src/mainboard/google/fizz/variants/endeavour/board.c
index 3da8f22..03716c2 100644
--- a/src/mainboard/google/fizz/variants/endeavour/board.c
+++ b/src/mainboard/google/fizz/variants/endeavour/board.c
@@ -15,5 +15,4 @@
void variant_chip_display_init(void)
{
-
}
diff --git a/src/mainboard/google/fizz/variants/karma/nhlt.c b/src/mainboard/google/fizz/variants/karma/nhlt.c
index e237d2e..b0f4527 100644
--- a/src/mainboard/google/fizz/variants/karma/nhlt.c
+++ b/src/mainboard/google/fizz/variants/karma/nhlt.c
@@ -18,7 +18,6 @@
/* MAXIM Smart Amps for left and right speakers. */
if (nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP0))
printk(BIOS_ERR, "Couldn't add Maxim_98357 codec.\n");
-
}
void variant_nhlt_oem_overrides(const char **oem_id,
diff --git a/src/mainboard/google/gale/bootblock.c b/src/mainboard/google/gale/bootblock.c
index 343fe65..d900510 100644
--- a/src/mainboard/google/gale/bootblock.c
+++ b/src/mainboard/google/gale/bootblock.c
@@ -39,7 +39,6 @@
/* Is maskrom parameter address set to a sensible value? */
if ((maskrom_param->start_magic != UBER_SBL_SHARED_INFO_START_MAGIC) ||
(maskrom_param->end_magic != UBER_SBL_SHARED_INFO_END_MAGIC)) {
-
printk(BIOS_INFO, "Uber-sbl: invalid magic!\n");
} else {
printk(BIOS_INFO, "Uber-sbl version: %s\n",
diff --git a/src/mainboard/google/gale/verstage.c b/src/mainboard/google/gale/verstage.c
index 6dfc230..68a4aa4 100644
--- a/src/mainboard/google/gale/verstage.c
+++ b/src/mainboard/google/gale/verstage.c
@@ -8,7 +8,6 @@
static void ipq_setup_tpm(void)
{
-
if (CONFIG(I2C_TPM)) {
gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO,
GPIO_PULL_UP, GPIO_6MA, 1);
diff --git a/src/mainboard/google/gru/sdram_configs.c b/src/mainboard/google/gru/sdram_configs.c
index aae3377..64f45de 100644
--- a/src/mainboard/google/gru/sdram_configs.c
+++ b/src/mainboard/google/gru/sdram_configs.c
@@ -9,7 +9,6 @@
#include <types.h>
static const char *sdram_configs[] = {
-
/* Samsung K4E6E304EB-EGCE */
[0] = "sdram-lpddr3-generic-4GB",
diff --git a/src/mainboard/google/guybrush/romstage.c b/src/mainboard/google/guybrush/romstage.c
index 571eb44..96ac0e6 100644
--- a/src/mainboard/google/guybrush/romstage.c
+++ b/src/mainboard/google/guybrush/romstage.c
@@ -14,5 +14,4 @@
gpio_configure_pads_with_override(base_gpios, base_num_gpios,
override_gpios, override_num_gpios);
-
}
diff --git a/src/mainboard/google/hatch/variants/nightfury/gpio.c b/src/mainboard/google/hatch/variants/nightfury/gpio.c
index 1f36e01..1a84bac 100644
--- a/src/mainboard/google/hatch/variants/nightfury/gpio.c
+++ b/src/mainboard/google/hatch/variants/nightfury/gpio.c
@@ -153,7 +153,6 @@
* See https://review.coreboot.org/c/coreboot/+/32111 .
*/
static const struct pad_config default_sleep_gpio_table[] = {
-
};
/*
@@ -161,7 +160,6 @@
* default_sleep_gpio_table but also, turn off FPMCU.
*/
static const struct pad_config s5_sleep_gpio_table[] = {
-
};
const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num)
diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index 5ecc52e..427f094 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -135,7 +135,6 @@
{
/* Initialize the PIRQ data structures for consumption */
pirq_setup();
-
}
int mainboard_get_xhci_oc_map(uint16_t *map)
diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c
index d5df223..8324916 100644
--- a/src/mainboard/google/kukui/bootblock.c
+++ b/src/mainboard/google/kukui/bootblock.c
@@ -12,5 +12,4 @@
2);
gpio_set_spi_driving(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK,
10);
-
}
diff --git a/src/mainboard/google/mistral/bootblock.c b/src/mainboard/google/mistral/bootblock.c
index 4327ccc..5dcae8c 100644
--- a/src/mainboard/google/mistral/bootblock.c
+++ b/src/mainboard/google/mistral/bootblock.c
@@ -4,5 +4,4 @@
void bootblock_mainboard_init(void)
{
-
}
diff --git a/src/mainboard/google/mistral/chromeos.c b/src/mainboard/google/mistral/chromeos.c
index 7ffcd57..b9a190e 100644
--- a/src/mainboard/google/mistral/chromeos.c
+++ b/src/mainboard/google/mistral/chromeos.c
@@ -5,7 +5,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
-
}
int get_ec_is_trusted(void)
diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c
index e4e7975..ba2fe28 100644
--- a/src/mainboard/google/nyan/mainboard.c
+++ b/src/mainboard/google/nyan/mainboard.c
@@ -50,7 +50,6 @@
clrsetbits32(&clk_rst->clk_src_disp1,
CLK_SOURCE_MASK | CLK_DIVISOR_MASK,
2 /*PLLD_OUT0 */ << CLK_SOURCE_SHIFT);
-
}
static void setup_pinmux(void)
diff --git a/src/mainboard/google/nyan_big/mainboard.c b/src/mainboard/google/nyan_big/mainboard.c
index 0250b45..3a45729 100644
--- a/src/mainboard/google/nyan_big/mainboard.c
+++ b/src/mainboard/google/nyan_big/mainboard.c
@@ -50,7 +50,6 @@
clrsetbits32(&clk_rst->clk_src_disp1,
CLK_SOURCE_MASK | CLK_DIVISOR_MASK,
2 /*PLLD_OUT0 */ << CLK_SOURCE_SHIFT);
-
}
static void setup_pinmux(void)
diff --git a/src/mainboard/google/nyan_blaze/mainboard.c b/src/mainboard/google/nyan_blaze/mainboard.c
index d6aa05a..5b82208 100644
--- a/src/mainboard/google/nyan_blaze/mainboard.c
+++ b/src/mainboard/google/nyan_blaze/mainboard.c
@@ -50,7 +50,6 @@
clrsetbits32(&clk_rst->clk_src_disp1,
CLK_SOURCE_MASK | CLK_DIVISOR_MASK,
2 /*PLLD_OUT0 */ << CLK_SOURCE_SHIFT);
-
}
static void setup_pinmux(void)
diff --git a/src/mainboard/google/octopus/smihandler.c b/src/mainboard/google/octopus/smihandler.c
index 4400342..5d07d5b 100644
--- a/src/mainboard/google/octopus/smihandler.c
+++ b/src/mainboard/google/octopus/smihandler.c
@@ -62,7 +62,6 @@
void power_off_lte_module(void)
{
-
const struct gpio_with_delay lte_power_off_gpios[] = {
{
GPIO_161, /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
diff --git a/src/mainboard/google/octopus/variants/bloog/gpio.c b/src/mainboard/google/octopus/variants/bloog/gpio.c
index f77d429..4e09297 100644
--- a/src/mainboard/google/octopus/variants/bloog/gpio.c
+++ b/src/mainboard/google/octopus/variants/bloog/gpio.c
@@ -5,7 +5,6 @@
#include <gpio.h>
static const struct pad_config default_override_table[] = {
-
PAD_NC(GPIO_50, UP_20K), /* PCH_I2C_PEN_SDA -- unused */
PAD_NC(GPIO_51, UP_20K), /* PCH_I2C_PEN_SCL -- unused */
PAD_NC(GPIO_52, UP_20K), /* PCH_I2C_P_SENSOR_SDA -- unused */
diff --git a/src/mainboard/google/octopus/variants/fleex/gpio.c b/src/mainboard/google/octopus/variants/fleex/gpio.c
index 0b561d8..f2e6475 100644
--- a/src/mainboard/google/octopus/variants/fleex/gpio.c
+++ b/src/mainboard/google/octopus/variants/fleex/gpio.c
@@ -5,7 +5,6 @@
#include <gpio.h>
static const struct pad_config default_override_table[] = {
-
PAD_NC(GPIO_52, UP_20K),
PAD_NC(GPIO_53, UP_20K),
/* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c
index e38d1cb..fd310bd 100644
--- a/src/mainboard/google/peach_pit/romstage.c
+++ b/src/mainboard/google/peach_pit/romstage.c
@@ -194,7 +194,6 @@
printk(BIOS_SPEW, "RTRY at %d(%p):\nRAM %08lx\nSPI %08lx\n",
i, &data[i/4], (unsigned long)data[i/4], (unsigned long)in);
}
-
}
printk(BIOS_SPEW, "%d errors\n", errors);
}
@@ -219,7 +218,6 @@
void __noreturn romstage_main(void)
{
-
extern struct mem_timings mem_timings;
int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
int power_init_failed;
diff --git a/src/mainboard/google/poppy/variants/nami/nhlt.c b/src/mainboard/google/poppy/variants/nami/nhlt.c
index 343b835..5cd8e5a 100644
--- a/src/mainboard/google/poppy/variants/nami/nhlt.c
+++ b/src/mainboard/google/poppy/variants/nami/nhlt.c
@@ -18,7 +18,6 @@
/* MAXIM Smart Amps for left and right speakers. */
if (nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP0))
printk(BIOS_ERR, "Couldn't add Maxim_98357 codec.\n");
-
}
void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id,
diff --git a/src/mainboard/google/poppy/variants/nautilus/nhlt.c b/src/mainboard/google/poppy/variants/nautilus/nhlt.c
index 267dbfc..ed44b84 100644
--- a/src/mainboard/google/poppy/variants/nautilus/nhlt.c
+++ b/src/mainboard/google/poppy/variants/nautilus/nhlt.c
@@ -18,7 +18,6 @@
/* MAXIM Smart Amps for left and right speakers. */
if (nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP0))
printk(BIOS_ERR, "Couldn't add Maxim_98357 codec.\n");
-
}
void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id,
diff --git a/src/mainboard/google/poppy/variants/rammus/nhlt.c b/src/mainboard/google/poppy/variants/rammus/nhlt.c
index c893ee9..49a3f7a 100644
--- a/src/mainboard/google/poppy/variants/rammus/nhlt.c
+++ b/src/mainboard/google/poppy/variants/rammus/nhlt.c
@@ -19,7 +19,6 @@
/* Render time_slot is 0 and feedback time_slot is 2 */
if (nhlt_soc_add_max98927(nhlt, AUDIO_LINK_SSP0, 0, 2))
printk(BIOS_ERR, "Couldn't add Maxim MAX98927\n");
-
}
void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id,
diff --git a/src/mainboard/google/rex/variants/deku/gpio.c b/src/mainboard/google/rex/variants/deku/gpio.c
index 515b1d0..55464dd 100644
--- a/src/mainboard/google/rex/variants/deku/gpio.c
+++ b/src/mainboard/google/rex/variants/deku/gpio.c
@@ -409,7 +409,6 @@
const struct pad_config *variant_gpio_table(size_t *num)
{
-
*num = ARRAY_SIZE(gpio_table);
return gpio_table;
}
diff --git a/src/mainboard/google/skyrim/bootblock.c b/src/mainboard/google/skyrim/bootblock.c
index d285d7f..30f300c 100644
--- a/src/mainboard/google/skyrim/bootblock.c
+++ b/src/mainboard/google/skyrim/bootblock.c
@@ -27,11 +27,9 @@
cmos_bit_set = (byte_value & CMOS_BITMAP_SKIP_RESET_TOGGLE) != 0;
if (CONFIG(BOARD_GOOGLE_FROSTFLOW)) {
-
printk(BIOS_SPEW, "Checking DRAM part #\n");
if (google_chromeec_cbi_get_dram_part_num(
cbi_part_number, sizeof(cbi_part_number)) == 0) {
-
skip_reset_toggle = strncmp(cbi_part_number, HYNIX_PART_NAME, HYNIX_PART_LEN) == 0;
if (skip_reset_toggle) {
printk(BIOS_SPEW, "SKIP_RESET_TOGGLE needed, checking CMOS bit is set\n");
diff --git a/src/mainboard/google/skyrim/variants/markarth/gpio.c b/src/mainboard/google/skyrim/variants/markarth/gpio.c
index 9753179..c320228 100644
--- a/src/mainboard/google/skyrim/variants/markarth/gpio.c
+++ b/src/mainboard/google/skyrim/variants/markarth/gpio.c
@@ -5,7 +5,6 @@
/* GPIO configuration in ramstage */
static const struct soc_amd_gpio override_gpio_table[] = {
-
/* SOC_PEN_DETECT_ODL => Unused */
PAD_NC(GPIO_3),
/* EN_PWR_FP => Unused */
diff --git a/src/mainboard/google/skyrim/variants/winterhold/gpio.c b/src/mainboard/google/skyrim/variants/winterhold/gpio.c
index 340bfb6..888ba32 100644
--- a/src/mainboard/google/skyrim/variants/winterhold/gpio.c
+++ b/src/mainboard/google/skyrim/variants/winterhold/gpio.c
@@ -6,7 +6,6 @@
/* GPIO configuration in ramstage */
static const struct soc_amd_gpio override_gpio_table[] = {
-
/* SOC_PEN_DETECT_ODL */
PAD_NC(GPIO_3),
diff --git a/src/mainboard/google/storm/bootblock.c b/src/mainboard/google/storm/bootblock.c
index e7ff6a3..47cb937 100644
--- a/src/mainboard/google/storm/bootblock.c
+++ b/src/mainboard/google/storm/bootblock.c
@@ -39,7 +39,6 @@
/* Is maskrom parameter address set to a sensible value? */
if ((maskrom_param->start_magic != UBER_SBL_SHARED_INFO_START_MAGIC) ||
(maskrom_param->end_magic != UBER_SBL_SHARED_INFO_END_MAGIC)) {
-
printk(BIOS_INFO, "Uber-sbl: invalid magic!\n");
} else {
printk(BIOS_INFO, "Uber-sbl version: %s\n",
diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c
index 0739f6e..e6e6227 100644
--- a/src/mainboard/google/stout/early_init.c
+++ b/src/mainboard/google/stout/early_init.c
@@ -63,7 +63,6 @@
if (((ec_status & 0x3) == EC_IN_RO_MODE) ||
((ec_status & 0x3) == EC_IN_RECOVERY_MODE)) {
-
printk(BIOS_DEBUG, "EC Cold Boot Detected\n");
if (!rec_mode) {
/*
diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c
index 2584166..deb2bd2 100644
--- a/src/mainboard/google/stout/ec.c
+++ b/src/mainboard/google/stout/ec.c
@@ -11,7 +11,6 @@
void stout_ec_init(void)
{
-
printk(BIOS_DEBUG,"%s: EC FW version %x%x\n", __func__,
ec_read(EC_FW_VER), ec_read(EC_FW_VER + 1));
diff --git a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c
index a544548..44acef9 100644
--- a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c
+++ b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c
@@ -57,7 +57,6 @@
gpio->pins[0] = GPIO_13;
else
gpio->pins[0] = GPIO_6;
-
}
void variant_audio_update(void)
@@ -73,7 +72,6 @@
*/
static void remove_usb_device_reset_gpio(const struct device *usb_dev)
{
-
struct drivers_usb_acpi_config *usb_cfg;
/* config_of dies on failure, so a NULL check is not required */
usb_cfg = config_of(usb_dev);
diff --git a/src/mainboard/google/zork/variants/baseboard/trembyle/fsps.c b/src/mainboard/google/zork/variants/baseboard/trembyle/fsps.c
index ae36731..0f503c7 100644
--- a/src/mainboard/google/zork/variants/baseboard/trembyle/fsps.c
+++ b/src/mainboard/google/zork/variants/baseboard/trembyle/fsps.c
@@ -119,7 +119,6 @@
*num = ARRAY_SIZE(pco_dxio_descriptors);
return pco_dxio_descriptors;
}
-
}
static const fsp_ddi_descriptor pco_ddi_descriptors[] = {
diff --git a/src/mainboard/google/zork/variants/baseboard/trembyle/gpio.c b/src/mainboard/google/zork/variants/baseboard/trembyle/gpio.c
index 3f65d5c..d978360 100644
--- a/src/mainboard/google/zork/variants/baseboard/trembyle/gpio.c
+++ b/src/mainboard/google/zork/variants/baseboard/trembyle/gpio.c
@@ -193,7 +193,6 @@
PAD_GPO(GPIO_42, LOW),
};
gpio_configure_pads(v3_wifi_table, ARRAY_SIZE(v3_wifi_table));
-
}
static void wifi_power_reset_configure_active_high_power(void)
@@ -283,7 +282,6 @@
__weak void finalize_gpios(int slp_typ)
{
if (variant_has_fingerprint() && slp_typ != ACPI_S3) {
-
if (fpmcu_needs_delay())
mdelay(550);
diff --git a/src/mainboard/google/zork/variants/dirinboz/variant.c b/src/mainboard/google/zork/variants/dirinboz/variant.c
index ebe2292..81cadb6 100644
--- a/src/mainboard/google/zork/variants/dirinboz/variant.c
+++ b/src/mainboard/google/zork/variants/dirinboz/variant.c
@@ -35,7 +35,6 @@
const fsp_ddi_descriptor **ddi_descs,
size_t *ddi_num)
{
-
*dxio_descs = baseboard_get_dxio_descriptors(dxio_num);
*ddi_descs = &non_hdmi_ddi_descriptors[0];
*ddi_num = ARRAY_SIZE(non_hdmi_ddi_descriptors);
diff --git a/src/mainboard/google/zork/variants/gumboz/variant.c b/src/mainboard/google/zork/variants/gumboz/variant.c
index ebe2292..81cadb6 100644
--- a/src/mainboard/google/zork/variants/gumboz/variant.c
+++ b/src/mainboard/google/zork/variants/gumboz/variant.c
@@ -35,7 +35,6 @@
const fsp_ddi_descriptor **ddi_descs,
size_t *ddi_num)
{
-
*dxio_descs = baseboard_get_dxio_descriptors(dxio_num);
*ddi_descs = &non_hdmi_ddi_descriptors[0];
*ddi_num = ARRAY_SIZE(non_hdmi_ddi_descriptors);
