|author||Ronak Kanabar <firstname.lastname@example.org>||Wed Mar 31 16:57:20 2021|
|committer||Commit Bot <email@example.com>||Mon Apr 19 20:23:38 2021|
UPSTREAM: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2117_00 The headers added are generated as per FSP v2117_00. Previous FSP version was v2081_02. Changes Include: - Adjust Reserved UPD Offset in FspmUpd.h and FspsUpd.h - Remove FivrFaults and FivrEfficiency Upds from FspmUpd.h - Few UPDs description update in FspmUpd.h and FspsUpd.h BUG=b:184129128 BRANCH=None TEST=Build and boot ADLRVP Change-Id: Ib069e9bc36621f38a1c8486079e13393167d83a0 Signed-off-by: Tim Wawrzynczak <firstname.lastname@example.org> Original-Commit-Id: 369405090fc73e60f2e26f7bc1c5a8acc8305a5e Original-Change-Id: I068552084b1ef3e5c4fba7a46240d116c92c7b5b Original-Signed-off-by: Ronak Kanabar <email@example.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/51977 Original-Tested-by: build bot (Jenkins) <firstname.lastname@example.org> Original-Reviewed-by: Maulik V Vaghela <email@example.com> Original-Reviewed-by: Tim Wawrzynczak <firstname.lastname@example.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2836445
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAINKconfig option if you’re feeling lucky (no support in this case).
Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.