| commit | 981c4ad1bfb873d31d9be3f2d8c85424cda2805c | [log] [tgz] |
|---|---|---|
| author | Paul Ma <magf@bitland.corp-partner.google.com> | Wed Jun 10 08:10:46 2020 |
| committer | Commit Bot <commit-bot@chromium.org> | Tue Jun 16 13:37:22 2020 |
| tree | ef92e6aebe22335f0b6266ec6f74f43b8231ada2 | |
| parent | 145dd93d86cf83450680f06aa1c515d89d545373 [diff] |
UPSTREAM: mb/google/zork: update DRAM SPD table for vilboz Add DRAM support for vilboz: Hynix H5AN8G6NCJR-VKC # 0b0000 Hynix H5ANAG6NCMR-VKC # 0b0001 Samsung K4A8G165WC-BCWE # 0b0010 Hynix H5AN8G6NDJR-XNC # 0b0011 Micron MT40A512M16TB-062E-J # 0b0100 Samsung K4AAG165WA-BCWE # 0b0101 Micron MT40A1G16KD-062E-E # 0b0110 BUG=b:157523051 BRANCH=none TEST=build Change-Id: I74d58eec331f731f6277059a3a6e4239dfc45bd9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 00148bba7146318e2e815d8c13e33278f63814c9 Original-Change-Id: I251fd9cc7bc51bfdeaa577f7034da750e684dc99 Original-Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/42244 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2245713 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2246350 Tested-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-by: Raul E Rangel <rrangel@chromium.org> Commit-Queue: Paul Ma <magf@bitland.corp-partner.google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.