| commit | 1c11200a7e88065edda1662c09ec37399f5f46a7 | [log] [tgz] |
|---|---|---|
| author | Lijian Zhao <lijian.zhao@intel.com> | Mon Aug 27 18:14:23 2018 |
| committer | chrome-bot <chrome-bot@chromium.org> | Fri Aug 31 07:27:48 2018 |
| tree | ac615b1159479f20288dc58f951c035ab09696d8 | |
| parent | ad00b6243727ea31bbd6b5b0617eb2ba858e7c93 [diff] |
UPSTREAM: soc/intel/cannonlake: Fix comment errors for SMBUS On CannonLake PCH, SMBUS stays at Bus 0 Device 31 and Function 4, previous comment in southbridge.asl mention it as Function 3 that was a mistake. BUG=N/A TEST=N/A Change-Id: I2acc2720e1efdac7f60cf0111fbca75ac4f15581 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: d145c95208b5129701a6a4125767fa0118083cf5 Original-Change-Id: I29786457379809b6fcb592e1136ff612539e24dc Original-Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Original-Reviewed-on: https://review.coreboot.org/28366 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1197444