commit | d8030ae8090eb3368af3842820a7d1784cdf46d1 | [log] [tgz] |
---|---|---|
author | peichao.wang <peichao.wang@bitland.corp-partner.google.com> | Fri Apr 12 07:14:15 2019 |
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | Thu Apr 18 03:37:59 2019 |
tree | c0b04a7610cb2a24a750634252bae6aa461047e7 | |
parent | 0a9fb44efb72c721cfe90e585bf23eba583978c6 [diff] |
UPSTREAM: mb/google/octopus: Add custom SAR values for Laser Laser would prefer to use different SAR values. Since Laser sku id is 5. BUG=b:130381493 BRANCH=octopus TEST=build Change-Id: Ibd297036ec71cf4b19854c0e866cacf6bdf69484 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 2efee9df8581a5b1898d58c6d8f7ba3552ce1ed0 Original-Change-Id: I5cce38a191edfb235e274db3c788c58b65e0ebe1 Original-Signed-off-by: peichao.wang <peichao.wang@bitland.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/32296 Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1571392 Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com> Commit-Queue: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org> Tested-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com> (cherry picked from commit 7ebb27ce64c7988119f51c20897c72d127e36a56) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1573318 Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.