UPSTREAM: soc/intel/skylake: Fix broken suspend-resume
With recent change (a4b11e5c90: soc/intel/skylake: Perform CPU MP Init
before FSP-S Init) to perform CPU MP init before FSP-S init, suspend
resume is currently broken for all skylake/kabylake boards. All the
skylake/kabylake boards store external stage cache in TSEG, which is
relocated post MP-init. Thus, if FSP loading and initialization is
done after MP-init, then ramstage is not able to:
1. Save FSP component in external stage cache during normal boot, and
2. Load FSP component from external stage cache during resume
In order to fix this, ensure that FSP loading happens separately from
FSP initialization. Add fsp_load callback for pre_mp_init which ensures
that the required FSP component is loaded/saved from/to external stage
cache.
BUG=chrome-os-partner:63114
BRANCH=None
TEST=Verified that 100 cycles of suspend/resume worked fine on poppy.
Change-Id: I1b5cef5e3d70669c7e1454f69443c5f4964361b7
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Id: c248044b20d270d14cf460b04972b7ff741685d0
Original-Change-Id: I5b4deaf936a05b9bccf2f30b949674e2ba993488
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18414
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/445863
5 files changed
