soc/mediatek/mt8188: Add dram.elf version 0.1.0 for DRAM calibration
This blob includes both full calibration and fast calibration flow.
BUG=b:233720142
TEST=DRAM calibration pass
(cherry picked from commit 4635ce0d62f056c002b1082c51e2b606c096b913)
Original-Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Original-Change-Id: I0a6c0085700cad4582de2d5b9c1a6a18e9313c35
GitOrigin-RevId: 4635ce0d62f056c002b1082c51e2b606c096b913
Change-Id: I3395988e72fa4e8e77337b7ab618523ce0062c46
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/blobs/+/3862971
Tested-by: CopyBot Service Account <copybot.service@gmail.com>
Reviewed-by: Ricardo Quesada <ricardoq@chromium.org>
Commit-Queue: Ricardo Quesada <ricardoq@chromium.org>
diff --git a/soc/mediatek/mt8188/README.md b/soc/mediatek/mt8188/README.md
index 6138626..2115134 100644
--- a/soc/mediatek/mt8188/README.md
+++ b/soc/mediatek/mt8188/README.md
@@ -4,6 +4,7 @@
- dpm.dm
- dpm.pm
- spm_firmware.bin
+- dram.elf
--------------------------------------------------------------------------------
# MCUPM introduction
@@ -90,3 +91,103 @@
`$ strings spm_firmware.bin | grep pcm_suspend`
--------------------------------------------------------------------------------
+# `dram.elf` introduction
+`dram.elf` is an ELF format file, which performs DRAM full calibration, DRAM
+fast calibration and returns the trained calibration parameters to the caller.
+The caller may store the parameters on NOR/NAND or eMMC for faster subsequent
+bootups.
+
+## Who uses it
+Coreboot loads `dram.elf` during the first bootup if no valid DRAM parameters
+are found on NOR/NAND or eMMC.
+
+## How to load `dram.elf`
+Coreboot locates `dram.elf` file, locates the entry point `_start`,
+passes a `dramc_param` struct argument `dparam` to it, and calls
+`_start(&dparam)` to execute `dram.elf`.
+
+## Parameters
+```
+struct dramc_param {
+ struct dramc_param_header header;
+ void (*do_putc)(unsigned char c);
+ struct dramc_data dramc_datas;
+};
+```
+
+Below shows the internal structure of `dramc_param`:
+```
+struct dramc_param_header {
+ u16 version; /* DRAMC_PARAM_HEADER_VERSION, set in coreboot */
+ u16 size; /* size of whole dramc_param, set in coreboot */
+ u16 status; /* DRAMC_PARAM_STATUS_CODES, set in dram blob */
+ u16 flags; /* DRAMC_PARAM_FLAG, set in dram blob */
+ u16 config; /* DRAMC_PARAM_CONFIG, set in coreboot */
+};
+
+struct sdram_params {
+ /* rank, cbt */
+ u32 rank_num;
+ u32 dram_cbt_mode;
+ u16 delay_cell_timex100;
+ u8 u18ph_dly;
+
+ /* duty */
+ s8 duty_clk_delay[CHANNEL_MAX][RANK_MAX];
+ s8 duty_dqs_delay[CHANNEL_MAX][DQS_NUMBER_LP4];
+ s8 duty_wck_delay[CHANNEL_MAX][DQS_NUMBER_LP4];
+ .......
+ .......
+};
+
+struct ddr_mrr_info {
+ u16 mr5_vendor_id;
+ u16 mr6_revision_id;
+ u16 mr7_revision_id;
+ u64 mr8_density[RANK_MAX];
+ u32 rank_nums;
+ u8 die_num[RANK_MAX];
+};
+
+struct emi_mdl {
+ u32 cona_val;
+ u32 conh_val;
+ u32 conf_val;
+ u32 chn_cona_val;
+};
+
+struct sdram_info {
+ u32 ddr_type; /* SDRAM_DDR_TYPE */
+ u32 ddr_geometry; /* SDRAM_DDR_GEOMETRY_TYPE */
+};
+
+struct ddr_base_info {
+ u32 config_dvfs; /* SDRAM_DVFS_FLAG */
+ struct sdram_info sdram;
+ u32 voltage_type; /* SDRAM_VOLTAGE_TYPE */
+ u32 support_ranks;
+ u64 rank_size[RANK_MAX];
+ struct emi_mdl emi_config;
+ DRAM_CBT_MODE_T cbt_mode[RANK_MAX];
+ struct ddr_mrr_info mrr_info;
+ u32 data_rate;
+};
+
+struct dramc_data {
+ struct ddr_base_info ddr_info;
+ struct sdram_params freq_params[DRAM_DFS_SHU_MAX];
+};
+```
+
+## The output of `dram.elf`
+`dram.elf` configures suitable dramc settings and returns the DRAM parameters.
+Then, Coreboot saves the parameters on the specified firmware flash section:
+`"RW_MRC_CACHE"`.
+
+## Return values
+0 on success; < 0 on failure.
+
+## Version
+`$ strings dram.elf | grep "firmware version"`
+
+--------------------------------------------------------------------------------
diff --git a/soc/mediatek/mt8188/dram.elf b/soc/mediatek/mt8188/dram.elf
new file mode 100644
index 0000000..7f22c27
--- /dev/null
+++ b/soc/mediatek/mt8188/dram.elf
Binary files differ
diff --git a/soc/mediatek/mt8188/dram.elf.md5 b/soc/mediatek/mt8188/dram.elf.md5
new file mode 100644
index 0000000..dc9d076
--- /dev/null
+++ b/soc/mediatek/mt8188/dram.elf.md5
@@ -0,0 +1 @@
+2ab5d7370e14bae8c8199c7be9128d9e *dram.elf
diff --git a/soc/mediatek/mt8188/dram_release_notes.txt b/soc/mediatek/mt8188/dram_release_notes.txt
new file mode 100644
index 0000000..8613b3d
--- /dev/null
+++ b/soc/mediatek/mt8188/dram_release_notes.txt
@@ -0,0 +1,14 @@
+# 0.1.0
+
+1. A local build.
+ Protocol (params header) version: 1
+
+2. Included changes:
+
+- CL:*4911803 mtk-dramk/mt8188: Add fast-k support
+- CL:*4911802 mtk-dramk/mt8188: Make source code compilable and runable
+- CL:*4933742 mtk-dramk: Move typedefs.h to common folder
+- CL:*4933741 mtk-dramk: Refactor emi files
+- CL:*4916640 mtk-dramk: Enable checkpatch_check
+- CL:*4916639 COIL: Add unblocked_terms.txt
+- CL:*4911800 mtk-dramk/mt8188: First code drop from MT8188 internal DRAM preloader
