sc7280/boot,shrm: Update qclib blobs binaries from 35 to 52
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Sudheer Kumar Amrabadi <samrabad@codeaurora.org>
Change-Id: Ib5ea93c62b4437a147d1870c8cf52cd3de1ac94f
diff --git a/sc7280/boot/Pmic.bin b/sc7280/boot/Pmic.bin
index a3944f6..135d1be 100644
--- a/sc7280/boot/Pmic.bin
+++ b/sc7280/boot/Pmic.bin
Binary files differ
diff --git a/sc7280/boot/QcLib.elf b/sc7280/boot/QcLib.elf
index 4bae3f8..230fe7e 100644
--- a/sc7280/boot/QcLib.elf
+++ b/sc7280/boot/QcLib.elf
Binary files differ
diff --git a/sc7280/boot/Release_Notes.txt b/sc7280/boot/Release_Notes.txt
index 0e85da9..c2270fb 100644
--- a/sc7280/boot/Release_Notes.txt
+++ b/sc7280/boot/Release_Notes.txt
@@ -1,3 +1,28 @@
+================== Release 00052 ================================
+This Release Notes file covers these blobs:
+ * dcb.bin
+ * Pmic.bin
+ * QcLib.elf
+
+Version : 00052
+
+Release Date : Feb,2023
+
+Supported Silicon : SC7280
+
+Changes since last version:
+ * HW SHA usage for DDR calibration
+ * qclib_set.py tool to support chroot Qclib building
+ * Skip PBS RAM load/verify during Warm Reset to improve BOOT KPI
+ * Revert recovery feature for INT Lockup
+
+Above Bins were used to generate coreboot image.
+
+No special instructions, requirements or dependencies, files must be
+present in this folder to be pulled in during coreboot build
+
+Errata : Nothing to report
+
================== Release 00035 ================================
This Release Notes file covers these blobs:
* dcb.bin
diff --git a/sc7280/boot/dcb.bin b/sc7280/boot/dcb.bin
index 1456dab..275cf0c 100644
--- a/sc7280/boot/dcb.bin
+++ b/sc7280/boot/dcb.bin
Binary files differ
diff --git a/sc7280/shrm/Release_Notes.txt b/sc7280/shrm/Release_Notes.txt
index ff18e62..c77683e 100644
--- a/sc7280/shrm/Release_Notes.txt
+++ b/sc7280/shrm/Release_Notes.txt
@@ -1,3 +1,26 @@
+================== Release 00052 ================================
+This Release Notes file covers these blobs:
+ * shrm.elf
+
+Version : 00052
+
+Release Date : Feb,2023
+
+Supported Silicon : SC7280
+
+Changes since last version:
+ * HW SHA usage for DDR calibration
+ * qclib_set.py tool to support chroot Qclib building
+ * Skip PBS RAM load/verify during Warm Reset to improve BOOT KPI
+ * Revert recovery feature for INT Lockup
+
+Above Bins were used to generate coreboot image.
+
+No special instructions, requirements or dependencies, files must be
+present in this folder to be pulled in during coreboot build
+
+Errata : Nothing to report
+
================== Release 00035 ================================
This Release Notes file covers these blobs:
* shrm.elf
diff --git a/sc7280/shrm/shrm.elf b/sc7280/shrm/shrm.elf
index a8fc013..ea2bb8e 100644
--- a/sc7280/shrm/shrm.elf
+++ b/sc7280/shrm/shrm.elf
Binary files differ
