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chromium / chromiumos / third_party / flashrom / 1801f7c0aac613851a8664473b88321dad36d1e7
commit1801f7c0aac613851a8664473b88321dad36d1e7[log] [tgz]
authorDuncan Laurie <dlaurie@google.com>Thu Jan 10 02:02:51 2019
committerchrome-bot <chrome-bot@chromium.org>Tue Jan 15 10:54:47 2019
tree62b3cf43949f38e317b738e12b7447901e51eb50
parent03841e572c2c8fbb3d1b656e67956723daa3f723 [diff]
w25q256: Add support for write protect

The Winbond flash chips with size >= 32MB introduce a new block
protect bit in status register 0 and remove the bit that indicates
sector/block configuration.  This breaks the long standing
compatibility of this particular register.

To support write protect on these chips a new status register
format is defined and new functions are provided that use it
correctly.

The w25q256 write protect ranges are also defined and enabled in
the flash chip entry.

BUG=b:122342865
BRANCH=none
TEST=waiting for hardware (will set verified+1 when tested)

Change-Id: I4b1131c2b61f51ced00848476892d6ff2497ed1c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1403943
Commit-Ready: Lijian Zhao <lijian.zhao@intel.com>
Tested-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
3 files changed
tree: 62b3cf43949f38e317b738e12b7447901e51eb50
  1. Documentation/
  2. tests/
  3. util/
  4. .gitattributes
  5. .gitignore
  6. 82802ab.c
  7. a25.c
  8. action_descriptor.c
  9. action_descriptor.h
  10. amd_imc.c
  11. android.c
  12. android.h
  13. archtest.c
  14. at25.c
  15. atahpt.c
  16. big_lock.c
  17. big_lock.h
  18. bitbang_spi.c
  19. board_enable.c
  20. buspirate_spi.c
  21. cbtable.c
  22. check.h
  23. chipdrivers.h
  24. chipset_enable.c
  25. cli_mfg.c
  26. cli_output.c
  27. COPYING
  28. coreboot_tables.h
  29. cros_ec.c
  30. cros_ec.h
  31. cros_ec_commands.h
  32. cros_ec_dev.c
  33. cros_ec_dev.h
  34. cros_ec_i2c.c
  35. cros_ec_lock.c
  36. cros_ec_lock.h
  37. cros_ec_lpc.c
  38. dediprog.c
  39. dmi.c
  40. drkaiser.c
  41. dummyflasher.c
  42. ene_lpc.c
  43. fdtmap.c
  44. fdtmap.h
  45. file.c
  46. file.h
  47. file_lock.c
  48. flash.h
  49. flashchips.c
  50. flashchips.h
  51. flashrom.8.tmpl
  52. flashrom.c
  53. fmap.c
  54. fmap.h
  55. ft2232_spi.c
  56. gfxnvidia.c
  57. hwaccess.c
  58. hwaccess.h
  59. ich_descriptors.c
  60. ich_descriptors.h
  61. ichspi.c
  62. internal.c
  63. ipc_lock.h
  64. it85spi.c
  65. it87spi.c
  66. jedec.c
  67. layout.c
  68. layout.h
  69. linux_i2c.c
  70. linux_mtd.c
  71. linux_spi.c
  72. locks.h
  73. m29f400bt.c
  74. Makefile
  75. mcp6x_spi.c
  76. mec1308.c
  77. nic3com.c
  78. nicintel.c
  79. nicintel_spi.c
  80. nicnatsemi.c
  81. nicrealtek.c
  82. ogp_spi.c
  83. opaque.c
  84. os.h
  85. pcidev.c
  86. physmap.c
  87. platform.h
  88. pm49fl00x.c
  89. power.c
  90. power.h
  91. PRESUBMIT.cfg
  92. print.c
  93. print_wiki.c
  94. processor_enable.c
  95. programmer.c
  96. programmer.h
  97. raiden_debug_spi.c
  98. rayer_spi.c
  99. README.chromiumos
  100. s25f.c
  101. satamv.c
  102. satasii.c
  103. sb600spi.c
  104. search.c
  105. search.h
  106. serial.c
  107. serprog.c
  108. serprog.h
  109. sharplhf00l04.c
  110. spi.c
  111. spi.h
  112. spi25.c
  113. spi4ba.c
  114. spi4ba.h
  115. sst28sf040.c
  116. sst49lfxxxc.c
  117. sst_fwhub.c
  118. stm50flw0x0x.c
  119. udelay.c
  120. usb_device.c
  121. usb_device.h
  122. w29ee011.c
  123. w39.c
  124. wbsio_spi.c
  125. wpce775x.c
  126. writeprotect.c
  127. writeprotect.h