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chromium / chromiumos / third_party / flashrom / 477270a6f55e90f94130dad3fd7757433c7b6ddf
commit477270a6f55e90f94130dad3fd7757433c7b6ddf[log] [tgz]
authorSam McNally <sammc@chromium.org>Mon Nov 09 05:45:48 2020
committerCommit Bot <commit-bot@chromium.org>Tue Nov 10 03:37:18 2020
treee56157063946cbf8fb4a5347c9ef3a3d99348548
parente195b3d4f271804d029af4498e152b6acb9b953a [diff]
programmer.h: Reorder MEC1308 and ENE_LPC enumerators.

Programmer enumerators and their corresponding programmer_table entries
need to be aligned. This was not the case for MEC1308 and ENE_LPC.
Their configs were not enabled by default until commit 26fde5b0b067
("ene_lpc,mec1308: Fix entry-points to be explicit")/CL:2488823,
allowing this issue to go unnoticed. The particular symptom of the
mismatch was internal_init() trying to init linux_mtd instead of
linux_spi.

BUG=b:172668501
TEST=flashrom -p host on gale
BRANCH=None

Change-Id: I2e9d3df6a6fd6d5d8e3a5a13ee56f5997b10ea52
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2524662
Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
1 file changed
tree: e56157063946cbf8fb4a5347c9ef3a3d99348548
  1. Documentation/
  2. tests/
  3. util/
  4. .gitattributes
  5. .gitignore
  6. 82802ab.c
  7. action_descriptor.c
  8. action_descriptor.h
  9. amd_imc.c
  10. archtest.c
  11. at45db.c
  12. atahpt.c
  13. atapromise.c
  14. atavia.c
  15. big_lock.c
  16. big_lock.h
  17. bitbang_spi.c
  18. board_enable.c
  19. buspirate_spi.c
  20. cbtable.c
  21. ch341a_spi.c
  22. chipdrivers.h
  23. chipset_enable.c
  24. cli_classic.c
  25. cli_common.c
  26. cli_output.c
  27. COPYING
  28. coreboot_tables.h
  29. cros_alias.c
  30. cros_ec.c
  31. cros_ec.h
  32. cros_ec_commands.h
  33. cros_ec_dev.c
  34. custom_baud.c
  35. custom_baud.h
  36. dediprog.c
  37. developerbox_spi.c
  38. digilent_spi.c
  39. dmi.c
  40. drkaiser.c
  41. dummyflasher.c
  42. edi.c
  43. edi.h
  44. en29lv640b.c
  45. endiantest.c
  46. ene.h
  47. ene_lpc.c
  48. file.c
  49. file.h
  50. file_lock.c
  51. flash.h
  52. flashchips.c
  53. flashchips.h
  54. flashchips_hwseq.c
  55. flashrom.8.tmpl
  56. flashrom.c
  57. fmap.c
  58. fmap.h
  59. ft2232_spi.c
  60. gfxnvidia.c
  61. helpers.c
  62. hwaccess.c
  63. hwaccess.h
  64. i2c_helper.h
  65. i2c_helper_linux.c
  66. ich_descriptors.c
  67. ich_descriptors.h
  68. ichspi.c
  69. internal.c
  70. ipc_lock.h
  71. it8212.c
  72. it85spi.c
  73. it87spi.c
  74. jedec.c
  75. jlink_spi.c
  76. layout.c
  77. layout.h
  78. libflashrom.h
  79. linux_mtd.c
  80. linux_spi.c
  81. lspcon_i2c_spi.c
  82. m29f400bt.c
  83. Makefile
  84. mcp6x_spi.c
  85. mec1308.c
  86. meson.build
  87. meson_options.txt
  88. mstarddc_spi.c
  89. ni845x_spi.c
  90. nic3com.c
  91. nicintel.c
  92. nicintel_eeprom.c
  93. nicintel_spi.c
  94. nicnatsemi.c
  95. nicrealtek.c
  96. ogp_spi.c
  97. opaque.c
  98. os.h
  99. OWNERS
  100. pcidev.c
  101. physmap.c
  102. pickit2_spi.c
  103. platform.h
  104. pony_spi.c
  105. power.c
  106. power.h
  107. PRESUBMIT.cfg
  108. print.c
  109. print_wiki.c
  110. processor_enable.c
  111. programmer.c
  112. programmer.h
  113. raiden_debug_spi.c
  114. rayer_spi.c
  115. README.chromiumos
  116. realtek_mst_i2c_spi.c
  117. s25f.c
  118. satamv.c
  119. satasii.c
  120. sb600spi.c
  121. search.c
  122. search.h
  123. serial.c
  124. serprog.c
  125. serprog.h
  126. sfdp.c
  127. sharplhf00l04.c
  128. spi.c
  129. spi.h
  130. spi25.c
  131. spi25_statusreg.c
  132. spi4ba.c
  133. spi4ba.h
  134. spi95.c
  135. sst28sf040.c
  136. sst49lfxxxc.c
  137. sst_fwhub.c
  138. stlinkv3_spi.c
  139. stm50.c
  140. stm50flw0x0x.c
  141. udelay.c
  142. usb_device.c
  143. usb_device.h
  144. usbblaster_spi.c
  145. usbdev.c
  146. w29ee011.c
  147. w39.c
  148. wbsio_spi.c
  149. wpce775x.c
  150. writeprotect.c
  151. writeprotect.h