UPSTREAM: flashchips: Add Support for XMC XM25QU512C/XM25QU512D
Add initial support for the SPI flash chip XM25QU512C/XM25QU512D
Datasheet link: https://www.xmcwh.com/uploads/808/XM25QU512C_V1.6.pdf
Tested with ch341a programmer: probe, read, write, erase
(cherry picked from commit ff656e08e518dc90093c502251726c2bf26d3842)
Original-Change-Id: I251c66b5d3b4fc94242c2c9d6b7c0f03c1bd7d0b
Original-Signed-off-by: Kan Sun <ssunkkan@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/83243
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
GitOrigin-RevId: ff656e08e518dc90093c502251726c2bf26d3842
Change-Id: Ibbe31cf8a82c8d9c95b1fb0657f68f6db65c5590
Signed-off-by: chromeos-ci-prod <chromeos-ci-prod@chromeos-bot.iam.gserviceaccount.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/5743516
Reviewed-by: Hsuan Ting Chen <roccochen@chromium.org>
Commit-Queue: Hsuan Ting Chen <roccochen@chromium.org>
diff --git a/flashchips.c b/flashchips.c
index ad7d72a..46b87e3 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -22595,6 +22595,54 @@
},
{
+ .vendor = "XMC",
+ .name = "XM25QU512C/XM25QU512D",
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = XMC_XM25QU512C,
+ .total_size = 64 * 1024,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
+ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN
+ | FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ,
+ .tested = TEST_OK_PREW,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = SPI_BLOCK_ERASE_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 2048} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_DC,
+ }, {
+ .eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {64 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {64 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */
+ .unlock = SPI_DISABLE_BLOCKPROTECT,
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ,
+ .voltage = {1650, 1950},
+ },
+
+ {
.vendor = "XTX Technology Limited",
.name = "XT25F02E",
.bustype = BUS_SPI,
diff --git a/include/flashchips.h b/include/flashchips.h
index 8d6c8db..22509c4 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -859,6 +859,7 @@
#define XMC_XM25QU256C 0x4119 /* Same as XM25QU256D */
#define XMC_XM25RU256C 0x4419
#define XMC_XM25QH512C 0x4020 /* Same as XM25QH512D */
+#define XMC_XM25QU512C 0x4120 /* Same as XM25QU512D */
#define ST_M25PX80 0x7114
#define ST_M25PX16 0x7115
#define ST_M25PX32 0x7116
