flashchips.c: resync MX25L6406E/MX25L6408E with upstream
Reorder erasers to match upstream and use
spi_disable_blockprotect_bp3_srwd as the unlock function.
The table on page 16 of the MX25L6406 datasheet (rev 1.9) lists
bit 7 of the status register as status register write protect,
so spi_disable_blockprotect_bp3_srwd should be used to disable it.
Syncs the chip with upstream at
`commit b05c9b18452e3c73e80d0abd5194928d224c3d1b`
BUG=b:166294558
BRANCH=none
TEST=builds
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Change-Id: I75459e2221b6013b77e337770466bb8248ff3943
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2725866
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
1 file changed