flashrom: Add GD25Q256D flash chip support
Part appears compatible to W25Q256JV except device ID.
BUG=b:125128993
BRANCH=none
TEST=Verified on Sarien with GD25Q256D flash
Change-Id: I21fb885850d398a030d23189eb5d48cf070980c1
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1527151
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
diff --git a/flashchips.c b/flashchips.c
index 3a72082..acd951c 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -4285,6 +4285,51 @@
},
{
+ .vendor = "GigaDevice",
+ .name = "GD25Q256D",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25Q256D,
+ .total_size = 32768,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_UNBOUND_READ | FEATURE_OTP | FEATURE_4BA_SUPPORT,
+ .four_bytes_addr_funcs =
+ {
+ .set_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */
+ .read_nbyte = spi_nbyte_read_4ba_direct, /* read directly from any mode, no need to enter 4ba */
+ .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */
+ .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */
+ },
+ .tested = TEST_OK_PREWU,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = spi_block_erase_20_4ba, /* erases 4k from 4-bytes addressing mode */
+ }, {
+ .eraseblocks = { {32 * 1024, 1024} },
+ .block_erase = spi_block_erase_52_4ba, /* erases 32k from 4-bytes addressing mode */
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = spi_block_erase_d8_4ba, /* erases 64k from 4-bytes addressing mode */
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {2700, 3600},
+ .wp = &wp_w25q_large,
+ },
+
+ {
.vendor = "Fujitsu",
.name = "MBM29F400TC",
.bustype = BUS_PARALLEL,
diff --git a/flashchips.h b/flashchips.h
index fc2145f..88ae6f5 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -383,6 +383,7 @@
#define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */
#define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */
#define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */
+#define GIGADEVICE_GD25Q256D 0x4019
#define GIGADEVICE_GD25VQ21B 0x4212
#define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */
#define GIGADEVICE_GD25VQ80C 0x4214
diff --git a/writeprotect.c b/writeprotect.c
index fa2b196..c5f1e7c 100644
--- a/writeprotect.c
+++ b/writeprotect.c
@@ -1079,6 +1079,10 @@
*num_entries = ARRAY_SIZE(w25rq128_cmp0_ranges);
}
break;
+ case GIGADEVICE_GD25Q256D:
+ *w25q_ranges = w25rq256_cmp0_ranges;
+ *num_entries = ARRAY_SIZE(w25rq256_cmp0_ranges);
+ break;
default:
msg_cerr("%s() %d: GigaDevice flash chip mismatch"
" (0x%04x), aborting\n", __func__, __LINE__,
