tree 8394d30fb7db5062ba13e9eb6a206e172d601140
parent adbd706640c0a7012d604743128f7dcd6f222a89
author Furquan Shaikh <furquan@google.com> 1529559475 -0700
committer chrome-bot <chrome-bot@chromium.org> 1529623890 -0700

APL: chipset_enable: Use mmio read for getting BBS

On APL, Fast SPI PCI device is hidden in the OS and so it relies on
mmio read of FAST SPI PCI config space instead of performing
pci_read. Bus probe function for APL reused the code from Sunrise
point which had pci_read and thus resulted in incorrect behavior. This
change fixes this issue by making APL read BBS using mmio read.

BUG=b:110495950
TEST=None
BRANCH=None

Change-Id: I469b36f0d1db0ca7257d0e1ea5508d6e6cfecaa5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1109593
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>